io-domain.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Rockchip IO Voltage Domain driver
  4. *
  5. * Copyright 2014 MundoReader S.L.
  6. * Copyright 2014 Google, Inc.
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/err.h>
  11. #include <linux/mfd/syscon.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/regmap.h>
  15. #include <linux/regulator/consumer.h>
  16. #define MAX_SUPPLIES 16
  17. /*
  18. * The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
  19. * "Recommended Operating Conditions" for "Digital GPIO". When the typical
  20. * is 3.3V the max is 3.6V. When the typical is 1.8V the max is 1.98V.
  21. *
  22. * They are used like this:
  23. * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
  24. * SoC we're at 3.3.
  25. * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
  26. * that to be an error.
  27. */
  28. #define MAX_VOLTAGE_1_8 1980000
  29. #define MAX_VOLTAGE_3_3 3600000
  30. #define PX30_IO_VSEL 0x180
  31. #define PX30_IO_VSEL_VCCIO6_SRC BIT(0)
  32. #define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1
  33. #define RK3288_SOC_CON2 0x24c
  34. #define RK3288_SOC_CON2_FLASH0 BIT(7)
  35. #define RK3288_SOC_FLASH_SUPPLY_NUM 2
  36. #define RK3308_SOC_CON0 0x300
  37. #define RK3308_SOC_CON0_VCCIO3 BIT(8)
  38. #define RK3308_SOC_VCCIO3_SUPPLY_NUM 3
  39. #define RK3328_SOC_CON4 0x410
  40. #define RK3328_SOC_CON4_VCCIO2 BIT(7)
  41. #define RK3328_SOC_VCCIO2_SUPPLY_NUM 1
  42. #define RK3368_SOC_CON15 0x43c
  43. #define RK3368_SOC_CON15_FLASH0 BIT(14)
  44. #define RK3368_SOC_FLASH_SUPPLY_NUM 2
  45. #define RK3399_PMUGRF_CON0 0x180
  46. #define RK3399_PMUGRF_CON0_VSEL BIT(8)
  47. #define RK3399_PMUGRF_VSEL_SUPPLY_NUM 9
  48. #define RK3568_PMU_GRF_IO_VSEL0 (0x0140)
  49. #define RK3568_PMU_GRF_IO_VSEL1 (0x0144)
  50. #define RK3568_PMU_GRF_IO_VSEL2 (0x0148)
  51. struct rockchip_iodomain;
  52. struct rockchip_iodomain_supply {
  53. struct rockchip_iodomain *iod;
  54. struct regulator *reg;
  55. struct notifier_block nb;
  56. int idx;
  57. };
  58. struct rockchip_iodomain_soc_data {
  59. int grf_offset;
  60. const char *supply_names[MAX_SUPPLIES];
  61. void (*init)(struct rockchip_iodomain *iod);
  62. int (*write)(struct rockchip_iodomain_supply *supply, int uV);
  63. };
  64. struct rockchip_iodomain {
  65. struct device *dev;
  66. struct regmap *grf;
  67. const struct rockchip_iodomain_soc_data *soc_data;
  68. struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
  69. int (*write)(struct rockchip_iodomain_supply *supply, int uV);
  70. };
  71. static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV)
  72. {
  73. struct rockchip_iodomain *iod = supply->iod;
  74. u32 is_3v3 = uV > MAX_VOLTAGE_1_8;
  75. u32 val0, val1;
  76. int b;
  77. switch (supply->idx) {
  78. case 0: /* pmuio1 */
  79. break;
  80. case 1: /* pmuio2 */
  81. b = supply->idx;
  82. val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
  83. b = supply->idx + 4;
  84. val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
  85. regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val0);
  86. regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val1);
  87. break;
  88. case 3: /* vccio2 */
  89. break;
  90. case 2: /* vccio1 */
  91. case 4: /* vccio3 */
  92. case 5: /* vccio4 */
  93. case 6: /* vccio5 */
  94. case 7: /* vccio6 */
  95. case 8: /* vccio7 */
  96. b = supply->idx - 1;
  97. val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
  98. val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
  99. regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL0, val0);
  100. regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL1, val1);
  101. break;
  102. default:
  103. return -EINVAL;
  104. }
  105. return 0;
  106. }
  107. static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
  108. int uV)
  109. {
  110. struct rockchip_iodomain *iod = supply->iod;
  111. u32 val;
  112. int ret;
  113. /* set value bit */
  114. val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
  115. val <<= supply->idx;
  116. /* apply hiword-mask */
  117. val |= (BIT(supply->idx) << 16);
  118. ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val);
  119. if (ret)
  120. dev_err(iod->dev, "Couldn't write to GRF\n");
  121. return ret;
  122. }
  123. static int rockchip_iodomain_notify(struct notifier_block *nb,
  124. unsigned long event,
  125. void *data)
  126. {
  127. struct rockchip_iodomain_supply *supply =
  128. container_of(nb, struct rockchip_iodomain_supply, nb);
  129. int uV;
  130. int ret;
  131. /*
  132. * According to Rockchip it's important to keep the SoC IO domain
  133. * higher than (or equal to) the external voltage. That means we need
  134. * to change it before external voltage changes happen in the case
  135. * of an increase.
  136. *
  137. * Note that in the "pre" change we pick the max possible voltage that
  138. * the regulator might end up at (the client requests a range and we
  139. * don't know for certain the exact voltage). Right now we rely on the
  140. * slop in MAX_VOLTAGE_1_8 and MAX_VOLTAGE_3_3 to save us if clients
  141. * request something like a max of 3.6V when they really want 3.3V.
  142. * We could attempt to come up with better rules if this fails.
  143. */
  144. if (event & REGULATOR_EVENT_PRE_VOLTAGE_CHANGE) {
  145. struct pre_voltage_change_data *pvc_data = data;
  146. uV = max_t(unsigned long, pvc_data->old_uV, pvc_data->max_uV);
  147. } else if (event & (REGULATOR_EVENT_VOLTAGE_CHANGE |
  148. REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE)) {
  149. uV = (unsigned long)data;
  150. } else {
  151. return NOTIFY_OK;
  152. }
  153. dev_dbg(supply->iod->dev, "Setting to %d\n", uV);
  154. if (uV > MAX_VOLTAGE_3_3) {
  155. dev_err(supply->iod->dev, "Voltage too high: %d\n", uV);
  156. if (event == REGULATOR_EVENT_PRE_VOLTAGE_CHANGE)
  157. return NOTIFY_BAD;
  158. }
  159. ret = supply->iod->write(supply, uV);
  160. if (ret && event == REGULATOR_EVENT_PRE_VOLTAGE_CHANGE)
  161. return NOTIFY_BAD;
  162. dev_dbg(supply->iod->dev, "Setting to %d done\n", uV);
  163. return NOTIFY_OK;
  164. }
  165. static void px30_iodomain_init(struct rockchip_iodomain *iod)
  166. {
  167. int ret;
  168. u32 val;
  169. /* if no VCCIO6 supply we should leave things alone */
  170. if (!iod->supplies[PX30_IO_VSEL_VCCIO6_SUPPLY_NUM].reg)
  171. return;
  172. /*
  173. * set vccio6 iodomain to also use this framework
  174. * instead of a special gpio.
  175. */
  176. val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16);
  177. ret = regmap_write(iod->grf, PX30_IO_VSEL, val);
  178. if (ret < 0)
  179. dev_warn(iod->dev, "couldn't update vccio6 ctrl\n");
  180. }
  181. static void rk3288_iodomain_init(struct rockchip_iodomain *iod)
  182. {
  183. int ret;
  184. u32 val;
  185. /* if no flash supply we should leave things alone */
  186. if (!iod->supplies[RK3288_SOC_FLASH_SUPPLY_NUM].reg)
  187. return;
  188. /*
  189. * set flash0 iodomain to also use this framework
  190. * instead of a special gpio.
  191. */
  192. val = RK3288_SOC_CON2_FLASH0 | (RK3288_SOC_CON2_FLASH0 << 16);
  193. ret = regmap_write(iod->grf, RK3288_SOC_CON2, val);
  194. if (ret < 0)
  195. dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
  196. }
  197. static void rk3308_iodomain_init(struct rockchip_iodomain *iod)
  198. {
  199. int ret;
  200. u32 val;
  201. /* if no vccio3 supply we should leave things alone */
  202. if (!iod->supplies[RK3308_SOC_VCCIO3_SUPPLY_NUM].reg)
  203. return;
  204. /*
  205. * set vccio3 iodomain to also use this framework
  206. * instead of a special gpio.
  207. */
  208. val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
  209. ret = regmap_write(iod->grf, RK3308_SOC_CON0, val);
  210. if (ret < 0)
  211. dev_warn(iod->dev, "couldn't update vccio3 vsel ctrl\n");
  212. }
  213. static void rk3328_iodomain_init(struct rockchip_iodomain *iod)
  214. {
  215. int ret;
  216. u32 val;
  217. /* if no vccio2 supply we should leave things alone */
  218. if (!iod->supplies[RK3328_SOC_VCCIO2_SUPPLY_NUM].reg)
  219. return;
  220. /*
  221. * set vccio2 iodomain to also use this framework
  222. * instead of a special gpio.
  223. */
  224. val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16);
  225. ret = regmap_write(iod->grf, RK3328_SOC_CON4, val);
  226. if (ret < 0)
  227. dev_warn(iod->dev, "couldn't update vccio2 vsel ctrl\n");
  228. }
  229. static void rk3368_iodomain_init(struct rockchip_iodomain *iod)
  230. {
  231. int ret;
  232. u32 val;
  233. /* if no flash supply we should leave things alone */
  234. if (!iod->supplies[RK3368_SOC_FLASH_SUPPLY_NUM].reg)
  235. return;
  236. /*
  237. * set flash0 iodomain to also use this framework
  238. * instead of a special gpio.
  239. */
  240. val = RK3368_SOC_CON15_FLASH0 | (RK3368_SOC_CON15_FLASH0 << 16);
  241. ret = regmap_write(iod->grf, RK3368_SOC_CON15, val);
  242. if (ret < 0)
  243. dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
  244. }
  245. static void rk3399_pmu_iodomain_init(struct rockchip_iodomain *iod)
  246. {
  247. int ret;
  248. u32 val;
  249. /* if no pmu io supply we should leave things alone */
  250. if (!iod->supplies[RK3399_PMUGRF_VSEL_SUPPLY_NUM].reg)
  251. return;
  252. /*
  253. * set pmu io iodomain to also use this framework
  254. * instead of a special gpio.
  255. */
  256. val = RK3399_PMUGRF_CON0_VSEL | (RK3399_PMUGRF_CON0_VSEL << 16);
  257. ret = regmap_write(iod->grf, RK3399_PMUGRF_CON0, val);
  258. if (ret < 0)
  259. dev_warn(iod->dev, "couldn't update pmu io iodomain ctrl\n");
  260. }
  261. static const struct rockchip_iodomain_soc_data soc_data_px30 = {
  262. .grf_offset = 0x180,
  263. .supply_names = {
  264. NULL,
  265. "vccio6",
  266. "vccio1",
  267. "vccio2",
  268. "vccio3",
  269. "vccio4",
  270. "vccio5",
  271. "vccio-oscgpi",
  272. },
  273. .init = px30_iodomain_init,
  274. };
  275. static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
  276. .grf_offset = 0x100,
  277. .supply_names = {
  278. NULL,
  279. NULL,
  280. NULL,
  281. NULL,
  282. NULL,
  283. NULL,
  284. NULL,
  285. NULL,
  286. NULL,
  287. NULL,
  288. NULL,
  289. NULL,
  290. NULL,
  291. NULL,
  292. "pmuio1",
  293. "pmuio2",
  294. },
  295. };
  296. /*
  297. * On the rk3188 the io-domains are handled by a shared register with the
  298. * lower 8 bits being still being continuing drive-strength settings.
  299. */
  300. static const struct rockchip_iodomain_soc_data soc_data_rk3188 = {
  301. .grf_offset = 0x104,
  302. .supply_names = {
  303. NULL,
  304. NULL,
  305. NULL,
  306. NULL,
  307. NULL,
  308. NULL,
  309. NULL,
  310. NULL,
  311. "ap0",
  312. "ap1",
  313. "cif",
  314. "flash",
  315. "vccio0",
  316. "vccio1",
  317. "lcdc0",
  318. "lcdc1",
  319. },
  320. };
  321. static const struct rockchip_iodomain_soc_data soc_data_rk3228 = {
  322. .grf_offset = 0x418,
  323. .supply_names = {
  324. "vccio1",
  325. "vccio2",
  326. "vccio3",
  327. "vccio4",
  328. },
  329. };
  330. static const struct rockchip_iodomain_soc_data soc_data_rk3288 = {
  331. .grf_offset = 0x380,
  332. .supply_names = {
  333. "lcdc", /* LCDC_VDD */
  334. "dvp", /* DVPIO_VDD */
  335. "flash0", /* FLASH0_VDD (emmc) */
  336. "flash1", /* FLASH1_VDD (sdio1) */
  337. "wifi", /* APIO3_VDD (sdio0) */
  338. "bb", /* APIO5_VDD */
  339. "audio", /* APIO4_VDD */
  340. "sdcard", /* SDMMC0_VDD (sdmmc) */
  341. "gpio30", /* APIO1_VDD */
  342. "gpio1830", /* APIO2_VDD */
  343. },
  344. .init = rk3288_iodomain_init,
  345. };
  346. static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
  347. .grf_offset = 0x300,
  348. .supply_names = {
  349. "vccio0",
  350. "vccio1",
  351. "vccio2",
  352. "vccio3",
  353. "vccio4",
  354. "vccio5",
  355. },
  356. .init = rk3308_iodomain_init,
  357. };
  358. static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
  359. .grf_offset = 0x410,
  360. .supply_names = {
  361. "vccio1",
  362. "vccio2",
  363. "vccio3",
  364. "vccio4",
  365. "vccio5",
  366. "vccio6",
  367. "pmuio",
  368. },
  369. .init = rk3328_iodomain_init,
  370. };
  371. static const struct rockchip_iodomain_soc_data soc_data_rk3368 = {
  372. .grf_offset = 0x900,
  373. .supply_names = {
  374. NULL, /* reserved */
  375. "dvp", /* DVPIO_VDD */
  376. "flash0", /* FLASH0_VDD (emmc) */
  377. "wifi", /* APIO2_VDD (sdio0) */
  378. NULL,
  379. "audio", /* APIO3_VDD */
  380. "sdcard", /* SDMMC0_VDD (sdmmc) */
  381. "gpio30", /* APIO1_VDD */
  382. "gpio1830", /* APIO4_VDD (gpujtag) */
  383. },
  384. .init = rk3368_iodomain_init,
  385. };
  386. static const struct rockchip_iodomain_soc_data soc_data_rk3368_pmu = {
  387. .grf_offset = 0x100,
  388. .supply_names = {
  389. NULL,
  390. NULL,
  391. NULL,
  392. NULL,
  393. "pmu", /*PMU IO domain*/
  394. "vop", /*LCDC IO domain*/
  395. },
  396. };
  397. static const struct rockchip_iodomain_soc_data soc_data_rk3399 = {
  398. .grf_offset = 0xe640,
  399. .supply_names = {
  400. "bt656", /* APIO2_VDD */
  401. "audio", /* APIO5_VDD */
  402. "sdmmc", /* SDMMC0_VDD */
  403. "gpio1830", /* APIO4_VDD */
  404. },
  405. };
  406. static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
  407. .grf_offset = 0x180,
  408. .supply_names = {
  409. NULL,
  410. NULL,
  411. NULL,
  412. NULL,
  413. NULL,
  414. NULL,
  415. NULL,
  416. NULL,
  417. NULL,
  418. "pmu1830", /* PMUIO2_VDD */
  419. },
  420. .init = rk3399_pmu_iodomain_init,
  421. };
  422. static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
  423. .grf_offset = 0x140,
  424. .supply_names = {
  425. "pmuio1",
  426. "pmuio2",
  427. "vccio1",
  428. "vccio2",
  429. "vccio3",
  430. "vccio4",
  431. "vccio5",
  432. "vccio6",
  433. "vccio7",
  434. },
  435. .write = rk3568_iodomain_write,
  436. };
  437. static const struct rockchip_iodomain_soc_data soc_data_rv1108 = {
  438. .grf_offset = 0x404,
  439. .supply_names = {
  440. NULL,
  441. NULL,
  442. NULL,
  443. NULL,
  444. NULL,
  445. NULL,
  446. NULL,
  447. NULL,
  448. NULL,
  449. NULL,
  450. NULL,
  451. "vccio1",
  452. "vccio2",
  453. "vccio3",
  454. "vccio5",
  455. "vccio6",
  456. },
  457. };
  458. static const struct rockchip_iodomain_soc_data soc_data_rv1108_pmu = {
  459. .grf_offset = 0x104,
  460. .supply_names = {
  461. "pmu",
  462. },
  463. };
  464. static const struct rockchip_iodomain_soc_data soc_data_rv1126_pmu = {
  465. .grf_offset = 0x140,
  466. .supply_names = {
  467. NULL,
  468. "vccio1",
  469. "vccio2",
  470. "vccio3",
  471. "vccio4",
  472. "vccio5",
  473. "vccio6",
  474. "vccio7",
  475. "pmuio0",
  476. "pmuio1",
  477. },
  478. };
  479. static const struct of_device_id rockchip_iodomain_match[] = {
  480. {
  481. .compatible = "rockchip,px30-io-voltage-domain",
  482. .data = (void *)&soc_data_px30
  483. },
  484. {
  485. .compatible = "rockchip,px30-pmu-io-voltage-domain",
  486. .data = (void *)&soc_data_px30_pmu
  487. },
  488. {
  489. .compatible = "rockchip,rk3188-io-voltage-domain",
  490. .data = &soc_data_rk3188
  491. },
  492. {
  493. .compatible = "rockchip,rk3228-io-voltage-domain",
  494. .data = &soc_data_rk3228
  495. },
  496. {
  497. .compatible = "rockchip,rk3288-io-voltage-domain",
  498. .data = &soc_data_rk3288
  499. },
  500. {
  501. .compatible = "rockchip,rk3308-io-voltage-domain",
  502. .data = &soc_data_rk3308
  503. },
  504. {
  505. .compatible = "rockchip,rk3328-io-voltage-domain",
  506. .data = &soc_data_rk3328
  507. },
  508. {
  509. .compatible = "rockchip,rk3368-io-voltage-domain",
  510. .data = &soc_data_rk3368
  511. },
  512. {
  513. .compatible = "rockchip,rk3368-pmu-io-voltage-domain",
  514. .data = &soc_data_rk3368_pmu
  515. },
  516. {
  517. .compatible = "rockchip,rk3399-io-voltage-domain",
  518. .data = &soc_data_rk3399
  519. },
  520. {
  521. .compatible = "rockchip,rk3399-pmu-io-voltage-domain",
  522. .data = &soc_data_rk3399_pmu
  523. },
  524. {
  525. .compatible = "rockchip,rk3568-pmu-io-voltage-domain",
  526. .data = &soc_data_rk3568_pmu
  527. },
  528. {
  529. .compatible = "rockchip,rv1108-io-voltage-domain",
  530. .data = &soc_data_rv1108
  531. },
  532. {
  533. .compatible = "rockchip,rv1108-pmu-io-voltage-domain",
  534. .data = &soc_data_rv1108_pmu
  535. },
  536. {
  537. .compatible = "rockchip,rv1126-pmu-io-voltage-domain",
  538. .data = &soc_data_rv1126_pmu
  539. },
  540. { /* sentinel */ },
  541. };
  542. MODULE_DEVICE_TABLE(of, rockchip_iodomain_match);
  543. static int rockchip_iodomain_probe(struct platform_device *pdev)
  544. {
  545. struct device_node *np = pdev->dev.of_node;
  546. const struct of_device_id *match;
  547. struct rockchip_iodomain *iod;
  548. struct device *parent;
  549. int i, ret = 0;
  550. if (!np)
  551. return -ENODEV;
  552. iod = devm_kzalloc(&pdev->dev, sizeof(*iod), GFP_KERNEL);
  553. if (!iod)
  554. return -ENOMEM;
  555. iod->dev = &pdev->dev;
  556. platform_set_drvdata(pdev, iod);
  557. match = of_match_node(rockchip_iodomain_match, np);
  558. iod->soc_data = match->data;
  559. if (iod->soc_data->write)
  560. iod->write = iod->soc_data->write;
  561. else
  562. iod->write = rockchip_iodomain_write;
  563. parent = pdev->dev.parent;
  564. if (parent && parent->of_node) {
  565. iod->grf = syscon_node_to_regmap(parent->of_node);
  566. } else {
  567. dev_dbg(&pdev->dev, "falling back to old binding\n");
  568. iod->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
  569. }
  570. if (IS_ERR(iod->grf)) {
  571. dev_err(&pdev->dev, "couldn't find grf regmap\n");
  572. return PTR_ERR(iod->grf);
  573. }
  574. for (i = 0; i < MAX_SUPPLIES; i++) {
  575. const char *supply_name = iod->soc_data->supply_names[i];
  576. struct rockchip_iodomain_supply *supply = &iod->supplies[i];
  577. struct regulator *reg;
  578. int uV;
  579. if (!supply_name)
  580. continue;
  581. reg = devm_regulator_get_optional(iod->dev, supply_name);
  582. if (IS_ERR(reg)) {
  583. ret = PTR_ERR(reg);
  584. /* If a supply wasn't specified, that's OK */
  585. if (ret == -ENODEV)
  586. continue;
  587. else if (ret != -EPROBE_DEFER)
  588. dev_err(iod->dev, "couldn't get regulator %s\n",
  589. supply_name);
  590. goto unreg_notify;
  591. }
  592. /* set initial correct value */
  593. uV = regulator_get_voltage(reg);
  594. /* must be a regulator we can get the voltage of */
  595. if (uV < 0) {
  596. dev_err(iod->dev, "Can't determine voltage: %s\n",
  597. supply_name);
  598. ret = uV;
  599. goto unreg_notify;
  600. }
  601. if (uV > MAX_VOLTAGE_3_3) {
  602. dev_crit(iod->dev,
  603. "%d uV is too high. May damage SoC!\n",
  604. uV);
  605. ret = -EINVAL;
  606. goto unreg_notify;
  607. }
  608. /* setup our supply */
  609. supply->idx = i;
  610. supply->iod = iod;
  611. supply->reg = reg;
  612. supply->nb.notifier_call = rockchip_iodomain_notify;
  613. ret = iod->write(supply, uV);
  614. if (ret) {
  615. supply->reg = NULL;
  616. goto unreg_notify;
  617. }
  618. /* register regulator notifier */
  619. ret = regulator_register_notifier(reg, &supply->nb);
  620. if (ret) {
  621. dev_err(&pdev->dev,
  622. "regulator notifier request failed\n");
  623. supply->reg = NULL;
  624. goto unreg_notify;
  625. }
  626. }
  627. if (iod->soc_data->init)
  628. iod->soc_data->init(iod);
  629. return 0;
  630. unreg_notify:
  631. for (i = MAX_SUPPLIES - 1; i >= 0; i--) {
  632. struct rockchip_iodomain_supply *io_supply = &iod->supplies[i];
  633. if (io_supply->reg)
  634. regulator_unregister_notifier(io_supply->reg,
  635. &io_supply->nb);
  636. }
  637. return ret;
  638. }
  639. static void rockchip_iodomain_remove(struct platform_device *pdev)
  640. {
  641. struct rockchip_iodomain *iod = platform_get_drvdata(pdev);
  642. int i;
  643. for (i = MAX_SUPPLIES - 1; i >= 0; i--) {
  644. struct rockchip_iodomain_supply *io_supply = &iod->supplies[i];
  645. if (io_supply->reg)
  646. regulator_unregister_notifier(io_supply->reg,
  647. &io_supply->nb);
  648. }
  649. }
  650. static struct platform_driver rockchip_iodomain_driver = {
  651. .probe = rockchip_iodomain_probe,
  652. .remove_new = rockchip_iodomain_remove,
  653. .driver = {
  654. .name = "rockchip-iodomain",
  655. .of_match_table = rockchip_iodomain_match,
  656. },
  657. };
  658. module_platform_driver(rockchip_iodomain_driver);
  659. MODULE_DESCRIPTION("Rockchip IO-domain driver");
  660. MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
  661. MODULE_AUTHOR("Doug Anderson <dianders@chromium.org>");
  662. MODULE_LICENSE("GPL v2");