otg.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * otg.c - ChipIdea USB IP core OTG driver
  4. *
  5. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  6. *
  7. * Author: Peter Chen
  8. */
  9. /*
  10. * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
  11. * are also included.
  12. */
  13. #include <linux/usb/otg.h>
  14. #include <linux/usb/gadget.h>
  15. #include <linux/usb/chipidea.h>
  16. #include "ci.h"
  17. #include "bits.h"
  18. #include "otg.h"
  19. #include "otg_fsm.h"
  20. /**
  21. * hw_read_otgsc - returns otgsc register bits value.
  22. * @ci: the controller
  23. * @mask: bitfield mask
  24. */
  25. u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  26. {
  27. struct ci_hdrc_cable *cable;
  28. u32 val = hw_read(ci, OP_OTGSC, mask);
  29. /*
  30. * If using extcon framework for VBUS and/or ID signal
  31. * detection overwrite OTGSC register value
  32. */
  33. cable = &ci->platdata->vbus_extcon;
  34. if (!IS_ERR(cable->edev) || ci->role_switch) {
  35. if (cable->changed)
  36. val |= OTGSC_BSVIS;
  37. else
  38. val &= ~OTGSC_BSVIS;
  39. if (cable->connected)
  40. val |= OTGSC_BSV;
  41. else
  42. val &= ~OTGSC_BSV;
  43. if (cable->enabled)
  44. val |= OTGSC_BSVIE;
  45. else
  46. val &= ~OTGSC_BSVIE;
  47. }
  48. cable = &ci->platdata->id_extcon;
  49. if (!IS_ERR(cable->edev) || ci->role_switch) {
  50. if (cable->changed)
  51. val |= OTGSC_IDIS;
  52. else
  53. val &= ~OTGSC_IDIS;
  54. if (cable->connected)
  55. val &= ~OTGSC_ID; /* host */
  56. else
  57. val |= OTGSC_ID; /* device */
  58. if (cable->enabled)
  59. val |= OTGSC_IDIE;
  60. else
  61. val &= ~OTGSC_IDIE;
  62. }
  63. return val & mask;
  64. }
  65. /**
  66. * hw_write_otgsc - updates target bits of OTGSC register.
  67. * @ci: the controller
  68. * @mask: bitfield mask
  69. * @data: to be written
  70. */
  71. void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
  72. {
  73. struct ci_hdrc_cable *cable;
  74. cable = &ci->platdata->vbus_extcon;
  75. if (!IS_ERR(cable->edev) || ci->role_switch) {
  76. if (data & mask & OTGSC_BSVIS)
  77. cable->changed = false;
  78. /* Don't enable vbus interrupt if using external notifier */
  79. if (data & mask & OTGSC_BSVIE) {
  80. cable->enabled = true;
  81. data &= ~OTGSC_BSVIE;
  82. } else if (mask & OTGSC_BSVIE) {
  83. cable->enabled = false;
  84. }
  85. }
  86. cable = &ci->platdata->id_extcon;
  87. if (!IS_ERR(cable->edev) || ci->role_switch) {
  88. if (data & mask & OTGSC_IDIS)
  89. cable->changed = false;
  90. /* Don't enable id interrupt if using external notifier */
  91. if (data & mask & OTGSC_IDIE) {
  92. cable->enabled = true;
  93. data &= ~OTGSC_IDIE;
  94. } else if (mask & OTGSC_IDIE) {
  95. cable->enabled = false;
  96. }
  97. }
  98. hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
  99. }
  100. /**
  101. * ci_otg_role - pick role based on ID pin state
  102. * @ci: the controller
  103. */
  104. enum ci_role ci_otg_role(struct ci_hdrc *ci)
  105. {
  106. enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
  107. ? CI_ROLE_GADGET
  108. : CI_ROLE_HOST;
  109. return role;
  110. }
  111. void ci_handle_vbus_change(struct ci_hdrc *ci)
  112. {
  113. if (!ci->is_otg) {
  114. if (ci->platdata->flags & CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS)
  115. usb_gadget_vbus_connect(&ci->gadget);
  116. return;
  117. }
  118. if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
  119. usb_gadget_vbus_connect(&ci->gadget);
  120. else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
  121. usb_gadget_vbus_disconnect(&ci->gadget);
  122. }
  123. /**
  124. * hw_wait_vbus_lower_bsv - When we switch to device mode, the vbus value
  125. * should be lower than OTGSC_BSV before connecting
  126. * to host.
  127. *
  128. * @ci: the controller
  129. *
  130. * This function returns an error code if timeout
  131. */
  132. static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
  133. {
  134. unsigned long elapse = jiffies + msecs_to_jiffies(5000);
  135. u32 mask = OTGSC_BSV;
  136. while (hw_read_otgsc(ci, mask)) {
  137. if (time_after(jiffies, elapse)) {
  138. dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
  139. mask);
  140. return -ETIMEDOUT;
  141. }
  142. msleep(20);
  143. }
  144. return 0;
  145. }
  146. void ci_handle_id_switch(struct ci_hdrc *ci)
  147. {
  148. enum ci_role role;
  149. mutex_lock(&ci->mutex);
  150. role = ci_otg_role(ci);
  151. if (role != ci->role) {
  152. dev_dbg(ci->dev, "switching from %s to %s\n",
  153. ci_role(ci)->name, ci->roles[role]->name);
  154. if (ci->vbus_active && ci->role == CI_ROLE_GADGET)
  155. /*
  156. * vbus disconnect event is lost due to role
  157. * switch occurs during system suspend.
  158. */
  159. usb_gadget_vbus_disconnect(&ci->gadget);
  160. ci_role_stop(ci);
  161. if (role == CI_ROLE_GADGET &&
  162. IS_ERR(ci->platdata->vbus_extcon.edev))
  163. /*
  164. * Wait vbus lower than OTGSC_BSV before connecting
  165. * to host. If connecting status is from an external
  166. * connector instead of register, we don't need to
  167. * care vbus on the board, since it will not affect
  168. * external connector status.
  169. */
  170. hw_wait_vbus_lower_bsv(ci);
  171. ci_role_start(ci, role);
  172. /* vbus change may have already occurred */
  173. if (role == CI_ROLE_GADGET)
  174. ci_handle_vbus_change(ci);
  175. }
  176. mutex_unlock(&ci->mutex);
  177. }
  178. /**
  179. * ci_otg_work - perform otg (vbus/id) event handle
  180. * @work: work struct
  181. */
  182. static void ci_otg_work(struct work_struct *work)
  183. {
  184. struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
  185. if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
  186. enable_irq(ci->irq);
  187. return;
  188. }
  189. pm_runtime_get_sync(ci->dev);
  190. if (ci->id_event) {
  191. ci->id_event = false;
  192. ci_handle_id_switch(ci);
  193. }
  194. if (ci->b_sess_valid_event) {
  195. ci->b_sess_valid_event = false;
  196. ci_handle_vbus_change(ci);
  197. }
  198. pm_runtime_put_sync(ci->dev);
  199. enable_irq(ci->irq);
  200. }
  201. /**
  202. * ci_hdrc_otg_init - initialize otg struct
  203. * @ci: the controller
  204. */
  205. int ci_hdrc_otg_init(struct ci_hdrc *ci)
  206. {
  207. INIT_WORK(&ci->work, ci_otg_work);
  208. ci->wq = create_freezable_workqueue("ci_otg");
  209. if (!ci->wq) {
  210. dev_err(ci->dev, "can't create workqueue\n");
  211. return -ENODEV;
  212. }
  213. if (ci_otg_is_fsm_mode(ci))
  214. return ci_hdrc_otg_fsm_init(ci);
  215. return 0;
  216. }
  217. /**
  218. * ci_hdrc_otg_destroy - destroy otg struct
  219. * @ci: the controller
  220. */
  221. void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
  222. {
  223. if (ci->wq)
  224. destroy_workqueue(ci->wq);
  225. /* Disable all OTG irq and clear status */
  226. hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
  227. OTGSC_INT_STATUS_BITS);
  228. if (ci_otg_is_fsm_mode(ci))
  229. ci_hdrc_otg_fsm_remove(ci);
  230. }