udc.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * udc.c - ChipIdea UDC driver
  4. *
  5. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  6. *
  7. * Author: David Lopo
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/device.h>
  11. #include <linux/dmapool.h>
  12. #include <linux/dma-direct.h>
  13. #include <linux/err.h>
  14. #include <linux/irqreturn.h>
  15. #include <linux/kernel.h>
  16. #include <linux/slab.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/pinctrl/consumer.h>
  19. #include <linux/usb/ch9.h>
  20. #include <linux/usb/gadget.h>
  21. #include <linux/usb/otg-fsm.h>
  22. #include <linux/usb/chipidea.h>
  23. #include "ci.h"
  24. #include "udc.h"
  25. #include "bits.h"
  26. #include "otg.h"
  27. #include "otg_fsm.h"
  28. #include "trace.h"
  29. /* control endpoint description */
  30. static const struct usb_endpoint_descriptor
  31. ctrl_endpt_out_desc = {
  32. .bLength = USB_DT_ENDPOINT_SIZE,
  33. .bDescriptorType = USB_DT_ENDPOINT,
  34. .bEndpointAddress = USB_DIR_OUT,
  35. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  36. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  37. };
  38. static const struct usb_endpoint_descriptor
  39. ctrl_endpt_in_desc = {
  40. .bLength = USB_DT_ENDPOINT_SIZE,
  41. .bDescriptorType = USB_DT_ENDPOINT,
  42. .bEndpointAddress = USB_DIR_IN,
  43. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  44. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  45. };
  46. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  47. struct td_node *node);
  48. /**
  49. * hw_ep_bit: calculates the bit number
  50. * @num: endpoint number
  51. * @dir: endpoint direction
  52. *
  53. * This function returns bit number
  54. */
  55. static inline int hw_ep_bit(int num, int dir)
  56. {
  57. return num + ((dir == TX) ? 16 : 0);
  58. }
  59. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  60. {
  61. int fill = 16 - ci->hw_ep_max / 2;
  62. if (n >= ci->hw_ep_max / 2)
  63. n += fill;
  64. return n;
  65. }
  66. /**
  67. * hw_device_state: enables/disables interrupts (execute without interruption)
  68. * @ci: the controller
  69. * @dma: 0 => disable, !0 => enable and set dma engine
  70. *
  71. * This function returns an error code
  72. */
  73. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  74. {
  75. if (dma) {
  76. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  77. /* interrupt, error, port change, reset, sleep/suspend */
  78. hw_write(ci, OP_USBINTR, ~0,
  79. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI);
  80. } else {
  81. hw_write(ci, OP_USBINTR, ~0, 0);
  82. }
  83. return 0;
  84. }
  85. /**
  86. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  87. * @ci: the controller
  88. * @num: endpoint number
  89. * @dir: endpoint direction
  90. *
  91. * This function returns an error code
  92. */
  93. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  94. {
  95. int n = hw_ep_bit(num, dir);
  96. do {
  97. /* flush any pending transfer */
  98. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  99. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  100. cpu_relax();
  101. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  102. return 0;
  103. }
  104. /**
  105. * hw_ep_disable: disables endpoint (execute without interruption)
  106. * @ci: the controller
  107. * @num: endpoint number
  108. * @dir: endpoint direction
  109. *
  110. * This function returns an error code
  111. */
  112. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  113. {
  114. hw_write(ci, OP_ENDPTCTRL + num,
  115. (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  116. return 0;
  117. }
  118. /**
  119. * hw_ep_enable: enables endpoint (execute without interruption)
  120. * @ci: the controller
  121. * @num: endpoint number
  122. * @dir: endpoint direction
  123. * @type: endpoint type
  124. *
  125. * This function returns an error code
  126. */
  127. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  128. {
  129. u32 mask, data;
  130. if (dir == TX) {
  131. mask = ENDPTCTRL_TXT; /* type */
  132. data = type << __ffs(mask);
  133. mask |= ENDPTCTRL_TXS; /* unstall */
  134. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  135. data |= ENDPTCTRL_TXR;
  136. mask |= ENDPTCTRL_TXE; /* enable */
  137. data |= ENDPTCTRL_TXE;
  138. } else {
  139. mask = ENDPTCTRL_RXT; /* type */
  140. data = type << __ffs(mask);
  141. mask |= ENDPTCTRL_RXS; /* unstall */
  142. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  143. data |= ENDPTCTRL_RXR;
  144. mask |= ENDPTCTRL_RXE; /* enable */
  145. data |= ENDPTCTRL_RXE;
  146. }
  147. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  148. return 0;
  149. }
  150. /**
  151. * hw_ep_get_halt: return endpoint halt status
  152. * @ci: the controller
  153. * @num: endpoint number
  154. * @dir: endpoint direction
  155. *
  156. * This function returns 1 if endpoint halted
  157. */
  158. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  159. {
  160. u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  161. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  162. }
  163. /**
  164. * hw_ep_prime: primes endpoint (execute without interruption)
  165. * @ci: the controller
  166. * @num: endpoint number
  167. * @dir: endpoint direction
  168. * @is_ctrl: true if control endpoint
  169. *
  170. * This function returns an error code
  171. */
  172. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  173. {
  174. int n = hw_ep_bit(num, dir);
  175. /* Synchronize before ep prime */
  176. wmb();
  177. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  178. return -EAGAIN;
  179. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  180. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  181. cpu_relax();
  182. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  183. return -EAGAIN;
  184. /* status shoult be tested according with manual but it doesn't work */
  185. return 0;
  186. }
  187. /**
  188. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  189. * without interruption)
  190. * @ci: the controller
  191. * @num: endpoint number
  192. * @dir: endpoint direction
  193. * @value: true => stall, false => unstall
  194. *
  195. * This function returns an error code
  196. */
  197. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  198. {
  199. if (value != 0 && value != 1)
  200. return -EINVAL;
  201. do {
  202. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  203. u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  204. u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  205. /* data toggle - reserved for EP0 but it's in ESS */
  206. hw_write(ci, reg, mask_xs|mask_xr,
  207. value ? mask_xs : mask_xr);
  208. } while (value != hw_ep_get_halt(ci, num, dir));
  209. return 0;
  210. }
  211. /**
  212. * hw_port_is_high_speed: test if port is high speed
  213. * @ci: the controller
  214. *
  215. * This function returns true if high speed port
  216. */
  217. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  218. {
  219. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  220. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  221. }
  222. /**
  223. * hw_test_and_clear_complete: test & clear complete status (execute without
  224. * interruption)
  225. * @ci: the controller
  226. * @n: endpoint number
  227. *
  228. * This function returns complete status
  229. */
  230. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  231. {
  232. n = ep_to_bit(ci, n);
  233. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  234. }
  235. /**
  236. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  237. * without interruption)
  238. * @ci: the controller
  239. *
  240. * This function returns active interrutps
  241. */
  242. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  243. {
  244. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  245. hw_write(ci, OP_USBSTS, ~0, reg);
  246. return reg;
  247. }
  248. /**
  249. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  250. * interruption)
  251. * @ci: the controller
  252. *
  253. * This function returns guard value
  254. */
  255. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  256. {
  257. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  258. }
  259. /**
  260. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  261. * interruption)
  262. * @ci: the controller
  263. *
  264. * This function returns guard value
  265. */
  266. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  267. {
  268. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  269. }
  270. /**
  271. * hw_usb_set_address: configures USB address (execute without interruption)
  272. * @ci: the controller
  273. * @value: new USB address
  274. *
  275. * This function explicitly sets the address, without the "USBADRA" (advance)
  276. * feature, which is not supported by older versions of the controller.
  277. */
  278. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  279. {
  280. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  281. value << __ffs(DEVICEADDR_USBADR));
  282. }
  283. /**
  284. * hw_usb_reset: restart device after a bus reset (execute without
  285. * interruption)
  286. * @ci: the controller
  287. *
  288. * This function returns an error code
  289. */
  290. static int hw_usb_reset(struct ci_hdrc *ci)
  291. {
  292. hw_usb_set_address(ci, 0);
  293. /* ESS flushes only at end?!? */
  294. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  295. /* clear setup token semaphores */
  296. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  297. /* clear complete status */
  298. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  299. /* wait until all bits cleared */
  300. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  301. udelay(10); /* not RTOS friendly */
  302. /* reset all endpoints ? */
  303. /* reset internal status and wait for further instructions
  304. no need to verify the port reset status (ESS does it) */
  305. return 0;
  306. }
  307. /******************************************************************************
  308. * UTIL block
  309. *****************************************************************************/
  310. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  311. unsigned int length, struct scatterlist *s)
  312. {
  313. int i;
  314. u32 temp;
  315. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  316. GFP_ATOMIC);
  317. if (node == NULL)
  318. return -ENOMEM;
  319. node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
  320. if (node->ptr == NULL) {
  321. kfree(node);
  322. return -ENOMEM;
  323. }
  324. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  325. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  326. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  327. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  328. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  329. if (hwreq->req.length == 0
  330. || hwreq->req.length % hwep->ep.maxpacket)
  331. mul++;
  332. node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
  333. }
  334. if (s) {
  335. temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
  336. node->td_remaining_size = CI_MAX_BUF_SIZE - length;
  337. } else {
  338. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  339. }
  340. if (length) {
  341. node->ptr->page[0] = cpu_to_le32(temp);
  342. for (i = 1; i < TD_PAGE_COUNT; i++) {
  343. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  344. page &= ~TD_RESERVED_MASK;
  345. node->ptr->page[i] = cpu_to_le32(page);
  346. }
  347. }
  348. hwreq->req.actual += length;
  349. if (!list_empty(&hwreq->tds)) {
  350. /* get the last entry */
  351. lastnode = list_entry(hwreq->tds.prev,
  352. struct td_node, td);
  353. lastnode->ptr->next = cpu_to_le32(node->dma);
  354. }
  355. INIT_LIST_HEAD(&node->td);
  356. list_add_tail(&node->td, &hwreq->tds);
  357. return 0;
  358. }
  359. /**
  360. * _usb_addr: calculates endpoint address from direction & number
  361. * @ep: endpoint
  362. */
  363. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  364. {
  365. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  366. }
  367. static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
  368. struct ci_hw_req *hwreq)
  369. {
  370. unsigned int rest = hwreq->req.length;
  371. int pages = TD_PAGE_COUNT;
  372. int ret = 0;
  373. if (rest == 0) {
  374. ret = add_td_to_list(hwep, hwreq, 0, NULL);
  375. if (ret < 0)
  376. return ret;
  377. }
  378. /*
  379. * The first buffer could be not page aligned.
  380. * In that case we have to span into one extra td.
  381. */
  382. if (hwreq->req.dma % PAGE_SIZE)
  383. pages--;
  384. while (rest > 0) {
  385. unsigned int count = min(hwreq->req.length - hwreq->req.actual,
  386. (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
  387. ret = add_td_to_list(hwep, hwreq, count, NULL);
  388. if (ret < 0)
  389. return ret;
  390. rest -= count;
  391. }
  392. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  393. && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
  394. ret = add_td_to_list(hwep, hwreq, 0, NULL);
  395. if (ret < 0)
  396. return ret;
  397. }
  398. return ret;
  399. }
  400. static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  401. struct scatterlist *s)
  402. {
  403. unsigned int rest = sg_dma_len(s);
  404. int ret = 0;
  405. hwreq->req.actual = 0;
  406. while (rest > 0) {
  407. unsigned int count = min_t(unsigned int, rest,
  408. CI_MAX_BUF_SIZE);
  409. ret = add_td_to_list(hwep, hwreq, count, s);
  410. if (ret < 0)
  411. return ret;
  412. rest -= count;
  413. }
  414. return ret;
  415. }
  416. static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
  417. {
  418. int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
  419. / CI_HDRC_PAGE_SIZE;
  420. int i;
  421. u32 token;
  422. token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
  423. node->ptr->token = cpu_to_le32(token);
  424. for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
  425. u32 page = (u32) sg_dma_address(s) +
  426. (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
  427. page &= ~TD_RESERVED_MASK;
  428. node->ptr->page[i] = cpu_to_le32(page);
  429. }
  430. }
  431. static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  432. {
  433. struct usb_request *req = &hwreq->req;
  434. struct scatterlist *s = req->sg;
  435. int ret = 0, i = 0;
  436. struct td_node *node = NULL;
  437. if (!s || req->zero || req->length == 0) {
  438. dev_err(hwep->ci->dev, "not supported operation for sg\n");
  439. return -EINVAL;
  440. }
  441. while (i++ < req->num_mapped_sgs) {
  442. if (sg_dma_address(s) % PAGE_SIZE) {
  443. dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
  444. return -EINVAL;
  445. }
  446. if (node && (node->td_remaining_size >= sg_dma_len(s))) {
  447. ci_add_buffer_entry(node, s);
  448. node->td_remaining_size -= sg_dma_len(s);
  449. } else {
  450. ret = prepare_td_per_sg(hwep, hwreq, s);
  451. if (ret)
  452. return ret;
  453. node = list_entry(hwreq->tds.prev,
  454. struct td_node, td);
  455. }
  456. s = sg_next(s);
  457. }
  458. return ret;
  459. }
  460. /*
  461. * Verify if the scatterlist is valid by iterating each sg entry.
  462. * Return invalid sg entry index which is less than num_sgs.
  463. */
  464. static int sglist_get_invalid_entry(struct device *dma_dev, u8 dir,
  465. struct usb_request *req)
  466. {
  467. int i;
  468. struct scatterlist *s = req->sg;
  469. if (req->num_sgs == 1)
  470. return 1;
  471. dir = dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
  472. for (i = 0; i < req->num_sgs; i++, s = sg_next(s)) {
  473. /* Only small sg (generally last sg) may be bounced. If
  474. * that happens. we can't ensure the addr is page-aligned
  475. * after dma map.
  476. */
  477. if (dma_kmalloc_needs_bounce(dma_dev, s->length, dir))
  478. break;
  479. /* Make sure each sg start address (except first sg) is
  480. * page-aligned and end address (except last sg) is also
  481. * page-aligned.
  482. */
  483. if (i == 0) {
  484. if (!IS_ALIGNED(s->offset + s->length,
  485. CI_HDRC_PAGE_SIZE))
  486. break;
  487. } else {
  488. if (s->offset)
  489. break;
  490. if (!sg_is_last(s) && !IS_ALIGNED(s->length,
  491. CI_HDRC_PAGE_SIZE))
  492. break;
  493. }
  494. }
  495. return i;
  496. }
  497. static int sglist_do_bounce(struct ci_hw_req *hwreq, int index,
  498. bool copy, unsigned int *bounced)
  499. {
  500. void *buf;
  501. int i, ret, nents, num_sgs;
  502. unsigned int rest, rounded;
  503. struct scatterlist *sg, *src, *dst;
  504. nents = index + 1;
  505. ret = sg_alloc_table(&hwreq->sgt, nents, GFP_KERNEL);
  506. if (ret)
  507. return ret;
  508. sg = src = hwreq->req.sg;
  509. num_sgs = hwreq->req.num_sgs;
  510. rest = hwreq->req.length;
  511. dst = hwreq->sgt.sgl;
  512. for (i = 0; i < index; i++) {
  513. memcpy(dst, src, sizeof(*src));
  514. rest -= src->length;
  515. src = sg_next(src);
  516. dst = sg_next(dst);
  517. }
  518. /* create one bounce buffer */
  519. rounded = round_up(rest, CI_HDRC_PAGE_SIZE);
  520. buf = kmalloc(rounded, GFP_KERNEL);
  521. if (!buf) {
  522. sg_free_table(&hwreq->sgt);
  523. return -ENOMEM;
  524. }
  525. sg_set_buf(dst, buf, rounded);
  526. hwreq->req.sg = hwreq->sgt.sgl;
  527. hwreq->req.num_sgs = nents;
  528. hwreq->sgt.sgl = sg;
  529. hwreq->sgt.nents = num_sgs;
  530. if (copy)
  531. sg_copy_to_buffer(src, num_sgs - index, buf, rest);
  532. *bounced = rest;
  533. return 0;
  534. }
  535. static void sglist_do_debounce(struct ci_hw_req *hwreq, bool copy)
  536. {
  537. void *buf;
  538. int i, nents, num_sgs;
  539. struct scatterlist *sg, *src, *dst;
  540. sg = hwreq->req.sg;
  541. num_sgs = hwreq->req.num_sgs;
  542. src = sg_last(sg, num_sgs);
  543. buf = sg_virt(src);
  544. if (copy) {
  545. dst = hwreq->sgt.sgl;
  546. for (i = 0; i < num_sgs - 1; i++)
  547. dst = sg_next(dst);
  548. nents = hwreq->sgt.nents - num_sgs + 1;
  549. sg_copy_from_buffer(dst, nents, buf, sg_dma_len(src));
  550. }
  551. hwreq->req.sg = hwreq->sgt.sgl;
  552. hwreq->req.num_sgs = hwreq->sgt.nents;
  553. hwreq->sgt.sgl = sg;
  554. hwreq->sgt.nents = num_sgs;
  555. kfree(buf);
  556. sg_free_table(&hwreq->sgt);
  557. }
  558. /**
  559. * _hardware_enqueue: configures a request at hardware level
  560. * @hwep: endpoint
  561. * @hwreq: request
  562. *
  563. * This function returns an error code
  564. */
  565. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  566. {
  567. struct ci_hdrc *ci = hwep->ci;
  568. int ret = 0;
  569. struct td_node *firstnode, *lastnode;
  570. unsigned int bounced_size;
  571. struct scatterlist *sg;
  572. /* don't queue twice */
  573. if (hwreq->req.status == -EALREADY)
  574. return -EALREADY;
  575. hwreq->req.status = -EALREADY;
  576. if (hwreq->req.num_sgs && hwreq->req.length &&
  577. ci->has_short_pkt_limit) {
  578. ret = sglist_get_invalid_entry(ci->dev->parent, hwep->dir,
  579. &hwreq->req);
  580. if (ret < hwreq->req.num_sgs) {
  581. ret = sglist_do_bounce(hwreq, ret, hwep->dir == TX,
  582. &bounced_size);
  583. if (ret)
  584. return ret;
  585. }
  586. }
  587. ret = usb_gadget_map_request_by_dev(ci->dev->parent,
  588. &hwreq->req, hwep->dir);
  589. if (ret)
  590. return ret;
  591. if (hwreq->sgt.sgl) {
  592. /* We've mapped a bigger buffer, now recover the actual size */
  593. sg = sg_last(hwreq->req.sg, hwreq->req.num_sgs);
  594. sg_dma_len(sg) = min(sg_dma_len(sg), bounced_size);
  595. }
  596. if (hwreq->req.num_mapped_sgs)
  597. ret = prepare_td_for_sg(hwep, hwreq);
  598. else
  599. ret = prepare_td_for_non_sg(hwep, hwreq);
  600. if (ret)
  601. return ret;
  602. lastnode = list_entry(hwreq->tds.prev,
  603. struct td_node, td);
  604. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  605. if (!hwreq->req.no_interrupt)
  606. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  607. list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
  608. trace_ci_prepare_td(hwep, hwreq, firstnode);
  609. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  610. wmb();
  611. hwreq->req.actual = 0;
  612. if (!list_empty(&hwep->qh.queue)) {
  613. struct ci_hw_req *hwreqprev;
  614. int n = hw_ep_bit(hwep->num, hwep->dir);
  615. int tmp_stat;
  616. struct td_node *prevlastnode;
  617. u32 next = firstnode->dma & TD_ADDR_MASK;
  618. hwreqprev = list_entry(hwep->qh.queue.prev,
  619. struct ci_hw_req, queue);
  620. prevlastnode = list_entry(hwreqprev->tds.prev,
  621. struct td_node, td);
  622. prevlastnode->ptr->next = cpu_to_le32(next);
  623. wmb();
  624. if (ci->rev == CI_REVISION_22) {
  625. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  626. reprime_dtd(ci, hwep, prevlastnode);
  627. }
  628. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  629. goto done;
  630. do {
  631. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  632. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  633. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  634. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  635. if (tmp_stat)
  636. goto done;
  637. }
  638. /* QH configuration */
  639. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  640. hwep->qh.ptr->td.token &=
  641. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  642. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  643. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  644. if (hwreq->req.length == 0
  645. || hwreq->req.length % hwep->ep.maxpacket)
  646. mul++;
  647. hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
  648. }
  649. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  650. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  651. done:
  652. return ret;
  653. }
  654. /**
  655. * free_pending_td: remove a pending request for the endpoint
  656. * @hwep: endpoint
  657. */
  658. static void free_pending_td(struct ci_hw_ep *hwep)
  659. {
  660. struct td_node *pending = hwep->pending_td;
  661. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  662. hwep->pending_td = NULL;
  663. kfree(pending);
  664. }
  665. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  666. struct td_node *node)
  667. {
  668. hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
  669. hwep->qh.ptr->td.token &=
  670. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  671. return hw_ep_prime(ci, hwep->num, hwep->dir,
  672. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  673. }
  674. /**
  675. * _hardware_dequeue: handles a request at hardware level
  676. * @hwep: endpoint
  677. * @hwreq: request
  678. *
  679. * This function returns an error code
  680. */
  681. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  682. {
  683. u32 tmptoken;
  684. struct td_node *node, *tmpnode;
  685. unsigned remaining_length;
  686. unsigned actual = hwreq->req.length;
  687. struct ci_hdrc *ci = hwep->ci;
  688. if (hwreq->req.status != -EALREADY)
  689. return -EINVAL;
  690. hwreq->req.status = 0;
  691. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  692. tmptoken = le32_to_cpu(node->ptr->token);
  693. trace_ci_complete_td(hwep, hwreq, node);
  694. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  695. int n = hw_ep_bit(hwep->num, hwep->dir);
  696. if (ci->rev == CI_REVISION_24 ||
  697. ci->rev == CI_REVISION_22)
  698. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  699. reprime_dtd(ci, hwep, node);
  700. hwreq->req.status = -EALREADY;
  701. return -EBUSY;
  702. }
  703. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  704. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  705. actual -= remaining_length;
  706. hwreq->req.status = tmptoken & TD_STATUS;
  707. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  708. hwreq->req.status = -EPIPE;
  709. break;
  710. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  711. hwreq->req.status = -EPROTO;
  712. break;
  713. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  714. hwreq->req.status = -EILSEQ;
  715. break;
  716. }
  717. if (remaining_length) {
  718. if (hwep->dir == TX) {
  719. hwreq->req.status = -EPROTO;
  720. break;
  721. }
  722. }
  723. /*
  724. * As the hardware could still address the freed td
  725. * which will run the udc unusable, the cleanup of the
  726. * td has to be delayed by one.
  727. */
  728. if (hwep->pending_td)
  729. free_pending_td(hwep);
  730. hwep->pending_td = node;
  731. list_del_init(&node->td);
  732. }
  733. usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
  734. &hwreq->req, hwep->dir);
  735. /* sglist bounced */
  736. if (hwreq->sgt.sgl)
  737. sglist_do_debounce(hwreq, hwep->dir == RX);
  738. hwreq->req.actual += actual;
  739. if (hwreq->req.status)
  740. return hwreq->req.status;
  741. return hwreq->req.actual;
  742. }
  743. /**
  744. * _ep_nuke: dequeues all endpoint requests
  745. * @hwep: endpoint
  746. *
  747. * This function returns an error code
  748. * Caller must hold lock
  749. */
  750. static int _ep_nuke(struct ci_hw_ep *hwep)
  751. __releases(hwep->lock)
  752. __acquires(hwep->lock)
  753. {
  754. struct td_node *node, *tmpnode;
  755. if (hwep == NULL)
  756. return -EINVAL;
  757. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  758. while (!list_empty(&hwep->qh.queue)) {
  759. /* pop oldest request */
  760. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  761. struct ci_hw_req, queue);
  762. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  763. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  764. list_del_init(&node->td);
  765. node->ptr = NULL;
  766. kfree(node);
  767. }
  768. list_del_init(&hwreq->queue);
  769. hwreq->req.status = -ESHUTDOWN;
  770. if (hwreq->req.complete != NULL) {
  771. spin_unlock(hwep->lock);
  772. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  773. spin_lock(hwep->lock);
  774. }
  775. }
  776. if (hwep->pending_td)
  777. free_pending_td(hwep);
  778. return 0;
  779. }
  780. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  781. {
  782. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  783. int direction, retval = 0;
  784. unsigned long flags;
  785. if (ep == NULL || hwep->ep.desc == NULL)
  786. return -EINVAL;
  787. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  788. return -EOPNOTSUPP;
  789. spin_lock_irqsave(hwep->lock, flags);
  790. if (value && hwep->dir == TX && check_transfer &&
  791. !list_empty(&hwep->qh.queue) &&
  792. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  793. spin_unlock_irqrestore(hwep->lock, flags);
  794. return -EAGAIN;
  795. }
  796. direction = hwep->dir;
  797. do {
  798. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  799. if (!value)
  800. hwep->wedge = 0;
  801. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  802. hwep->dir = (hwep->dir == TX) ? RX : TX;
  803. } while (hwep->dir != direction);
  804. spin_unlock_irqrestore(hwep->lock, flags);
  805. return retval;
  806. }
  807. /**
  808. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  809. * @gadget: gadget
  810. *
  811. * This function returns an error code
  812. */
  813. static int _gadget_stop_activity(struct usb_gadget *gadget)
  814. {
  815. struct usb_ep *ep;
  816. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  817. unsigned long flags;
  818. /* flush all endpoints */
  819. gadget_for_each_ep(ep, gadget) {
  820. usb_ep_fifo_flush(ep);
  821. }
  822. usb_ep_fifo_flush(&ci->ep0out->ep);
  823. usb_ep_fifo_flush(&ci->ep0in->ep);
  824. /* make sure to disable all endpoints */
  825. gadget_for_each_ep(ep, gadget) {
  826. usb_ep_disable(ep);
  827. }
  828. if (ci->status != NULL) {
  829. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  830. ci->status = NULL;
  831. }
  832. spin_lock_irqsave(&ci->lock, flags);
  833. ci->gadget.speed = USB_SPEED_UNKNOWN;
  834. ci->remote_wakeup = 0;
  835. ci->suspended = 0;
  836. spin_unlock_irqrestore(&ci->lock, flags);
  837. return 0;
  838. }
  839. /******************************************************************************
  840. * ISR block
  841. *****************************************************************************/
  842. /**
  843. * isr_reset_handler: USB reset interrupt handler
  844. * @ci: UDC device
  845. *
  846. * This function resets USB engine after a bus reset occurred
  847. */
  848. static void isr_reset_handler(struct ci_hdrc *ci)
  849. __releases(ci->lock)
  850. __acquires(ci->lock)
  851. {
  852. int retval;
  853. u32 intr;
  854. spin_unlock(&ci->lock);
  855. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  856. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  857. retval = _gadget_stop_activity(&ci->gadget);
  858. if (retval)
  859. goto done;
  860. retval = hw_usb_reset(ci);
  861. if (retval)
  862. goto done;
  863. /* clear SLI */
  864. hw_write(ci, OP_USBSTS, USBi_SLI, USBi_SLI);
  865. intr = hw_read(ci, OP_USBINTR, ~0);
  866. hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);
  867. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  868. if (ci->status == NULL)
  869. retval = -ENOMEM;
  870. done:
  871. spin_lock(&ci->lock);
  872. if (retval)
  873. dev_err(ci->dev, "error: %i\n", retval);
  874. }
  875. /**
  876. * isr_get_status_complete: get_status request complete function
  877. * @ep: endpoint
  878. * @req: request handled
  879. *
  880. * Caller must release lock
  881. */
  882. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  883. {
  884. if (ep == NULL || req == NULL)
  885. return;
  886. kfree(req->buf);
  887. usb_ep_free_request(ep, req);
  888. }
  889. /**
  890. * _ep_queue: queues (submits) an I/O request to an endpoint
  891. * @ep: endpoint
  892. * @req: request
  893. * @gfp_flags: GFP flags (not used)
  894. *
  895. * Caller must hold lock
  896. * This function returns an error code
  897. */
  898. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  899. gfp_t __maybe_unused gfp_flags)
  900. {
  901. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  902. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  903. struct ci_hdrc *ci = hwep->ci;
  904. int retval = 0;
  905. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  906. return -EINVAL;
  907. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  908. if (req->length)
  909. hwep = (ci->ep0_dir == RX) ?
  910. ci->ep0out : ci->ep0in;
  911. if (!list_empty(&hwep->qh.queue)) {
  912. _ep_nuke(hwep);
  913. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  914. _usb_addr(hwep));
  915. }
  916. }
  917. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  918. hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
  919. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  920. return -EMSGSIZE;
  921. }
  922. if (ci->has_short_pkt_limit &&
  923. hwreq->req.length > CI_MAX_REQ_SIZE) {
  924. dev_err(hwep->ci->dev, "request length too big (max 16KB)\n");
  925. return -EMSGSIZE;
  926. }
  927. /* first nuke then test link, e.g. previous status has not sent */
  928. if (!list_empty(&hwreq->queue)) {
  929. dev_err(hwep->ci->dev, "request already in queue\n");
  930. return -EBUSY;
  931. }
  932. /* push request */
  933. hwreq->req.status = -EINPROGRESS;
  934. hwreq->req.actual = 0;
  935. retval = _hardware_enqueue(hwep, hwreq);
  936. if (retval == -EALREADY)
  937. retval = 0;
  938. if (!retval)
  939. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  940. return retval;
  941. }
  942. /**
  943. * isr_get_status_response: get_status request response
  944. * @ci: ci struct
  945. * @setup: setup request packet
  946. *
  947. * This function returns an error code
  948. */
  949. static int isr_get_status_response(struct ci_hdrc *ci,
  950. struct usb_ctrlrequest *setup)
  951. __releases(hwep->lock)
  952. __acquires(hwep->lock)
  953. {
  954. struct ci_hw_ep *hwep = ci->ep0in;
  955. struct usb_request *req = NULL;
  956. gfp_t gfp_flags = GFP_ATOMIC;
  957. int dir, num, retval;
  958. if (hwep == NULL || setup == NULL)
  959. return -EINVAL;
  960. spin_unlock(hwep->lock);
  961. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  962. spin_lock(hwep->lock);
  963. if (req == NULL)
  964. return -ENOMEM;
  965. req->complete = isr_get_status_complete;
  966. req->length = 2;
  967. req->buf = kzalloc(req->length, gfp_flags);
  968. if (req->buf == NULL) {
  969. retval = -ENOMEM;
  970. goto err_free_req;
  971. }
  972. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  973. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  974. ci->gadget.is_selfpowered;
  975. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  976. == USB_RECIP_ENDPOINT) {
  977. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  978. TX : RX;
  979. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  980. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  981. }
  982. /* else do nothing; reserved for future use */
  983. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  984. if (retval)
  985. goto err_free_buf;
  986. return 0;
  987. err_free_buf:
  988. kfree(req->buf);
  989. err_free_req:
  990. spin_unlock(hwep->lock);
  991. usb_ep_free_request(&hwep->ep, req);
  992. spin_lock(hwep->lock);
  993. return retval;
  994. }
  995. /**
  996. * isr_setup_status_complete: setup_status request complete function
  997. * @ep: endpoint
  998. * @req: request handled
  999. *
  1000. * Caller must release lock. Put the port in test mode if test mode
  1001. * feature is selected.
  1002. */
  1003. static void
  1004. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  1005. {
  1006. struct ci_hdrc *ci = req->context;
  1007. unsigned long flags;
  1008. if (req->status < 0)
  1009. return;
  1010. if (ci->setaddr) {
  1011. hw_usb_set_address(ci, ci->address);
  1012. ci->setaddr = false;
  1013. if (ci->address)
  1014. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  1015. }
  1016. spin_lock_irqsave(&ci->lock, flags);
  1017. if (ci->test_mode)
  1018. hw_port_test_set(ci, ci->test_mode);
  1019. spin_unlock_irqrestore(&ci->lock, flags);
  1020. }
  1021. /**
  1022. * isr_setup_status_phase: queues the status phase of a setup transation
  1023. * @ci: ci struct
  1024. *
  1025. * This function returns an error code
  1026. */
  1027. static int isr_setup_status_phase(struct ci_hdrc *ci)
  1028. {
  1029. struct ci_hw_ep *hwep;
  1030. /*
  1031. * Unexpected USB controller behavior, caused by bad signal integrity
  1032. * or ground reference problems, can lead to isr_setup_status_phase
  1033. * being called with ci->status equal to NULL.
  1034. * If this situation occurs, you should review your USB hardware design.
  1035. */
  1036. if (WARN_ON_ONCE(!ci->status))
  1037. return -EPIPE;
  1038. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  1039. ci->status->context = ci;
  1040. ci->status->complete = isr_setup_status_complete;
  1041. return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  1042. }
  1043. /**
  1044. * isr_tr_complete_low: transaction complete low level handler
  1045. * @hwep: endpoint
  1046. *
  1047. * This function returns an error code
  1048. * Caller must hold lock
  1049. */
  1050. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  1051. __releases(hwep->lock)
  1052. __acquires(hwep->lock)
  1053. {
  1054. struct ci_hw_req *hwreq, *hwreqtemp;
  1055. struct ci_hw_ep *hweptemp = hwep;
  1056. int retval = 0;
  1057. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  1058. queue) {
  1059. retval = _hardware_dequeue(hwep, hwreq);
  1060. if (retval < 0)
  1061. break;
  1062. list_del_init(&hwreq->queue);
  1063. if (hwreq->req.complete != NULL) {
  1064. spin_unlock(hwep->lock);
  1065. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  1066. hwreq->req.length)
  1067. hweptemp = hwep->ci->ep0in;
  1068. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  1069. spin_lock(hwep->lock);
  1070. }
  1071. }
  1072. if (retval == -EBUSY)
  1073. retval = 0;
  1074. return retval;
  1075. }
  1076. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  1077. {
  1078. dev_warn(&ci->gadget.dev,
  1079. "connect the device to an alternate port if you want HNP\n");
  1080. return isr_setup_status_phase(ci);
  1081. }
  1082. /**
  1083. * isr_setup_packet_handler: setup packet handler
  1084. * @ci: UDC descriptor
  1085. *
  1086. * This function handles setup packet
  1087. */
  1088. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  1089. __releases(ci->lock)
  1090. __acquires(ci->lock)
  1091. {
  1092. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  1093. struct usb_ctrlrequest req;
  1094. int type, num, dir, err = -EINVAL;
  1095. u8 tmode = 0;
  1096. /*
  1097. * Flush data and handshake transactions of previous
  1098. * setup packet.
  1099. */
  1100. _ep_nuke(ci->ep0out);
  1101. _ep_nuke(ci->ep0in);
  1102. /* read_setup_packet */
  1103. do {
  1104. hw_test_and_set_setup_guard(ci);
  1105. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  1106. } while (!hw_test_and_clear_setup_guard(ci));
  1107. type = req.bRequestType;
  1108. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  1109. switch (req.bRequest) {
  1110. case USB_REQ_CLEAR_FEATURE:
  1111. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  1112. le16_to_cpu(req.wValue) ==
  1113. USB_ENDPOINT_HALT) {
  1114. if (req.wLength != 0)
  1115. break;
  1116. num = le16_to_cpu(req.wIndex);
  1117. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  1118. num &= USB_ENDPOINT_NUMBER_MASK;
  1119. if (dir == TX)
  1120. num += ci->hw_ep_max / 2;
  1121. if (!ci->ci_hw_ep[num].wedge) {
  1122. spin_unlock(&ci->lock);
  1123. err = usb_ep_clear_halt(
  1124. &ci->ci_hw_ep[num].ep);
  1125. spin_lock(&ci->lock);
  1126. if (err)
  1127. break;
  1128. }
  1129. err = isr_setup_status_phase(ci);
  1130. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  1131. le16_to_cpu(req.wValue) ==
  1132. USB_DEVICE_REMOTE_WAKEUP) {
  1133. if (req.wLength != 0)
  1134. break;
  1135. ci->remote_wakeup = 0;
  1136. err = isr_setup_status_phase(ci);
  1137. } else {
  1138. goto delegate;
  1139. }
  1140. break;
  1141. case USB_REQ_GET_STATUS:
  1142. if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
  1143. le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
  1144. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  1145. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  1146. goto delegate;
  1147. if (le16_to_cpu(req.wLength) != 2 ||
  1148. le16_to_cpu(req.wValue) != 0)
  1149. break;
  1150. err = isr_get_status_response(ci, &req);
  1151. break;
  1152. case USB_REQ_SET_ADDRESS:
  1153. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  1154. goto delegate;
  1155. if (le16_to_cpu(req.wLength) != 0 ||
  1156. le16_to_cpu(req.wIndex) != 0)
  1157. break;
  1158. ci->address = (u8)le16_to_cpu(req.wValue);
  1159. ci->setaddr = true;
  1160. err = isr_setup_status_phase(ci);
  1161. break;
  1162. case USB_REQ_SET_FEATURE:
  1163. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  1164. le16_to_cpu(req.wValue) ==
  1165. USB_ENDPOINT_HALT) {
  1166. if (req.wLength != 0)
  1167. break;
  1168. num = le16_to_cpu(req.wIndex);
  1169. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  1170. num &= USB_ENDPOINT_NUMBER_MASK;
  1171. if (dir == TX)
  1172. num += ci->hw_ep_max / 2;
  1173. spin_unlock(&ci->lock);
  1174. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  1175. spin_lock(&ci->lock);
  1176. if (!err)
  1177. isr_setup_status_phase(ci);
  1178. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  1179. if (req.wLength != 0)
  1180. break;
  1181. switch (le16_to_cpu(req.wValue)) {
  1182. case USB_DEVICE_REMOTE_WAKEUP:
  1183. ci->remote_wakeup = 1;
  1184. err = isr_setup_status_phase(ci);
  1185. break;
  1186. case USB_DEVICE_TEST_MODE:
  1187. tmode = le16_to_cpu(req.wIndex) >> 8;
  1188. switch (tmode) {
  1189. case USB_TEST_J:
  1190. case USB_TEST_K:
  1191. case USB_TEST_SE0_NAK:
  1192. case USB_TEST_PACKET:
  1193. case USB_TEST_FORCE_ENABLE:
  1194. ci->test_mode = tmode;
  1195. err = isr_setup_status_phase(
  1196. ci);
  1197. break;
  1198. default:
  1199. break;
  1200. }
  1201. break;
  1202. case USB_DEVICE_B_HNP_ENABLE:
  1203. if (ci_otg_is_fsm_mode(ci)) {
  1204. ci->gadget.b_hnp_enable = 1;
  1205. err = isr_setup_status_phase(
  1206. ci);
  1207. }
  1208. break;
  1209. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  1210. if (ci_otg_is_fsm_mode(ci))
  1211. err = otg_a_alt_hnp_support(ci);
  1212. break;
  1213. case USB_DEVICE_A_HNP_SUPPORT:
  1214. if (ci_otg_is_fsm_mode(ci)) {
  1215. ci->gadget.a_hnp_support = 1;
  1216. err = isr_setup_status_phase(
  1217. ci);
  1218. }
  1219. break;
  1220. default:
  1221. goto delegate;
  1222. }
  1223. } else {
  1224. goto delegate;
  1225. }
  1226. break;
  1227. default:
  1228. delegate:
  1229. if (req.wLength == 0) /* no data phase */
  1230. ci->ep0_dir = TX;
  1231. spin_unlock(&ci->lock);
  1232. err = ci->driver->setup(&ci->gadget, &req);
  1233. spin_lock(&ci->lock);
  1234. break;
  1235. }
  1236. if (err < 0) {
  1237. spin_unlock(&ci->lock);
  1238. if (_ep_set_halt(&hwep->ep, 1, false))
  1239. dev_err(ci->dev, "error: _ep_set_halt\n");
  1240. spin_lock(&ci->lock);
  1241. }
  1242. }
  1243. /**
  1244. * isr_tr_complete_handler: transaction complete interrupt handler
  1245. * @ci: UDC descriptor
  1246. *
  1247. * This function handles traffic events
  1248. */
  1249. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1250. __releases(ci->lock)
  1251. __acquires(ci->lock)
  1252. {
  1253. unsigned i;
  1254. int err;
  1255. for (i = 0; i < ci->hw_ep_max; i++) {
  1256. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1257. if (hwep->ep.desc == NULL)
  1258. continue; /* not configured */
  1259. if (hw_test_and_clear_complete(ci, i)) {
  1260. err = isr_tr_complete_low(hwep);
  1261. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1262. if (err > 0) /* needs status phase */
  1263. err = isr_setup_status_phase(ci);
  1264. if (err < 0) {
  1265. spin_unlock(&ci->lock);
  1266. if (_ep_set_halt(&hwep->ep, 1, false))
  1267. dev_err(ci->dev,
  1268. "error: _ep_set_halt\n");
  1269. spin_lock(&ci->lock);
  1270. }
  1271. }
  1272. }
  1273. /* Only handle setup packet below */
  1274. if (i == 0 &&
  1275. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1276. isr_setup_packet_handler(ci);
  1277. }
  1278. }
  1279. /******************************************************************************
  1280. * ENDPT block
  1281. *****************************************************************************/
  1282. /*
  1283. * ep_enable: configure endpoint, making it usable
  1284. *
  1285. * Check usb_ep_enable() at "usb_gadget.h" for details
  1286. */
  1287. static int ep_enable(struct usb_ep *ep,
  1288. const struct usb_endpoint_descriptor *desc)
  1289. {
  1290. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1291. int retval = 0;
  1292. unsigned long flags;
  1293. u32 cap = 0;
  1294. if (ep == NULL || desc == NULL)
  1295. return -EINVAL;
  1296. spin_lock_irqsave(hwep->lock, flags);
  1297. /* only internal SW should enable ctrl endpts */
  1298. if (!list_empty(&hwep->qh.queue)) {
  1299. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1300. spin_unlock_irqrestore(hwep->lock, flags);
  1301. return -EBUSY;
  1302. }
  1303. hwep->ep.desc = desc;
  1304. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1305. hwep->num = usb_endpoint_num(desc);
  1306. hwep->type = usb_endpoint_type(desc);
  1307. hwep->ep.maxpacket = usb_endpoint_maxp(desc);
  1308. hwep->ep.mult = usb_endpoint_maxp_mult(desc);
  1309. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1310. cap |= QH_IOS;
  1311. cap |= QH_ZLT;
  1312. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1313. /*
  1314. * For ISO-TX, we set mult at QH as the largest value, and use
  1315. * MultO at TD as real mult value.
  1316. */
  1317. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1318. cap |= 3 << __ffs(QH_MULT);
  1319. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1320. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1321. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1322. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1323. retval = -EINVAL;
  1324. }
  1325. /*
  1326. * Enable endpoints in the HW other than ep0 as ep0
  1327. * is always enabled
  1328. */
  1329. if (hwep->num)
  1330. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1331. hwep->type);
  1332. spin_unlock_irqrestore(hwep->lock, flags);
  1333. return retval;
  1334. }
  1335. /*
  1336. * ep_disable: endpoint is no longer usable
  1337. *
  1338. * Check usb_ep_disable() at "usb_gadget.h" for details
  1339. */
  1340. static int ep_disable(struct usb_ep *ep)
  1341. {
  1342. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1343. int direction, retval = 0;
  1344. unsigned long flags;
  1345. if (ep == NULL)
  1346. return -EINVAL;
  1347. else if (hwep->ep.desc == NULL)
  1348. return -EBUSY;
  1349. spin_lock_irqsave(hwep->lock, flags);
  1350. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1351. spin_unlock_irqrestore(hwep->lock, flags);
  1352. return 0;
  1353. }
  1354. /* only internal SW should disable ctrl endpts */
  1355. direction = hwep->dir;
  1356. do {
  1357. retval |= _ep_nuke(hwep);
  1358. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1359. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1360. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1361. } while (hwep->dir != direction);
  1362. hwep->ep.desc = NULL;
  1363. spin_unlock_irqrestore(hwep->lock, flags);
  1364. return retval;
  1365. }
  1366. /*
  1367. * ep_alloc_request: allocate a request object to use with this endpoint
  1368. *
  1369. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1370. */
  1371. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1372. {
  1373. struct ci_hw_req *hwreq;
  1374. if (ep == NULL)
  1375. return NULL;
  1376. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1377. if (hwreq != NULL) {
  1378. INIT_LIST_HEAD(&hwreq->queue);
  1379. INIT_LIST_HEAD(&hwreq->tds);
  1380. }
  1381. return (hwreq == NULL) ? NULL : &hwreq->req;
  1382. }
  1383. /*
  1384. * ep_free_request: frees a request object
  1385. *
  1386. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1387. */
  1388. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1389. {
  1390. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1391. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1392. struct td_node *node, *tmpnode;
  1393. unsigned long flags;
  1394. if (ep == NULL || req == NULL) {
  1395. return;
  1396. } else if (!list_empty(&hwreq->queue)) {
  1397. dev_err(hwep->ci->dev, "freeing queued request\n");
  1398. return;
  1399. }
  1400. spin_lock_irqsave(hwep->lock, flags);
  1401. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1402. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1403. list_del_init(&node->td);
  1404. node->ptr = NULL;
  1405. kfree(node);
  1406. }
  1407. kfree(hwreq);
  1408. spin_unlock_irqrestore(hwep->lock, flags);
  1409. }
  1410. /*
  1411. * ep_queue: queues (submits) an I/O request to an endpoint
  1412. *
  1413. * Check usb_ep_queue()* at usb_gadget.h" for details
  1414. */
  1415. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1416. gfp_t __maybe_unused gfp_flags)
  1417. {
  1418. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1419. int retval = 0;
  1420. unsigned long flags;
  1421. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1422. return -EINVAL;
  1423. spin_lock_irqsave(hwep->lock, flags);
  1424. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1425. spin_unlock_irqrestore(hwep->lock, flags);
  1426. return 0;
  1427. }
  1428. retval = _ep_queue(ep, req, gfp_flags);
  1429. spin_unlock_irqrestore(hwep->lock, flags);
  1430. return retval;
  1431. }
  1432. /*
  1433. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1434. *
  1435. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1436. */
  1437. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1438. {
  1439. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1440. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1441. unsigned long flags;
  1442. struct td_node *node, *tmpnode;
  1443. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1444. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1445. list_empty(&hwep->qh.queue))
  1446. return -EINVAL;
  1447. spin_lock_irqsave(hwep->lock, flags);
  1448. if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
  1449. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1450. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1451. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1452. list_del(&node->td);
  1453. kfree(node);
  1454. }
  1455. /* pop request */
  1456. list_del_init(&hwreq->queue);
  1457. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1458. if (hwreq->sgt.sgl)
  1459. sglist_do_debounce(hwreq, false);
  1460. req->status = -ECONNRESET;
  1461. if (hwreq->req.complete != NULL) {
  1462. spin_unlock(hwep->lock);
  1463. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1464. spin_lock(hwep->lock);
  1465. }
  1466. spin_unlock_irqrestore(hwep->lock, flags);
  1467. return 0;
  1468. }
  1469. /*
  1470. * ep_set_halt: sets the endpoint halt feature
  1471. *
  1472. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1473. */
  1474. static int ep_set_halt(struct usb_ep *ep, int value)
  1475. {
  1476. return _ep_set_halt(ep, value, true);
  1477. }
  1478. /*
  1479. * ep_set_wedge: sets the halt feature and ignores clear requests
  1480. *
  1481. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1482. */
  1483. static int ep_set_wedge(struct usb_ep *ep)
  1484. {
  1485. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1486. unsigned long flags;
  1487. if (ep == NULL || hwep->ep.desc == NULL)
  1488. return -EINVAL;
  1489. spin_lock_irqsave(hwep->lock, flags);
  1490. hwep->wedge = 1;
  1491. spin_unlock_irqrestore(hwep->lock, flags);
  1492. return usb_ep_set_halt(ep);
  1493. }
  1494. /*
  1495. * ep_fifo_flush: flushes contents of a fifo
  1496. *
  1497. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1498. */
  1499. static void ep_fifo_flush(struct usb_ep *ep)
  1500. {
  1501. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1502. unsigned long flags;
  1503. if (ep == NULL) {
  1504. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1505. return;
  1506. }
  1507. spin_lock_irqsave(hwep->lock, flags);
  1508. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1509. spin_unlock_irqrestore(hwep->lock, flags);
  1510. return;
  1511. }
  1512. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1513. spin_unlock_irqrestore(hwep->lock, flags);
  1514. }
  1515. /*
  1516. * Endpoint-specific part of the API to the USB controller hardware
  1517. * Check "usb_gadget.h" for details
  1518. */
  1519. static const struct usb_ep_ops usb_ep_ops = {
  1520. .enable = ep_enable,
  1521. .disable = ep_disable,
  1522. .alloc_request = ep_alloc_request,
  1523. .free_request = ep_free_request,
  1524. .queue = ep_queue,
  1525. .dequeue = ep_dequeue,
  1526. .set_halt = ep_set_halt,
  1527. .set_wedge = ep_set_wedge,
  1528. .fifo_flush = ep_fifo_flush,
  1529. };
  1530. /******************************************************************************
  1531. * GADGET block
  1532. *****************************************************************************/
  1533. static int ci_udc_get_frame(struct usb_gadget *_gadget)
  1534. {
  1535. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1536. unsigned long flags;
  1537. int ret;
  1538. spin_lock_irqsave(&ci->lock, flags);
  1539. ret = hw_read(ci, OP_FRINDEX, 0x3fff);
  1540. spin_unlock_irqrestore(&ci->lock, flags);
  1541. return ret >> 3;
  1542. }
  1543. /*
  1544. * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
  1545. */
  1546. static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
  1547. {
  1548. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1549. if (is_active) {
  1550. pm_runtime_get_sync(ci->dev);
  1551. hw_device_reset(ci);
  1552. spin_lock_irq(&ci->lock);
  1553. if (ci->driver) {
  1554. hw_device_state(ci, ci->ep0out->qh.dma);
  1555. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1556. spin_unlock_irq(&ci->lock);
  1557. usb_udc_vbus_handler(_gadget, true);
  1558. } else {
  1559. spin_unlock_irq(&ci->lock);
  1560. }
  1561. } else {
  1562. usb_udc_vbus_handler(_gadget, false);
  1563. if (ci->driver)
  1564. ci->driver->disconnect(&ci->gadget);
  1565. hw_device_state(ci, 0);
  1566. if (ci->platdata->notify_event)
  1567. ci->platdata->notify_event(ci,
  1568. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1569. _gadget_stop_activity(&ci->gadget);
  1570. pm_runtime_put_sync(ci->dev);
  1571. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1572. }
  1573. }
  1574. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1575. {
  1576. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1577. unsigned long flags;
  1578. int ret = 0;
  1579. spin_lock_irqsave(&ci->lock, flags);
  1580. ci->vbus_active = is_active;
  1581. spin_unlock_irqrestore(&ci->lock, flags);
  1582. if (ci->usb_phy)
  1583. usb_phy_set_charger_state(ci->usb_phy, is_active ?
  1584. USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
  1585. if (ci->platdata->notify_event)
  1586. ret = ci->platdata->notify_event(ci,
  1587. CI_HDRC_CONTROLLER_VBUS_EVENT);
  1588. if (ci->usb_phy) {
  1589. if (is_active)
  1590. usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS);
  1591. else
  1592. usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE);
  1593. }
  1594. if (ci->driver)
  1595. ci_hdrc_gadget_connect(_gadget, is_active);
  1596. return ret;
  1597. }
  1598. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1599. {
  1600. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1601. unsigned long flags;
  1602. int ret = 0;
  1603. spin_lock_irqsave(&ci->lock, flags);
  1604. if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1605. spin_unlock_irqrestore(&ci->lock, flags);
  1606. return 0;
  1607. }
  1608. if (!ci->remote_wakeup) {
  1609. ret = -EOPNOTSUPP;
  1610. goto out;
  1611. }
  1612. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1613. ret = -EINVAL;
  1614. goto out;
  1615. }
  1616. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1617. out:
  1618. spin_unlock_irqrestore(&ci->lock, flags);
  1619. return ret;
  1620. }
  1621. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1622. {
  1623. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1624. if (ci->usb_phy)
  1625. return usb_phy_set_power(ci->usb_phy, ma);
  1626. return -ENOTSUPP;
  1627. }
  1628. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1629. {
  1630. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1631. struct ci_hw_ep *hwep = ci->ep0in;
  1632. unsigned long flags;
  1633. spin_lock_irqsave(hwep->lock, flags);
  1634. _gadget->is_selfpowered = (is_on != 0);
  1635. spin_unlock_irqrestore(hwep->lock, flags);
  1636. return 0;
  1637. }
  1638. /* Change Data+ pullup status
  1639. * this func is used by usb_gadget_connect/disconnect
  1640. */
  1641. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1642. {
  1643. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1644. /*
  1645. * Data+ pullup controlled by OTG state machine in OTG fsm mode;
  1646. * and don't touch Data+ in host mode for dual role config.
  1647. */
  1648. if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
  1649. return 0;
  1650. pm_runtime_get_sync(ci->dev);
  1651. if (is_on)
  1652. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1653. else
  1654. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1655. pm_runtime_put_sync(ci->dev);
  1656. return 0;
  1657. }
  1658. static int ci_udc_start(struct usb_gadget *gadget,
  1659. struct usb_gadget_driver *driver);
  1660. static int ci_udc_stop(struct usb_gadget *gadget);
  1661. /* Match ISOC IN from the highest endpoint */
  1662. static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
  1663. struct usb_endpoint_descriptor *desc,
  1664. struct usb_ss_ep_comp_descriptor *comp_desc)
  1665. {
  1666. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1667. struct usb_ep *ep;
  1668. if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
  1669. list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
  1670. if (ep->caps.dir_in && !ep->claimed)
  1671. return ep;
  1672. }
  1673. }
  1674. return NULL;
  1675. }
  1676. /*
  1677. * Device operations part of the API to the USB controller hardware,
  1678. * which don't involve endpoints (or i/o)
  1679. * Check "usb_gadget.h" for details
  1680. */
  1681. static const struct usb_gadget_ops usb_gadget_ops = {
  1682. .get_frame = ci_udc_get_frame,
  1683. .vbus_session = ci_udc_vbus_session,
  1684. .wakeup = ci_udc_wakeup,
  1685. .set_selfpowered = ci_udc_selfpowered,
  1686. .pullup = ci_udc_pullup,
  1687. .vbus_draw = ci_udc_vbus_draw,
  1688. .udc_start = ci_udc_start,
  1689. .udc_stop = ci_udc_stop,
  1690. .match_ep = ci_udc_match_ep,
  1691. };
  1692. static int init_eps(struct ci_hdrc *ci)
  1693. {
  1694. int retval = 0, i, j;
  1695. for (i = 0; i < ci->hw_ep_max/2; i++)
  1696. for (j = RX; j <= TX; j++) {
  1697. int k = i + j * ci->hw_ep_max/2;
  1698. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1699. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1700. (j == TX) ? "in" : "out");
  1701. hwep->ci = ci;
  1702. hwep->lock = &ci->lock;
  1703. hwep->td_pool = ci->td_pool;
  1704. hwep->ep.name = hwep->name;
  1705. hwep->ep.ops = &usb_ep_ops;
  1706. if (i == 0) {
  1707. hwep->ep.caps.type_control = true;
  1708. } else {
  1709. hwep->ep.caps.type_iso = true;
  1710. hwep->ep.caps.type_bulk = true;
  1711. hwep->ep.caps.type_int = true;
  1712. }
  1713. if (j == TX)
  1714. hwep->ep.caps.dir_in = true;
  1715. else
  1716. hwep->ep.caps.dir_out = true;
  1717. /*
  1718. * for ep0: maxP defined in desc, for other
  1719. * eps, maxP is set by epautoconfig() called
  1720. * by gadget layer
  1721. */
  1722. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1723. INIT_LIST_HEAD(&hwep->qh.queue);
  1724. hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
  1725. &hwep->qh.dma);
  1726. if (hwep->qh.ptr == NULL)
  1727. retval = -ENOMEM;
  1728. /*
  1729. * set up shorthands for ep0 out and in endpoints,
  1730. * don't add to gadget's ep_list
  1731. */
  1732. if (i == 0) {
  1733. if (j == RX)
  1734. ci->ep0out = hwep;
  1735. else
  1736. ci->ep0in = hwep;
  1737. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1738. continue;
  1739. }
  1740. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1741. }
  1742. return retval;
  1743. }
  1744. static void destroy_eps(struct ci_hdrc *ci)
  1745. {
  1746. int i;
  1747. for (i = 0; i < ci->hw_ep_max; i++) {
  1748. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1749. if (hwep->pending_td)
  1750. free_pending_td(hwep);
  1751. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1752. }
  1753. }
  1754. /**
  1755. * ci_udc_start: register a gadget driver
  1756. * @gadget: our gadget
  1757. * @driver: the driver being registered
  1758. *
  1759. * Interrupts are enabled here.
  1760. */
  1761. static int ci_udc_start(struct usb_gadget *gadget,
  1762. struct usb_gadget_driver *driver)
  1763. {
  1764. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1765. int retval;
  1766. if (driver->disconnect == NULL)
  1767. return -EINVAL;
  1768. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1769. retval = usb_ep_enable(&ci->ep0out->ep);
  1770. if (retval)
  1771. return retval;
  1772. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1773. retval = usb_ep_enable(&ci->ep0in->ep);
  1774. if (retval)
  1775. return retval;
  1776. ci->driver = driver;
  1777. /* Start otg fsm for B-device */
  1778. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1779. ci_hdrc_otg_fsm_start(ci);
  1780. return retval;
  1781. }
  1782. if (ci->vbus_active)
  1783. ci_hdrc_gadget_connect(gadget, 1);
  1784. else
  1785. usb_udc_vbus_handler(&ci->gadget, false);
  1786. return retval;
  1787. }
  1788. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1789. {
  1790. if (!ci_otg_is_fsm_mode(ci))
  1791. return;
  1792. mutex_lock(&ci->fsm.lock);
  1793. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1794. ci->fsm.a_bidl_adis_tmout = 1;
  1795. ci_hdrc_otg_fsm_start(ci);
  1796. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1797. ci->fsm.protocol = PROTO_UNDEF;
  1798. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1799. }
  1800. mutex_unlock(&ci->fsm.lock);
  1801. }
  1802. /*
  1803. * ci_udc_stop: unregister a gadget driver
  1804. */
  1805. static int ci_udc_stop(struct usb_gadget *gadget)
  1806. {
  1807. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1808. unsigned long flags;
  1809. spin_lock_irqsave(&ci->lock, flags);
  1810. ci->driver = NULL;
  1811. if (ci->vbus_active) {
  1812. hw_device_state(ci, 0);
  1813. spin_unlock_irqrestore(&ci->lock, flags);
  1814. if (ci->platdata->notify_event)
  1815. ci->platdata->notify_event(ci,
  1816. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1817. _gadget_stop_activity(&ci->gadget);
  1818. spin_lock_irqsave(&ci->lock, flags);
  1819. pm_runtime_put(ci->dev);
  1820. }
  1821. spin_unlock_irqrestore(&ci->lock, flags);
  1822. ci_udc_stop_for_otg_fsm(ci);
  1823. return 0;
  1824. }
  1825. /******************************************************************************
  1826. * BUS block
  1827. *****************************************************************************/
  1828. /*
  1829. * udc_irq: ci interrupt handler
  1830. *
  1831. * This function returns IRQ_HANDLED if the IRQ has been handled
  1832. * It locks access to registers
  1833. */
  1834. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1835. {
  1836. irqreturn_t retval;
  1837. u32 intr;
  1838. if (ci == NULL)
  1839. return IRQ_HANDLED;
  1840. spin_lock(&ci->lock);
  1841. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1842. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1843. USBMODE_CM_DC) {
  1844. spin_unlock(&ci->lock);
  1845. return IRQ_NONE;
  1846. }
  1847. }
  1848. intr = hw_test_and_clear_intr_active(ci);
  1849. if (intr) {
  1850. /* order defines priority - do NOT change it */
  1851. if (USBi_URI & intr)
  1852. isr_reset_handler(ci);
  1853. if (USBi_PCI & intr) {
  1854. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1855. USB_SPEED_HIGH : USB_SPEED_FULL;
  1856. if (ci->usb_phy)
  1857. usb_phy_set_event(ci->usb_phy,
  1858. USB_EVENT_ENUMERATED);
  1859. if (ci->suspended) {
  1860. if (ci->driver->resume) {
  1861. spin_unlock(&ci->lock);
  1862. ci->driver->resume(&ci->gadget);
  1863. spin_lock(&ci->lock);
  1864. }
  1865. ci->suspended = 0;
  1866. usb_gadget_set_state(&ci->gadget,
  1867. ci->resume_state);
  1868. }
  1869. }
  1870. if ((USBi_UI | USBi_UEI) & intr)
  1871. isr_tr_complete_handler(ci);
  1872. if ((USBi_SLI & intr) && !(ci->suspended)) {
  1873. ci->suspended = 1;
  1874. ci->resume_state = ci->gadget.state;
  1875. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1876. ci->driver->suspend) {
  1877. spin_unlock(&ci->lock);
  1878. ci->driver->suspend(&ci->gadget);
  1879. spin_lock(&ci->lock);
  1880. }
  1881. usb_gadget_set_state(&ci->gadget,
  1882. USB_STATE_SUSPENDED);
  1883. }
  1884. retval = IRQ_HANDLED;
  1885. } else {
  1886. retval = IRQ_NONE;
  1887. }
  1888. spin_unlock(&ci->lock);
  1889. return retval;
  1890. }
  1891. /**
  1892. * udc_start: initialize gadget role
  1893. * @ci: chipidea controller
  1894. */
  1895. static int udc_start(struct ci_hdrc *ci)
  1896. {
  1897. struct device *dev = ci->dev;
  1898. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1899. int retval = 0;
  1900. ci->gadget.ops = &usb_gadget_ops;
  1901. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1902. ci->gadget.max_speed = USB_SPEED_HIGH;
  1903. ci->gadget.name = ci->platdata->name;
  1904. ci->gadget.otg_caps = otg_caps;
  1905. ci->gadget.sg_supported = 1;
  1906. ci->gadget.irq = ci->irq;
  1907. if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
  1908. ci->gadget.quirk_avoids_skb_reserve = 1;
  1909. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1910. otg_caps->adp_support))
  1911. ci->gadget.is_otg = 1;
  1912. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1913. /* alloc resources */
  1914. ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
  1915. sizeof(struct ci_hw_qh),
  1916. 64, CI_HDRC_PAGE_SIZE);
  1917. if (ci->qh_pool == NULL)
  1918. return -ENOMEM;
  1919. ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
  1920. sizeof(struct ci_hw_td),
  1921. 64, CI_HDRC_PAGE_SIZE);
  1922. if (ci->td_pool == NULL) {
  1923. retval = -ENOMEM;
  1924. goto free_qh_pool;
  1925. }
  1926. retval = init_eps(ci);
  1927. if (retval)
  1928. goto free_pools;
  1929. ci->gadget.ep0 = &ci->ep0in->ep;
  1930. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1931. if (retval)
  1932. goto destroy_eps;
  1933. return retval;
  1934. destroy_eps:
  1935. destroy_eps(ci);
  1936. free_pools:
  1937. dma_pool_destroy(ci->td_pool);
  1938. free_qh_pool:
  1939. dma_pool_destroy(ci->qh_pool);
  1940. return retval;
  1941. }
  1942. /*
  1943. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1944. *
  1945. * No interrupts active, the IRQ has been released
  1946. */
  1947. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1948. {
  1949. if (!ci->roles[CI_ROLE_GADGET])
  1950. return;
  1951. usb_del_gadget_udc(&ci->gadget);
  1952. destroy_eps(ci);
  1953. dma_pool_destroy(ci->td_pool);
  1954. dma_pool_destroy(ci->qh_pool);
  1955. }
  1956. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1957. {
  1958. if (ci->platdata->pins_device)
  1959. pinctrl_select_state(ci->platdata->pctl,
  1960. ci->platdata->pins_device);
  1961. if (ci->is_otg)
  1962. /* Clear and enable BSV irq */
  1963. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1964. OTGSC_BSVIS | OTGSC_BSVIE);
  1965. return 0;
  1966. }
  1967. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1968. {
  1969. /*
  1970. * host doesn't care B_SESSION_VALID event
  1971. * so clear and disable BSV irq
  1972. */
  1973. if (ci->is_otg)
  1974. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1975. ci->vbus_active = 0;
  1976. if (ci->platdata->pins_device && ci->platdata->pins_default)
  1977. pinctrl_select_state(ci->platdata->pctl,
  1978. ci->platdata->pins_default);
  1979. }
  1980. #ifdef CONFIG_PM_SLEEP
  1981. static void udc_suspend(struct ci_hdrc *ci)
  1982. {
  1983. /*
  1984. * Set OP_ENDPTLISTADDR to be non-zero for
  1985. * checking if controller resume from power lost
  1986. * in non-host mode.
  1987. */
  1988. if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
  1989. hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
  1990. }
  1991. static void udc_resume(struct ci_hdrc *ci, bool power_lost)
  1992. {
  1993. if (power_lost) {
  1994. if (ci->is_otg)
  1995. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1996. OTGSC_BSVIS | OTGSC_BSVIE);
  1997. if (ci->vbus_active)
  1998. usb_gadget_vbus_disconnect(&ci->gadget);
  1999. }
  2000. /* Restore value 0 if it was set for power lost check */
  2001. if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
  2002. hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
  2003. }
  2004. #endif
  2005. /**
  2006. * ci_hdrc_gadget_init - initialize device related bits
  2007. * @ci: the controller
  2008. *
  2009. * This function initializes the gadget, if the device is "device capable".
  2010. */
  2011. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  2012. {
  2013. struct ci_role_driver *rdrv;
  2014. int ret;
  2015. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  2016. return -ENXIO;
  2017. rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
  2018. if (!rdrv)
  2019. return -ENOMEM;
  2020. rdrv->start = udc_id_switch_for_device;
  2021. rdrv->stop = udc_id_switch_for_host;
  2022. #ifdef CONFIG_PM_SLEEP
  2023. rdrv->suspend = udc_suspend;
  2024. rdrv->resume = udc_resume;
  2025. #endif
  2026. rdrv->irq = udc_irq;
  2027. rdrv->name = "gadget";
  2028. ret = udc_start(ci);
  2029. if (!ret)
  2030. ci->roles[CI_ROLE_GADGET] = rdrv;
  2031. return ret;
  2032. }