usbmisc_imx.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2012 Freescale Semiconductor, Inc.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/of.h>
  7. #include <linux/err.h>
  8. #include <linux/io.h>
  9. #include <linux/delay.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/usb/otg.h>
  12. #include "ci_hdrc_imx.h"
  13. #define MX25_USB_PHY_CTRL_OFFSET 0x08
  14. #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
  15. #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
  16. #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
  17. #define MX25_EHCI_INTERFACE_MASK (0xf)
  18. #define MX25_OTG_SIC_SHIFT 29
  19. #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
  20. #define MX25_OTG_PM_BIT BIT(24)
  21. #define MX25_OTG_PP_BIT BIT(11)
  22. #define MX25_OTG_OCPOL_BIT BIT(3)
  23. #define MX25_H1_SIC_SHIFT 21
  24. #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
  25. #define MX25_H1_PP_BIT BIT(18)
  26. #define MX25_H1_PM_BIT BIT(16)
  27. #define MX25_H1_IPPUE_UP_BIT BIT(7)
  28. #define MX25_H1_IPPUE_DOWN_BIT BIT(6)
  29. #define MX25_H1_TLL_BIT BIT(5)
  30. #define MX25_H1_USBTE_BIT BIT(4)
  31. #define MX25_H1_OCPOL_BIT BIT(2)
  32. #define MX27_H1_PM_BIT BIT(8)
  33. #define MX27_H2_PM_BIT BIT(16)
  34. #define MX27_OTG_PM_BIT BIT(24)
  35. #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
  36. #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
  37. #define MX53_USB_CTRL_1_OFFSET 0x10
  38. #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
  39. #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
  40. #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
  41. #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
  42. #define MX53_USB_UH2_CTRL_OFFSET 0x14
  43. #define MX53_USB_UH3_CTRL_OFFSET 0x18
  44. #define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24
  45. #define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
  46. #define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
  47. #define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
  48. #define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
  49. #define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
  50. #define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26)
  51. #define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27)
  52. #define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7)
  53. #define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8)
  54. #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
  55. #define MX53_USB_PLL_DIV_24_MHZ 0x01
  56. #define MX6_BM_NON_BURST_SETTING BIT(1)
  57. #define MX6_BM_OVER_CUR_DIS BIT(7)
  58. #define MX6_BM_OVER_CUR_POLARITY BIT(8)
  59. #define MX6_BM_PWR_POLARITY BIT(9)
  60. #define MX6_BM_WAKEUP_ENABLE BIT(10)
  61. #define MX6_BM_UTMI_ON_CLOCK BIT(13)
  62. #define MX6_BM_ID_WAKEUP BIT(16)
  63. #define MX6_BM_VBUS_WAKEUP BIT(17)
  64. #define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
  65. #define MX6_BM_WAKEUP_INTR BIT(31)
  66. #define MX6_USB_HSIC_CTRL_OFFSET 0x10
  67. /* Send resume signal without 480Mhz PHY clock */
  68. #define MX6SX_BM_HSIC_AUTO_RESUME BIT(23)
  69. /* set before portsc.suspendM = 1 */
  70. #define MX6_BM_HSIC_DEV_CONN BIT(21)
  71. /* HSIC enable */
  72. #define MX6_BM_HSIC_EN BIT(12)
  73. /* Force HSIC module 480M clock on, even when in Host is in suspend mode */
  74. #define MX6_BM_HSIC_CLK_ON BIT(11)
  75. #define MX6_USB_OTG1_PHY_CTRL 0x18
  76. /* For imx6dql, it is host-only controller, for later imx6, it is otg's */
  77. #define MX6_USB_OTG2_PHY_CTRL 0x1c
  78. #define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
  79. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
  80. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
  81. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
  82. #define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
  83. #define VF610_OVER_CUR_DIS BIT(7)
  84. #define MX7D_USBNC_USB_CTRL2 0x4
  85. #define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3
  86. #define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0)
  87. #define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0)
  88. #define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1)
  89. #define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2)
  90. #define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3)
  91. #define MX7D_USBNC_AUTO_RESUME BIT(2)
  92. /* The default DM/DP value is pull-down */
  93. #define MX7D_USBNC_USB_CTRL2_OPMODE(v) (v << 6)
  94. #define MX7D_USBNC_USB_CTRL2_OPMODE_NON_DRIVING MX7D_USBNC_USB_CTRL2_OPMODE(1)
  95. #define MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK (BIT(7) | BIT(6))
  96. #define MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN BIT(8)
  97. #define MX7D_USBNC_USB_CTRL2_DP_OVERRIDE_VAL BIT(12)
  98. #define MX7D_USBNC_USB_CTRL2_DP_OVERRIDE_EN BIT(13)
  99. #define MX7D_USBNC_USB_CTRL2_DM_OVERRIDE_VAL BIT(14)
  100. #define MX7D_USBNC_USB_CTRL2_DM_OVERRIDE_EN BIT(15)
  101. #define MX7D_USBNC_USB_CTRL2_DP_DM_MASK (BIT(12) | BIT(13) | \
  102. BIT(14) | BIT(15))
  103. #define MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL BIT(0)
  104. #define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 BIT(1)
  105. #define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 BIT(2)
  106. #define MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB BIT(3)
  107. #define MX7D_USB_OTG_PHY_CFG2_DRVVBUS0 BIT(16)
  108. #define MX7D_USB_OTG_PHY_CFG2 0x34
  109. #define MX7D_USB_OTG_PHY_STATUS 0x3c
  110. #define MX7D_USB_OTG_PHY_STATUS_LINE_STATE0 BIT(0)
  111. #define MX7D_USB_OTG_PHY_STATUS_LINE_STATE1 BIT(1)
  112. #define MX7D_USB_OTG_PHY_STATUS_VBUS_VLD BIT(3)
  113. #define MX7D_USB_OTG_PHY_STATUS_CHRGDET BIT(29)
  114. #define MX7D_USB_OTG_PHY_CFG1 0x30
  115. #define TXPREEMPAMPTUNE0_BIT 28
  116. #define TXPREEMPAMPTUNE0_MASK (3 << 28)
  117. #define TXRISETUNE0_BIT 24
  118. #define TXRISETUNE0_MASK (3 << 24)
  119. #define TXVREFTUNE0_BIT 20
  120. #define TXVREFTUNE0_MASK (0xf << 20)
  121. #define MX6_USB_OTG_WAKEUP_BITS (MX6_BM_WAKEUP_ENABLE | MX6_BM_VBUS_WAKEUP | \
  122. MX6_BM_ID_WAKEUP | MX6SX_BM_DPDM_WAKEUP_EN)
  123. struct usbmisc_ops {
  124. /* It's called once when probe a usb device */
  125. int (*init)(struct imx_usbmisc_data *data);
  126. /* It's called once after adding a usb device */
  127. int (*post)(struct imx_usbmisc_data *data);
  128. /* It's called when we need to enable/disable usb wakeup */
  129. int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled);
  130. /* It's called before setting portsc.suspendM */
  131. int (*hsic_set_connect)(struct imx_usbmisc_data *data);
  132. /* It's called during suspend/resume */
  133. int (*hsic_set_clk)(struct imx_usbmisc_data *data, bool enabled);
  134. /* usb charger detection */
  135. int (*charger_detection)(struct imx_usbmisc_data *data);
  136. /* It's called when system resume from usb power lost */
  137. int (*power_lost_check)(struct imx_usbmisc_data *data);
  138. void (*vbus_comparator_on)(struct imx_usbmisc_data *data, bool on);
  139. };
  140. struct imx_usbmisc {
  141. void __iomem *base;
  142. spinlock_t lock;
  143. const struct usbmisc_ops *ops;
  144. };
  145. static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data);
  146. static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
  147. {
  148. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  149. unsigned long flags;
  150. u32 val = 0;
  151. if (data->index > 1)
  152. return -EINVAL;
  153. spin_lock_irqsave(&usbmisc->lock, flags);
  154. switch (data->index) {
  155. case 0:
  156. val = readl(usbmisc->base);
  157. val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
  158. val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
  159. val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
  160. /*
  161. * If the polarity is not configured assume active high for
  162. * historical reasons.
  163. */
  164. if (data->oc_pol_configured && data->oc_pol_active_low)
  165. val &= ~MX25_OTG_OCPOL_BIT;
  166. writel(val, usbmisc->base);
  167. break;
  168. case 1:
  169. val = readl(usbmisc->base);
  170. val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT);
  171. val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
  172. val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
  173. MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);
  174. /*
  175. * If the polarity is not configured assume active high for
  176. * historical reasons.
  177. */
  178. if (data->oc_pol_configured && data->oc_pol_active_low)
  179. val &= ~MX25_H1_OCPOL_BIT;
  180. writel(val, usbmisc->base);
  181. break;
  182. }
  183. spin_unlock_irqrestore(&usbmisc->lock, flags);
  184. return 0;
  185. }
  186. static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
  187. {
  188. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  189. void __iomem *reg;
  190. unsigned long flags;
  191. u32 val;
  192. if (data->index > 2)
  193. return -EINVAL;
  194. if (data->index)
  195. return 0;
  196. spin_lock_irqsave(&usbmisc->lock, flags);
  197. reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
  198. val = readl(reg);
  199. if (data->evdo)
  200. val |= MX25_BM_EXTERNAL_VBUS_DIVIDER;
  201. else
  202. val &= ~MX25_BM_EXTERNAL_VBUS_DIVIDER;
  203. writel(val, reg);
  204. spin_unlock_irqrestore(&usbmisc->lock, flags);
  205. usleep_range(5000, 10000); /* needed to stabilize voltage */
  206. return 0;
  207. }
  208. static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
  209. {
  210. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  211. unsigned long flags;
  212. u32 val;
  213. switch (data->index) {
  214. case 0:
  215. val = MX27_OTG_PM_BIT;
  216. break;
  217. case 1:
  218. val = MX27_H1_PM_BIT;
  219. break;
  220. case 2:
  221. val = MX27_H2_PM_BIT;
  222. break;
  223. default:
  224. return -EINVAL;
  225. }
  226. spin_lock_irqsave(&usbmisc->lock, flags);
  227. if (data->disable_oc)
  228. val = readl(usbmisc->base) | val;
  229. else
  230. val = readl(usbmisc->base) & ~val;
  231. writel(val, usbmisc->base);
  232. spin_unlock_irqrestore(&usbmisc->lock, flags);
  233. return 0;
  234. }
  235. static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
  236. {
  237. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  238. void __iomem *reg = NULL;
  239. unsigned long flags;
  240. u32 val = 0;
  241. if (data->index > 3)
  242. return -EINVAL;
  243. /* Select a 24 MHz reference clock for the PHY */
  244. val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
  245. val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
  246. val |= MX53_USB_PLL_DIV_24_MHZ;
  247. writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
  248. spin_lock_irqsave(&usbmisc->lock, flags);
  249. switch (data->index) {
  250. case 0:
  251. if (data->disable_oc) {
  252. reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
  253. val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
  254. writel(val, reg);
  255. }
  256. break;
  257. case 1:
  258. if (data->disable_oc) {
  259. reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
  260. val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
  261. writel(val, reg);
  262. }
  263. break;
  264. case 2:
  265. if (data->ulpi) {
  266. /* set USBH2 into ULPI-mode. */
  267. reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
  268. val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
  269. /* select ULPI clock */
  270. val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
  271. val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
  272. writel(val, reg);
  273. /* Set interrupt wake up enable */
  274. reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
  275. val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
  276. | MX53_USB_UHx_CTRL_ULPI_INT_EN;
  277. writel(val, reg);
  278. if (is_imx53_usbmisc(data)) {
  279. /* Disable internal 60Mhz clock */
  280. reg = usbmisc->base +
  281. MX53_USB_CLKONOFF_CTRL_OFFSET;
  282. val = readl(reg) |
  283. MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF;
  284. writel(val, reg);
  285. }
  286. }
  287. if (data->disable_oc) {
  288. reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
  289. val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
  290. writel(val, reg);
  291. }
  292. break;
  293. case 3:
  294. if (data->ulpi) {
  295. /* set USBH3 into ULPI-mode. */
  296. reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
  297. val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
  298. /* select ULPI clock */
  299. val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
  300. val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
  301. writel(val, reg);
  302. /* Set interrupt wake up enable */
  303. reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
  304. val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
  305. | MX53_USB_UHx_CTRL_ULPI_INT_EN;
  306. writel(val, reg);
  307. if (is_imx53_usbmisc(data)) {
  308. /* Disable internal 60Mhz clock */
  309. reg = usbmisc->base +
  310. MX53_USB_CLKONOFF_CTRL_OFFSET;
  311. val = readl(reg) |
  312. MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF;
  313. writel(val, reg);
  314. }
  315. }
  316. if (data->disable_oc) {
  317. reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
  318. val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
  319. writel(val, reg);
  320. }
  321. break;
  322. }
  323. spin_unlock_irqrestore(&usbmisc->lock, flags);
  324. return 0;
  325. }
  326. static u32 usbmisc_wakeup_setting(struct imx_usbmisc_data *data)
  327. {
  328. u32 wakeup_setting = MX6_USB_OTG_WAKEUP_BITS;
  329. if (data->ext_id || data->available_role != USB_DR_MODE_OTG)
  330. wakeup_setting &= ~MX6_BM_ID_WAKEUP;
  331. if (data->ext_vbus || data->available_role == USB_DR_MODE_HOST)
  332. wakeup_setting &= ~MX6_BM_VBUS_WAKEUP;
  333. return wakeup_setting;
  334. }
  335. static int usbmisc_imx6q_set_wakeup
  336. (struct imx_usbmisc_data *data, bool enabled)
  337. {
  338. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  339. unsigned long flags;
  340. u32 val;
  341. int ret = 0;
  342. if (data->index > 3)
  343. return -EINVAL;
  344. spin_lock_irqsave(&usbmisc->lock, flags);
  345. val = readl(usbmisc->base + data->index * 4);
  346. if (enabled) {
  347. val &= ~MX6_USB_OTG_WAKEUP_BITS;
  348. val |= usbmisc_wakeup_setting(data);
  349. } else {
  350. if (val & MX6_BM_WAKEUP_INTR)
  351. pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
  352. val &= ~MX6_USB_OTG_WAKEUP_BITS;
  353. }
  354. writel(val, usbmisc->base + data->index * 4);
  355. spin_unlock_irqrestore(&usbmisc->lock, flags);
  356. return ret;
  357. }
  358. static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
  359. {
  360. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  361. unsigned long flags;
  362. u32 reg;
  363. if (data->index > 3)
  364. return -EINVAL;
  365. spin_lock_irqsave(&usbmisc->lock, flags);
  366. reg = readl(usbmisc->base + data->index * 4);
  367. if (data->disable_oc) {
  368. reg |= MX6_BM_OVER_CUR_DIS;
  369. } else {
  370. reg &= ~MX6_BM_OVER_CUR_DIS;
  371. /*
  372. * If the polarity is not configured keep it as setup by the
  373. * bootloader.
  374. */
  375. if (data->oc_pol_configured && data->oc_pol_active_low)
  376. reg |= MX6_BM_OVER_CUR_POLARITY;
  377. else if (data->oc_pol_configured)
  378. reg &= ~MX6_BM_OVER_CUR_POLARITY;
  379. }
  380. /* If the polarity is not set keep it as setup by the bootlader */
  381. if (data->pwr_pol == 1)
  382. reg |= MX6_BM_PWR_POLARITY;
  383. writel(reg, usbmisc->base + data->index * 4);
  384. /* SoC non-burst setting */
  385. reg = readl(usbmisc->base + data->index * 4);
  386. writel(reg | MX6_BM_NON_BURST_SETTING,
  387. usbmisc->base + data->index * 4);
  388. /* For HSIC controller */
  389. if (data->hsic) {
  390. reg = readl(usbmisc->base + data->index * 4);
  391. writel(reg | MX6_BM_UTMI_ON_CLOCK,
  392. usbmisc->base + data->index * 4);
  393. reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET
  394. + (data->index - 2) * 4);
  395. reg |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON;
  396. writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET
  397. + (data->index - 2) * 4);
  398. }
  399. spin_unlock_irqrestore(&usbmisc->lock, flags);
  400. usbmisc_imx6q_set_wakeup(data, false);
  401. return 0;
  402. }
  403. static int usbmisc_imx6_hsic_get_reg_offset(struct imx_usbmisc_data *data)
  404. {
  405. int offset, ret = 0;
  406. if (data->index == 2 || data->index == 3) {
  407. offset = (data->index - 2) * 4;
  408. } else if (data->index == 0) {
  409. /*
  410. * For SoCs like i.MX7D and later, each USB controller has
  411. * its own non-core register region. For SoCs before i.MX7D,
  412. * the first two USB controllers are non-HSIC controllers.
  413. */
  414. offset = 0;
  415. } else {
  416. dev_err(data->dev, "index is error for usbmisc\n");
  417. ret = -EINVAL;
  418. }
  419. return ret ? ret : offset;
  420. }
  421. static int usbmisc_imx6_hsic_set_connect(struct imx_usbmisc_data *data)
  422. {
  423. unsigned long flags;
  424. u32 val;
  425. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  426. int offset;
  427. spin_lock_irqsave(&usbmisc->lock, flags);
  428. offset = usbmisc_imx6_hsic_get_reg_offset(data);
  429. if (offset < 0) {
  430. spin_unlock_irqrestore(&usbmisc->lock, flags);
  431. return offset;
  432. }
  433. val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
  434. if (!(val & MX6_BM_HSIC_DEV_CONN))
  435. writel(val | MX6_BM_HSIC_DEV_CONN,
  436. usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
  437. spin_unlock_irqrestore(&usbmisc->lock, flags);
  438. return 0;
  439. }
  440. static int usbmisc_imx6_hsic_set_clk(struct imx_usbmisc_data *data, bool on)
  441. {
  442. unsigned long flags;
  443. u32 val;
  444. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  445. int offset;
  446. spin_lock_irqsave(&usbmisc->lock, flags);
  447. offset = usbmisc_imx6_hsic_get_reg_offset(data);
  448. if (offset < 0) {
  449. spin_unlock_irqrestore(&usbmisc->lock, flags);
  450. return offset;
  451. }
  452. val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
  453. val |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON;
  454. if (on)
  455. val |= MX6_BM_HSIC_CLK_ON;
  456. else
  457. val &= ~MX6_BM_HSIC_CLK_ON;
  458. writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
  459. spin_unlock_irqrestore(&usbmisc->lock, flags);
  460. return 0;
  461. }
  462. static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
  463. {
  464. void __iomem *reg = NULL;
  465. unsigned long flags;
  466. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  467. u32 val;
  468. usbmisc_imx6q_init(data);
  469. if (data->index == 0 || data->index == 1) {
  470. reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
  471. spin_lock_irqsave(&usbmisc->lock, flags);
  472. /* Set vbus wakeup source as bvalid */
  473. val = readl(reg);
  474. writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
  475. /*
  476. * Disable dp/dm wakeup in device mode when vbus is
  477. * not there.
  478. */
  479. val = readl(usbmisc->base + data->index * 4);
  480. writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
  481. usbmisc->base + data->index * 4);
  482. spin_unlock_irqrestore(&usbmisc->lock, flags);
  483. }
  484. /* For HSIC controller */
  485. if (data->hsic) {
  486. val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
  487. val |= MX6SX_BM_HSIC_AUTO_RESUME;
  488. writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
  489. }
  490. return 0;
  491. }
  492. static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
  493. {
  494. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  495. u32 reg;
  496. /*
  497. * Vybrid only has one misc register set, but in two different
  498. * areas. These is reflected in two instances of this driver.
  499. */
  500. if (data->index >= 1)
  501. return -EINVAL;
  502. if (data->disable_oc) {
  503. reg = readl(usbmisc->base);
  504. writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
  505. }
  506. return 0;
  507. }
  508. static int usbmisc_imx7d_set_wakeup
  509. (struct imx_usbmisc_data *data, bool enabled)
  510. {
  511. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  512. unsigned long flags;
  513. u32 val;
  514. spin_lock_irqsave(&usbmisc->lock, flags);
  515. val = readl(usbmisc->base);
  516. if (enabled) {
  517. val &= ~MX6_USB_OTG_WAKEUP_BITS;
  518. val |= usbmisc_wakeup_setting(data);
  519. writel(val, usbmisc->base);
  520. } else {
  521. if (val & MX6_BM_WAKEUP_INTR)
  522. dev_dbg(data->dev, "wakeup int\n");
  523. writel(val & ~MX6_USB_OTG_WAKEUP_BITS, usbmisc->base);
  524. }
  525. spin_unlock_irqrestore(&usbmisc->lock, flags);
  526. return 0;
  527. }
  528. static int usbmisc_imx7d_init(struct imx_usbmisc_data *data)
  529. {
  530. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  531. unsigned long flags;
  532. u32 reg;
  533. if (data->index >= 1)
  534. return -EINVAL;
  535. spin_lock_irqsave(&usbmisc->lock, flags);
  536. reg = readl(usbmisc->base);
  537. if (data->disable_oc) {
  538. reg |= MX6_BM_OVER_CUR_DIS;
  539. } else {
  540. reg &= ~MX6_BM_OVER_CUR_DIS;
  541. /*
  542. * If the polarity is not configured keep it as setup by the
  543. * bootloader.
  544. */
  545. if (data->oc_pol_configured && data->oc_pol_active_low)
  546. reg |= MX6_BM_OVER_CUR_POLARITY;
  547. else if (data->oc_pol_configured)
  548. reg &= ~MX6_BM_OVER_CUR_POLARITY;
  549. }
  550. /* If the polarity is not set keep it as setup by the bootlader */
  551. if (data->pwr_pol == 1)
  552. reg |= MX6_BM_PWR_POLARITY;
  553. writel(reg, usbmisc->base);
  554. /* SoC non-burst setting */
  555. reg = readl(usbmisc->base);
  556. writel(reg | MX6_BM_NON_BURST_SETTING, usbmisc->base);
  557. if (!data->hsic) {
  558. reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  559. reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
  560. writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID
  561. | MX7D_USBNC_AUTO_RESUME,
  562. usbmisc->base + MX7D_USBNC_USB_CTRL2);
  563. /* PHY tuning for signal quality */
  564. reg = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
  565. if (data->emp_curr_control >= 0 &&
  566. data->emp_curr_control <=
  567. (TXPREEMPAMPTUNE0_MASK >> TXPREEMPAMPTUNE0_BIT)) {
  568. reg &= ~TXPREEMPAMPTUNE0_MASK;
  569. reg |= (data->emp_curr_control << TXPREEMPAMPTUNE0_BIT);
  570. }
  571. if (data->dc_vol_level_adjust >= 0 &&
  572. data->dc_vol_level_adjust <=
  573. (TXVREFTUNE0_MASK >> TXVREFTUNE0_BIT)) {
  574. reg &= ~TXVREFTUNE0_MASK;
  575. reg |= (data->dc_vol_level_adjust << TXVREFTUNE0_BIT);
  576. }
  577. if (data->rise_fall_time_adjust >= 0 &&
  578. data->rise_fall_time_adjust <=
  579. (TXRISETUNE0_MASK >> TXRISETUNE0_BIT)) {
  580. reg &= ~TXRISETUNE0_MASK;
  581. reg |= (data->rise_fall_time_adjust << TXRISETUNE0_BIT);
  582. }
  583. writel(reg, usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
  584. }
  585. spin_unlock_irqrestore(&usbmisc->lock, flags);
  586. usbmisc_imx7d_set_wakeup(data, false);
  587. return 0;
  588. }
  589. static int imx7d_charger_secondary_detection(struct imx_usbmisc_data *data)
  590. {
  591. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  592. struct usb_phy *usb_phy = data->usb_phy;
  593. int val;
  594. unsigned long flags;
  595. /* Clear VDATSRCENB0 to disable VDP_SRC and IDM_SNK required by BC 1.2 spec */
  596. spin_lock_irqsave(&usbmisc->lock, flags);
  597. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  598. val &= ~MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0;
  599. writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  600. spin_unlock_irqrestore(&usbmisc->lock, flags);
  601. /* TVDMSRC_DIS */
  602. msleep(20);
  603. /* VDM_SRC is connected to D- and IDP_SINK is connected to D+ */
  604. spin_lock_irqsave(&usbmisc->lock, flags);
  605. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  606. writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 |
  607. MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 |
  608. MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL,
  609. usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  610. spin_unlock_irqrestore(&usbmisc->lock, flags);
  611. /* TVDMSRC_ON */
  612. msleep(40);
  613. /*
  614. * Per BC 1.2, check voltage of D+:
  615. * DCP: if greater than VDAT_REF;
  616. * CDP: if less than VDAT_REF.
  617. */
  618. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
  619. if (val & MX7D_USB_OTG_PHY_STATUS_CHRGDET) {
  620. dev_dbg(data->dev, "It is a dedicate charging port\n");
  621. usb_phy->chg_type = DCP_TYPE;
  622. } else {
  623. dev_dbg(data->dev, "It is a charging downstream port\n");
  624. usb_phy->chg_type = CDP_TYPE;
  625. }
  626. return 0;
  627. }
  628. static void imx7_disable_charger_detector(struct imx_usbmisc_data *data)
  629. {
  630. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  631. unsigned long flags;
  632. u32 val;
  633. spin_lock_irqsave(&usbmisc->lock, flags);
  634. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  635. val &= ~(MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB |
  636. MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 |
  637. MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 |
  638. MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL);
  639. writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  640. /* Set OPMODE to be 2'b00 and disable its override */
  641. val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  642. val &= ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK;
  643. writel(val, usbmisc->base + MX7D_USBNC_USB_CTRL2);
  644. val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  645. writel(val & ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN,
  646. usbmisc->base + MX7D_USBNC_USB_CTRL2);
  647. spin_unlock_irqrestore(&usbmisc->lock, flags);
  648. }
  649. static int imx7d_charger_data_contact_detect(struct imx_usbmisc_data *data)
  650. {
  651. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  652. unsigned long flags;
  653. u32 val;
  654. int i, data_pin_contact_count = 0;
  655. /* Enable Data Contact Detect (DCD) per the USB BC 1.2 */
  656. spin_lock_irqsave(&usbmisc->lock, flags);
  657. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  658. writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB,
  659. usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  660. spin_unlock_irqrestore(&usbmisc->lock, flags);
  661. for (i = 0; i < 100; i = i + 1) {
  662. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
  663. if (!(val & MX7D_USB_OTG_PHY_STATUS_LINE_STATE0)) {
  664. if (data_pin_contact_count++ > 5)
  665. /* Data pin makes contact */
  666. break;
  667. usleep_range(5000, 10000);
  668. } else {
  669. data_pin_contact_count = 0;
  670. usleep_range(5000, 6000);
  671. }
  672. }
  673. /* Disable DCD after finished data contact check */
  674. spin_lock_irqsave(&usbmisc->lock, flags);
  675. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  676. writel(val & ~MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB,
  677. usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  678. spin_unlock_irqrestore(&usbmisc->lock, flags);
  679. if (i == 100) {
  680. dev_err(data->dev,
  681. "VBUS is coming from a dedicated power supply.\n");
  682. return -ENXIO;
  683. }
  684. return 0;
  685. }
  686. static int imx7d_charger_primary_detection(struct imx_usbmisc_data *data)
  687. {
  688. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  689. struct usb_phy *usb_phy = data->usb_phy;
  690. unsigned long flags;
  691. u32 val;
  692. /* VDP_SRC is connected to D+ and IDM_SINK is connected to D- */
  693. spin_lock_irqsave(&usbmisc->lock, flags);
  694. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  695. val &= ~MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL;
  696. writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 |
  697. MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0,
  698. usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  699. spin_unlock_irqrestore(&usbmisc->lock, flags);
  700. /* TVDPSRC_ON */
  701. msleep(40);
  702. /* Check if D- is less than VDAT_REF to determine an SDP per BC 1.2 */
  703. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
  704. if (!(val & MX7D_USB_OTG_PHY_STATUS_CHRGDET)) {
  705. dev_dbg(data->dev, "It is a standard downstream port\n");
  706. usb_phy->chg_type = SDP_TYPE;
  707. }
  708. return 0;
  709. }
  710. /*
  711. * Whole charger detection process:
  712. * 1. OPMODE override to be non-driving
  713. * 2. Data contact check
  714. * 3. Primary detection
  715. * 4. Secondary detection
  716. * 5. Disable charger detection
  717. */
  718. static int imx7d_charger_detection(struct imx_usbmisc_data *data)
  719. {
  720. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  721. struct usb_phy *usb_phy = data->usb_phy;
  722. unsigned long flags;
  723. u32 val;
  724. int ret;
  725. /* Check if vbus is valid */
  726. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
  727. if (!(val & MX7D_USB_OTG_PHY_STATUS_VBUS_VLD)) {
  728. dev_err(data->dev, "vbus is error\n");
  729. return -EINVAL;
  730. }
  731. /*
  732. * Keep OPMODE to be non-driving mode during the whole
  733. * charger detection process.
  734. */
  735. spin_lock_irqsave(&usbmisc->lock, flags);
  736. val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  737. val &= ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK;
  738. val |= MX7D_USBNC_USB_CTRL2_OPMODE_NON_DRIVING;
  739. writel(val, usbmisc->base + MX7D_USBNC_USB_CTRL2);
  740. val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  741. writel(val | MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN,
  742. usbmisc->base + MX7D_USBNC_USB_CTRL2);
  743. spin_unlock_irqrestore(&usbmisc->lock, flags);
  744. ret = imx7d_charger_data_contact_detect(data);
  745. if (ret)
  746. return ret;
  747. ret = imx7d_charger_primary_detection(data);
  748. if (!ret && usb_phy->chg_type != SDP_TYPE)
  749. ret = imx7d_charger_secondary_detection(data);
  750. imx7_disable_charger_detector(data);
  751. return ret;
  752. }
  753. static void usbmisc_imx7d_vbus_comparator_on(struct imx_usbmisc_data *data,
  754. bool on)
  755. {
  756. unsigned long flags;
  757. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  758. u32 val;
  759. if (data->hsic)
  760. return;
  761. spin_lock_irqsave(&usbmisc->lock, flags);
  762. /*
  763. * Disable VBUS valid comparator when in suspend mode,
  764. * when OTG is disabled and DRVVBUS0 is asserted case
  765. * the Bandgap circuitry and VBUS Valid comparator are
  766. * still powered, even in Suspend or Sleep mode.
  767. */
  768. val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  769. if (on)
  770. val |= MX7D_USB_OTG_PHY_CFG2_DRVVBUS0;
  771. else
  772. val &= ~MX7D_USB_OTG_PHY_CFG2_DRVVBUS0;
  773. writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
  774. spin_unlock_irqrestore(&usbmisc->lock, flags);
  775. }
  776. static int usbmisc_imx7ulp_init(struct imx_usbmisc_data *data)
  777. {
  778. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  779. unsigned long flags;
  780. u32 reg;
  781. if (data->index >= 1)
  782. return -EINVAL;
  783. spin_lock_irqsave(&usbmisc->lock, flags);
  784. reg = readl(usbmisc->base);
  785. if (data->disable_oc) {
  786. reg |= MX6_BM_OVER_CUR_DIS;
  787. } else {
  788. reg &= ~MX6_BM_OVER_CUR_DIS;
  789. /*
  790. * If the polarity is not configured keep it as setup by the
  791. * bootloader.
  792. */
  793. if (data->oc_pol_configured && data->oc_pol_active_low)
  794. reg |= MX6_BM_OVER_CUR_POLARITY;
  795. else if (data->oc_pol_configured)
  796. reg &= ~MX6_BM_OVER_CUR_POLARITY;
  797. }
  798. /* If the polarity is not set keep it as setup by the bootlader */
  799. if (data->pwr_pol == 1)
  800. reg |= MX6_BM_PWR_POLARITY;
  801. writel(reg, usbmisc->base);
  802. /* SoC non-burst setting */
  803. reg = readl(usbmisc->base);
  804. writel(reg | MX6_BM_NON_BURST_SETTING, usbmisc->base);
  805. if (data->hsic) {
  806. reg = readl(usbmisc->base);
  807. writel(reg | MX6_BM_UTMI_ON_CLOCK, usbmisc->base);
  808. reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
  809. reg |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON;
  810. writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
  811. /*
  812. * For non-HSIC controller, the autoresume is enabled
  813. * at MXS PHY driver (usbphy_ctrl bit18).
  814. */
  815. reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  816. writel(reg | MX7D_USBNC_AUTO_RESUME,
  817. usbmisc->base + MX7D_USBNC_USB_CTRL2);
  818. } else {
  819. reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
  820. reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
  821. writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID,
  822. usbmisc->base + MX7D_USBNC_USB_CTRL2);
  823. }
  824. spin_unlock_irqrestore(&usbmisc->lock, flags);
  825. usbmisc_imx7d_set_wakeup(data, false);
  826. return 0;
  827. }
  828. static int usbmisc_imx7d_power_lost_check(struct imx_usbmisc_data *data)
  829. {
  830. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  831. unsigned long flags;
  832. u32 val;
  833. spin_lock_irqsave(&usbmisc->lock, flags);
  834. val = readl(usbmisc->base);
  835. spin_unlock_irqrestore(&usbmisc->lock, flags);
  836. /*
  837. * Here use a power on reset value to judge
  838. * if the controller experienced a power lost
  839. */
  840. if (val == 0x30001000)
  841. return 1;
  842. else
  843. return 0;
  844. }
  845. static int usbmisc_imx6sx_power_lost_check(struct imx_usbmisc_data *data)
  846. {
  847. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  848. unsigned long flags;
  849. u32 val;
  850. spin_lock_irqsave(&usbmisc->lock, flags);
  851. val = readl(usbmisc->base + data->index * 4);
  852. spin_unlock_irqrestore(&usbmisc->lock, flags);
  853. /*
  854. * Here use a power on reset value to judge
  855. * if the controller experienced a power lost
  856. */
  857. if (val == 0x30001000)
  858. return 1;
  859. else
  860. return 0;
  861. }
  862. static const struct usbmisc_ops imx25_usbmisc_ops = {
  863. .init = usbmisc_imx25_init,
  864. .post = usbmisc_imx25_post,
  865. };
  866. static const struct usbmisc_ops imx27_usbmisc_ops = {
  867. .init = usbmisc_imx27_init,
  868. };
  869. static const struct usbmisc_ops imx51_usbmisc_ops = {
  870. .init = usbmisc_imx53_init,
  871. };
  872. static const struct usbmisc_ops imx53_usbmisc_ops = {
  873. .init = usbmisc_imx53_init,
  874. };
  875. static const struct usbmisc_ops imx6q_usbmisc_ops = {
  876. .set_wakeup = usbmisc_imx6q_set_wakeup,
  877. .init = usbmisc_imx6q_init,
  878. .hsic_set_connect = usbmisc_imx6_hsic_set_connect,
  879. .hsic_set_clk = usbmisc_imx6_hsic_set_clk,
  880. };
  881. static const struct usbmisc_ops vf610_usbmisc_ops = {
  882. .init = usbmisc_vf610_init,
  883. };
  884. static const struct usbmisc_ops imx6sx_usbmisc_ops = {
  885. .set_wakeup = usbmisc_imx6q_set_wakeup,
  886. .init = usbmisc_imx6sx_init,
  887. .hsic_set_connect = usbmisc_imx6_hsic_set_connect,
  888. .hsic_set_clk = usbmisc_imx6_hsic_set_clk,
  889. .power_lost_check = usbmisc_imx6sx_power_lost_check,
  890. };
  891. static const struct usbmisc_ops imx7d_usbmisc_ops = {
  892. .init = usbmisc_imx7d_init,
  893. .set_wakeup = usbmisc_imx7d_set_wakeup,
  894. .charger_detection = imx7d_charger_detection,
  895. .power_lost_check = usbmisc_imx7d_power_lost_check,
  896. .vbus_comparator_on = usbmisc_imx7d_vbus_comparator_on,
  897. };
  898. static const struct usbmisc_ops imx7ulp_usbmisc_ops = {
  899. .init = usbmisc_imx7ulp_init,
  900. .set_wakeup = usbmisc_imx7d_set_wakeup,
  901. .hsic_set_connect = usbmisc_imx6_hsic_set_connect,
  902. .hsic_set_clk = usbmisc_imx6_hsic_set_clk,
  903. .power_lost_check = usbmisc_imx7d_power_lost_check,
  904. };
  905. static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
  906. {
  907. struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
  908. return usbmisc->ops == &imx53_usbmisc_ops;
  909. }
  910. int imx_usbmisc_init(struct imx_usbmisc_data *data)
  911. {
  912. struct imx_usbmisc *usbmisc;
  913. if (!data)
  914. return 0;
  915. usbmisc = dev_get_drvdata(data->dev);
  916. if (!usbmisc->ops->init)
  917. return 0;
  918. return usbmisc->ops->init(data);
  919. }
  920. EXPORT_SYMBOL_GPL(imx_usbmisc_init);
  921. int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
  922. {
  923. struct imx_usbmisc *usbmisc;
  924. int ret = 0;
  925. if (!data)
  926. return 0;
  927. usbmisc = dev_get_drvdata(data->dev);
  928. if (usbmisc->ops->post)
  929. ret = usbmisc->ops->post(data);
  930. if (ret) {
  931. dev_err(data->dev, "post init failed, ret=%d\n", ret);
  932. return ret;
  933. }
  934. if (usbmisc->ops->set_wakeup)
  935. ret = usbmisc->ops->set_wakeup(data, false);
  936. if (ret) {
  937. dev_err(data->dev, "set_wakeup failed, ret=%d\n", ret);
  938. return ret;
  939. }
  940. return 0;
  941. }
  942. EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
  943. int imx_usbmisc_hsic_set_connect(struct imx_usbmisc_data *data)
  944. {
  945. struct imx_usbmisc *usbmisc;
  946. if (!data)
  947. return 0;
  948. usbmisc = dev_get_drvdata(data->dev);
  949. if (!usbmisc->ops->hsic_set_connect || !data->hsic)
  950. return 0;
  951. return usbmisc->ops->hsic_set_connect(data);
  952. }
  953. EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_connect);
  954. int imx_usbmisc_charger_detection(struct imx_usbmisc_data *data, bool connect)
  955. {
  956. struct imx_usbmisc *usbmisc;
  957. struct usb_phy *usb_phy;
  958. int ret = 0;
  959. if (!data)
  960. return -EINVAL;
  961. usbmisc = dev_get_drvdata(data->dev);
  962. usb_phy = data->usb_phy;
  963. if (!usbmisc->ops->charger_detection)
  964. return -ENOTSUPP;
  965. if (connect) {
  966. ret = usbmisc->ops->charger_detection(data);
  967. if (ret) {
  968. dev_err(data->dev,
  969. "Error occurs during detection: %d\n",
  970. ret);
  971. usb_phy->chg_state = USB_CHARGER_ABSENT;
  972. } else {
  973. usb_phy->chg_state = USB_CHARGER_PRESENT;
  974. }
  975. } else {
  976. usb_phy->chg_state = USB_CHARGER_ABSENT;
  977. usb_phy->chg_type = UNKNOWN_TYPE;
  978. }
  979. return ret;
  980. }
  981. EXPORT_SYMBOL_GPL(imx_usbmisc_charger_detection);
  982. int imx_usbmisc_suspend(struct imx_usbmisc_data *data, bool wakeup)
  983. {
  984. struct imx_usbmisc *usbmisc;
  985. int ret = 0;
  986. if (!data)
  987. return 0;
  988. usbmisc = dev_get_drvdata(data->dev);
  989. if (usbmisc->ops->vbus_comparator_on)
  990. usbmisc->ops->vbus_comparator_on(data, false);
  991. if (wakeup && usbmisc->ops->set_wakeup)
  992. ret = usbmisc->ops->set_wakeup(data, true);
  993. if (ret) {
  994. dev_err(data->dev, "set_wakeup failed, ret=%d\n", ret);
  995. return ret;
  996. }
  997. if (usbmisc->ops->hsic_set_clk && data->hsic)
  998. ret = usbmisc->ops->hsic_set_clk(data, false);
  999. if (ret) {
  1000. dev_err(data->dev, "set_wakeup failed, ret=%d\n", ret);
  1001. return ret;
  1002. }
  1003. return ret;
  1004. }
  1005. EXPORT_SYMBOL_GPL(imx_usbmisc_suspend);
  1006. int imx_usbmisc_resume(struct imx_usbmisc_data *data, bool wakeup)
  1007. {
  1008. struct imx_usbmisc *usbmisc;
  1009. int ret = 0;
  1010. if (!data)
  1011. return 0;
  1012. usbmisc = dev_get_drvdata(data->dev);
  1013. if (usbmisc->ops->power_lost_check)
  1014. ret = usbmisc->ops->power_lost_check(data);
  1015. if (ret > 0) {
  1016. /* re-init if resume from power lost */
  1017. ret = imx_usbmisc_init(data);
  1018. if (ret) {
  1019. dev_err(data->dev, "re-init failed, ret=%d\n", ret);
  1020. return ret;
  1021. }
  1022. }
  1023. if (wakeup && usbmisc->ops->set_wakeup)
  1024. ret = usbmisc->ops->set_wakeup(data, false);
  1025. if (ret) {
  1026. dev_err(data->dev, "set_wakeup failed, ret=%d\n", ret);
  1027. return ret;
  1028. }
  1029. if (usbmisc->ops->hsic_set_clk && data->hsic)
  1030. ret = usbmisc->ops->hsic_set_clk(data, true);
  1031. if (ret) {
  1032. dev_err(data->dev, "set_wakeup failed, ret=%d\n", ret);
  1033. goto hsic_set_clk_fail;
  1034. }
  1035. if (usbmisc->ops->vbus_comparator_on)
  1036. usbmisc->ops->vbus_comparator_on(data, true);
  1037. return 0;
  1038. hsic_set_clk_fail:
  1039. if (wakeup && usbmisc->ops->set_wakeup)
  1040. usbmisc->ops->set_wakeup(data, true);
  1041. return ret;
  1042. }
  1043. EXPORT_SYMBOL_GPL(imx_usbmisc_resume);
  1044. static const struct of_device_id usbmisc_imx_dt_ids[] = {
  1045. {
  1046. .compatible = "fsl,imx25-usbmisc",
  1047. .data = &imx25_usbmisc_ops,
  1048. },
  1049. {
  1050. .compatible = "fsl,imx35-usbmisc",
  1051. .data = &imx25_usbmisc_ops,
  1052. },
  1053. {
  1054. .compatible = "fsl,imx27-usbmisc",
  1055. .data = &imx27_usbmisc_ops,
  1056. },
  1057. {
  1058. .compatible = "fsl,imx51-usbmisc",
  1059. .data = &imx51_usbmisc_ops,
  1060. },
  1061. {
  1062. .compatible = "fsl,imx53-usbmisc",
  1063. .data = &imx53_usbmisc_ops,
  1064. },
  1065. {
  1066. .compatible = "fsl,imx6q-usbmisc",
  1067. .data = &imx6q_usbmisc_ops,
  1068. },
  1069. {
  1070. .compatible = "fsl,vf610-usbmisc",
  1071. .data = &vf610_usbmisc_ops,
  1072. },
  1073. {
  1074. .compatible = "fsl,imx6sx-usbmisc",
  1075. .data = &imx6sx_usbmisc_ops,
  1076. },
  1077. {
  1078. .compatible = "fsl,imx6ul-usbmisc",
  1079. .data = &imx6sx_usbmisc_ops,
  1080. },
  1081. {
  1082. .compatible = "fsl,imx7d-usbmisc",
  1083. .data = &imx7d_usbmisc_ops,
  1084. },
  1085. {
  1086. .compatible = "fsl,imx7ulp-usbmisc",
  1087. .data = &imx7ulp_usbmisc_ops,
  1088. },
  1089. { /* sentinel */ }
  1090. };
  1091. MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
  1092. static int usbmisc_imx_probe(struct platform_device *pdev)
  1093. {
  1094. struct imx_usbmisc *data;
  1095. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  1096. if (!data)
  1097. return -ENOMEM;
  1098. spin_lock_init(&data->lock);
  1099. data->base = devm_platform_ioremap_resource(pdev, 0);
  1100. if (IS_ERR(data->base))
  1101. return PTR_ERR(data->base);
  1102. data->ops = of_device_get_match_data(&pdev->dev);
  1103. platform_set_drvdata(pdev, data);
  1104. return 0;
  1105. }
  1106. static struct platform_driver usbmisc_imx_driver = {
  1107. .probe = usbmisc_imx_probe,
  1108. .driver = {
  1109. .name = "usbmisc_imx",
  1110. .of_match_table = usbmisc_imx_dt_ids,
  1111. },
  1112. };
  1113. module_platform_driver(usbmisc_imx_driver);
  1114. MODULE_ALIAS("platform:usbmisc-imx");
  1115. MODULE_LICENSE("GPL");
  1116. MODULE_DESCRIPTION("driver for imx usb non-core registers");
  1117. MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");