dwc3-rtk.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dwc3-rtk.c - Realtek DWC3 Specific Glue layer
  4. *
  5. * Copyright (C) 2023 Realtek Semiconductor Corporation
  6. *
  7. */
  8. #include <linux/cleanup.h>
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/of.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/suspend.h>
  15. #include <linux/sys_soc.h>
  16. #include <linux/usb/otg.h>
  17. #include <linux/usb/of.h>
  18. #include <linux/usb/role.h>
  19. #include "core.h"
  20. #define WRAP_CTR_REG 0x0
  21. #define DISABLE_MULTI_REQ BIT(1)
  22. #define DESC_R2W_MULTI_DISABLE BIT(9)
  23. #define FORCE_PIPE3_PHY_STATUS_TO_0 BIT(13)
  24. #define WRAP_USB2_PHY_UTMI_REG 0x8
  25. #define TXHSVM_EN BIT(3)
  26. #define WRAP_PHY_PIPE_REG 0xC
  27. #define RESET_DISABLE_PIPE3_P0 BIT(0)
  28. #define CLOCK_ENABLE_FOR_PIPE3_PCLK BIT(1)
  29. #define WRAP_USB_HMAC_CTR0_REG 0x60
  30. #define U3PORT_DIS BIT(8)
  31. #define WRAP_USB2_PHY_REG 0x70
  32. #define USB2_PHY_EN_PHY_PLL_PORT0 BIT(12)
  33. #define USB2_PHY_EN_PHY_PLL_PORT1 BIT(13)
  34. #define USB2_PHY_SWITCH_MASK 0x707
  35. #define USB2_PHY_SWITCH_DEVICE 0x0
  36. #define USB2_PHY_SWITCH_HOST 0x606
  37. #define WRAP_APHY_REG 0x128
  38. #define USB3_MBIAS_ENABLE BIT(1)
  39. /* pm control */
  40. #define WRAP_USB_DBUS_PWR_CTRL_REG 0x160
  41. #define USB_DBUS_PWR_CTRL_REG 0x0
  42. #define DBUS_PWR_CTRL_EN BIT(0)
  43. struct dwc3_rtk {
  44. struct device *dev;
  45. void __iomem *regs;
  46. size_t regs_size;
  47. void __iomem *pm_base;
  48. struct dwc3 *dwc;
  49. enum usb_role cur_role;
  50. struct usb_role_switch *role_switch;
  51. };
  52. static void switch_usb2_role(struct dwc3_rtk *rtk, enum usb_role role)
  53. {
  54. void __iomem *reg;
  55. int val;
  56. reg = rtk->regs + WRAP_USB2_PHY_REG;
  57. val = ~USB2_PHY_SWITCH_MASK & readl(reg);
  58. switch (role) {
  59. case USB_ROLE_DEVICE:
  60. writel(USB2_PHY_SWITCH_DEVICE | val, reg);
  61. break;
  62. case USB_ROLE_HOST:
  63. writel(USB2_PHY_SWITCH_HOST | val, reg);
  64. break;
  65. default:
  66. dev_dbg(rtk->dev, "%s: role=%d\n", __func__, role);
  67. break;
  68. }
  69. }
  70. static void switch_dwc3_role(struct dwc3_rtk *rtk, enum usb_role role)
  71. {
  72. if (!rtk->dwc->role_sw)
  73. return;
  74. usb_role_switch_set_role(rtk->dwc->role_sw, role);
  75. }
  76. static enum usb_role dwc3_rtk_get_role(struct dwc3_rtk *rtk)
  77. {
  78. enum usb_role role;
  79. role = rtk->cur_role;
  80. if (rtk->dwc && rtk->dwc->role_sw)
  81. role = usb_role_switch_get_role(rtk->dwc->role_sw);
  82. else
  83. dev_dbg(rtk->dev, "%s not usb_role_switch role=%d\n", __func__, role);
  84. return role;
  85. }
  86. static void dwc3_rtk_set_role(struct dwc3_rtk *rtk, enum usb_role role)
  87. {
  88. rtk->cur_role = role;
  89. switch_dwc3_role(rtk, role);
  90. mdelay(10);
  91. switch_usb2_role(rtk, role);
  92. }
  93. #if IS_ENABLED(CONFIG_USB_ROLE_SWITCH)
  94. static int dwc3_usb_role_switch_set(struct usb_role_switch *sw, enum usb_role role)
  95. {
  96. struct dwc3_rtk *rtk = usb_role_switch_get_drvdata(sw);
  97. dwc3_rtk_set_role(rtk, role);
  98. return 0;
  99. }
  100. static enum usb_role dwc3_usb_role_switch_get(struct usb_role_switch *sw)
  101. {
  102. struct dwc3_rtk *rtk = usb_role_switch_get_drvdata(sw);
  103. return dwc3_rtk_get_role(rtk);
  104. }
  105. static int dwc3_rtk_setup_role_switch(struct dwc3_rtk *rtk)
  106. {
  107. struct usb_role_switch_desc dwc3_role_switch = {NULL};
  108. dwc3_role_switch.name = dev_name(rtk->dev);
  109. dwc3_role_switch.driver_data = rtk;
  110. dwc3_role_switch.allow_userspace_control = true;
  111. dwc3_role_switch.fwnode = dev_fwnode(rtk->dev);
  112. dwc3_role_switch.set = dwc3_usb_role_switch_set;
  113. dwc3_role_switch.get = dwc3_usb_role_switch_get;
  114. rtk->role_switch = usb_role_switch_register(rtk->dev, &dwc3_role_switch);
  115. if (IS_ERR(rtk->role_switch))
  116. return PTR_ERR(rtk->role_switch);
  117. return 0;
  118. }
  119. static int dwc3_rtk_remove_role_switch(struct dwc3_rtk *rtk)
  120. {
  121. if (rtk->role_switch)
  122. usb_role_switch_unregister(rtk->role_switch);
  123. rtk->role_switch = NULL;
  124. return 0;
  125. }
  126. #else
  127. #define dwc3_rtk_setup_role_switch(x) 0
  128. #define dwc3_rtk_remove_role_switch(x) 0
  129. #endif
  130. static const char *const speed_names[] = {
  131. [USB_SPEED_UNKNOWN] = "UNKNOWN",
  132. [USB_SPEED_LOW] = "low-speed",
  133. [USB_SPEED_FULL] = "full-speed",
  134. [USB_SPEED_HIGH] = "high-speed",
  135. [USB_SPEED_WIRELESS] = "wireless",
  136. [USB_SPEED_SUPER] = "super-speed",
  137. [USB_SPEED_SUPER_PLUS] = "super-speed-plus",
  138. };
  139. static enum usb_device_speed __get_dwc3_maximum_speed(struct device_node *np)
  140. {
  141. const char *maximum_speed;
  142. int ret;
  143. struct device_node *dwc3_np __free(device_node) = of_get_compatible_child(np,
  144. "snps,dwc3");
  145. if (!dwc3_np)
  146. return USB_SPEED_UNKNOWN;
  147. ret = of_property_read_string(dwc3_np, "maximum-speed", &maximum_speed);
  148. if (ret < 0)
  149. return USB_SPEED_UNKNOWN;
  150. ret = match_string(speed_names, ARRAY_SIZE(speed_names), maximum_speed);
  151. return (ret < 0) ? USB_SPEED_UNKNOWN : ret;
  152. }
  153. static int dwc3_rtk_init(struct dwc3_rtk *rtk)
  154. {
  155. struct device *dev = rtk->dev;
  156. void __iomem *reg;
  157. int val;
  158. enum usb_device_speed maximum_speed;
  159. const struct soc_device_attribute rtk_soc_kylin_a00[] = {
  160. { .family = "Realtek Kylin", .revision = "A00", },
  161. { /* empty */ } };
  162. const struct soc_device_attribute rtk_soc_hercules[] = {
  163. { .family = "Realtek Hercules", }, { /* empty */ } };
  164. const struct soc_device_attribute rtk_soc_thor[] = {
  165. { .family = "Realtek Thor", }, { /* empty */ } };
  166. if (soc_device_match(rtk_soc_kylin_a00)) {
  167. reg = rtk->regs + WRAP_CTR_REG;
  168. val = readl(reg);
  169. writel(DISABLE_MULTI_REQ | val, reg);
  170. dev_info(dev, "[bug fixed] 1295/1296 A00: add workaround to disable multiple request for D-Bus");
  171. }
  172. if (soc_device_match(rtk_soc_hercules)) {
  173. reg = rtk->regs + WRAP_USB2_PHY_REG;
  174. val = readl(reg);
  175. writel(USB2_PHY_EN_PHY_PLL_PORT1 | val, reg);
  176. dev_info(dev, "[bug fixed] 1395 add workaround to disable usb2 port 2 suspend!");
  177. }
  178. reg = rtk->regs + WRAP_USB2_PHY_UTMI_REG;
  179. val = readl(reg);
  180. writel(TXHSVM_EN | val, reg);
  181. maximum_speed = __get_dwc3_maximum_speed(dev->of_node);
  182. if (maximum_speed != USB_SPEED_UNKNOWN && maximum_speed <= USB_SPEED_HIGH) {
  183. if (soc_device_match(rtk_soc_thor)) {
  184. reg = rtk->regs + WRAP_USB_HMAC_CTR0_REG;
  185. val = readl(reg);
  186. writel(U3PORT_DIS | val, reg);
  187. } else {
  188. reg = rtk->regs + WRAP_CTR_REG;
  189. val = readl(reg);
  190. writel(FORCE_PIPE3_PHY_STATUS_TO_0 | val, reg);
  191. reg = rtk->regs + WRAP_PHY_PIPE_REG;
  192. val = ~CLOCK_ENABLE_FOR_PIPE3_PCLK & readl(reg);
  193. writel(RESET_DISABLE_PIPE3_P0 | val, reg);
  194. reg = rtk->regs + WRAP_USB_HMAC_CTR0_REG;
  195. val = readl(reg);
  196. writel(U3PORT_DIS | val, reg);
  197. reg = rtk->regs + WRAP_APHY_REG;
  198. val = readl(reg);
  199. writel(~USB3_MBIAS_ENABLE & val, reg);
  200. dev_dbg(rtk->dev, "%s: disable usb 3.0 phy\n", __func__);
  201. }
  202. }
  203. reg = rtk->regs + WRAP_CTR_REG;
  204. val = readl(reg);
  205. writel(DESC_R2W_MULTI_DISABLE | val, reg);
  206. /* Set phy Dp/Dm initial state to host mode to avoid the Dp glitch */
  207. reg = rtk->regs + WRAP_USB2_PHY_REG;
  208. val = ~USB2_PHY_SWITCH_MASK & readl(reg);
  209. writel(USB2_PHY_SWITCH_HOST | val, reg);
  210. if (rtk->pm_base) {
  211. reg = rtk->pm_base + USB_DBUS_PWR_CTRL_REG;
  212. val = DBUS_PWR_CTRL_EN | readl(reg);
  213. writel(val, reg);
  214. }
  215. return 0;
  216. }
  217. static int dwc3_rtk_probe_dwc3_core(struct dwc3_rtk *rtk)
  218. {
  219. struct device *dev = rtk->dev;
  220. struct device_node *node = dev->of_node;
  221. struct platform_device *dwc3_pdev;
  222. struct device *dwc3_dev;
  223. enum usb_dr_mode dr_mode;
  224. int ret = 0;
  225. ret = dwc3_rtk_init(rtk);
  226. if (ret)
  227. return -EINVAL;
  228. ret = of_platform_populate(node, NULL, NULL, dev);
  229. if (ret) {
  230. dev_err(dev, "failed to add dwc3 core\n");
  231. return ret;
  232. }
  233. struct device_node *dwc3_node __free(device_node) = of_get_compatible_child(node,
  234. "snps,dwc3");
  235. if (!dwc3_node) {
  236. dev_err(dev, "failed to find dwc3 core node\n");
  237. ret = -ENODEV;
  238. goto depopulate;
  239. }
  240. dwc3_pdev = of_find_device_by_node(dwc3_node);
  241. if (!dwc3_pdev) {
  242. dev_err(dev, "failed to find dwc3 core platform_device\n");
  243. ret = -ENODEV;
  244. goto depopulate;
  245. }
  246. dwc3_dev = &dwc3_pdev->dev;
  247. rtk->dwc = platform_get_drvdata(dwc3_pdev);
  248. if (!rtk->dwc) {
  249. dev_err(dev, "failed to find dwc3 core\n");
  250. ret = -ENODEV;
  251. goto err_pdev_put;
  252. }
  253. dr_mode = usb_get_dr_mode(dwc3_dev);
  254. if (dr_mode != rtk->dwc->dr_mode) {
  255. dev_info(dev, "dts set dr_mode=%d, but dwc3 set dr_mode=%d\n",
  256. dr_mode, rtk->dwc->dr_mode);
  257. dr_mode = rtk->dwc->dr_mode;
  258. }
  259. switch (dr_mode) {
  260. case USB_DR_MODE_PERIPHERAL:
  261. rtk->cur_role = USB_ROLE_DEVICE;
  262. break;
  263. case USB_DR_MODE_HOST:
  264. rtk->cur_role = USB_ROLE_HOST;
  265. break;
  266. default:
  267. dev_dbg(rtk->dev, "%s: dr_mode=%d\n", __func__, dr_mode);
  268. break;
  269. }
  270. if (device_property_read_bool(dwc3_dev, "usb-role-switch")) {
  271. ret = dwc3_rtk_setup_role_switch(rtk);
  272. if (ret) {
  273. dev_err(dev, "dwc3_rtk_setup_role_switch fail=%d\n", ret);
  274. goto err_pdev_put;
  275. }
  276. rtk->cur_role = dwc3_rtk_get_role(rtk);
  277. }
  278. switch_usb2_role(rtk, rtk->cur_role);
  279. platform_device_put(dwc3_pdev);
  280. return 0;
  281. err_pdev_put:
  282. platform_device_put(dwc3_pdev);
  283. depopulate:
  284. of_platform_depopulate(dev);
  285. return ret;
  286. }
  287. static int dwc3_rtk_probe(struct platform_device *pdev)
  288. {
  289. struct dwc3_rtk *rtk;
  290. struct device *dev = &pdev->dev;
  291. struct resource *res;
  292. void __iomem *regs;
  293. rtk = devm_kzalloc(dev, sizeof(*rtk), GFP_KERNEL);
  294. if (!rtk)
  295. return -ENOMEM;
  296. platform_set_drvdata(pdev, rtk);
  297. rtk->dev = dev;
  298. regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
  299. if (IS_ERR(regs))
  300. return PTR_ERR(regs);
  301. rtk->regs = regs;
  302. rtk->regs_size = resource_size(res);
  303. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  304. if (res) {
  305. rtk->pm_base = devm_ioremap_resource(dev, res);
  306. if (IS_ERR(rtk->pm_base))
  307. return PTR_ERR(rtk->pm_base);
  308. }
  309. return dwc3_rtk_probe_dwc3_core(rtk);
  310. }
  311. static void dwc3_rtk_remove(struct platform_device *pdev)
  312. {
  313. struct dwc3_rtk *rtk = platform_get_drvdata(pdev);
  314. rtk->dwc = NULL;
  315. dwc3_rtk_remove_role_switch(rtk);
  316. of_platform_depopulate(rtk->dev);
  317. }
  318. static void dwc3_rtk_shutdown(struct platform_device *pdev)
  319. {
  320. struct dwc3_rtk *rtk = platform_get_drvdata(pdev);
  321. of_platform_depopulate(rtk->dev);
  322. }
  323. static const struct of_device_id rtk_dwc3_match[] = {
  324. { .compatible = "realtek,rtd-dwc3" },
  325. {},
  326. };
  327. MODULE_DEVICE_TABLE(of, rtk_dwc3_match);
  328. #ifdef CONFIG_PM_SLEEP
  329. static int dwc3_rtk_suspend(struct device *dev)
  330. {
  331. return 0;
  332. }
  333. static int dwc3_rtk_resume(struct device *dev)
  334. {
  335. struct dwc3_rtk *rtk = dev_get_drvdata(dev);
  336. dwc3_rtk_init(rtk);
  337. switch_usb2_role(rtk, rtk->cur_role);
  338. /* runtime set active to reflect active state. */
  339. pm_runtime_disable(dev);
  340. pm_runtime_set_active(dev);
  341. pm_runtime_enable(dev);
  342. return 0;
  343. }
  344. static const struct dev_pm_ops dwc3_rtk_dev_pm_ops = {
  345. SET_SYSTEM_SLEEP_PM_OPS(dwc3_rtk_suspend, dwc3_rtk_resume)
  346. };
  347. #define DEV_PM_OPS (&dwc3_rtk_dev_pm_ops)
  348. #else
  349. #define DEV_PM_OPS NULL
  350. #endif /* CONFIG_PM_SLEEP */
  351. static struct platform_driver dwc3_rtk_driver = {
  352. .probe = dwc3_rtk_probe,
  353. .remove_new = dwc3_rtk_remove,
  354. .driver = {
  355. .name = "rtk-dwc3",
  356. .of_match_table = rtk_dwc3_match,
  357. .pm = DEV_PM_OPS,
  358. },
  359. .shutdown = dwc3_rtk_shutdown,
  360. };
  361. module_platform_driver(dwc3_rtk_driver);
  362. MODULE_AUTHOR("Stanley Chang <stanley_chang@realtek.com>");
  363. MODULE_DESCRIPTION("DesignWare USB3 Realtek Glue Layer");
  364. MODULE_ALIAS("platform:rtk-dwc3");
  365. MODULE_LICENSE("GPL");
  366. MODULE_SOFTDEP("pre: phy_rtk_usb2 phy_rtk_usb3");