ehci-orion.c 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * drivers/usb/host/ehci-orion.c
  4. *
  5. * Tzachi Perelstein <tzachi@marvell.com>
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mbus.h>
  11. #include <linux/clk.h>
  12. #include <linux/platform_data/usb-ehci-orion.h>
  13. #include <linux/of.h>
  14. #include <linux/phy/phy.h>
  15. #include <linux/usb.h>
  16. #include <linux/usb/hcd.h>
  17. #include <linux/io.h>
  18. #include <linux/dma-mapping.h>
  19. #include "ehci.h"
  20. #define rdl(off) readl_relaxed(hcd->regs + (off))
  21. #define wrl(off, val) writel_relaxed((val), hcd->regs + (off))
  22. #define USB_CMD 0x140
  23. #define USB_CMD_RUN BIT(0)
  24. #define USB_CMD_RESET BIT(1)
  25. #define USB_MODE 0x1a8
  26. #define USB_MODE_MASK GENMASK(1, 0)
  27. #define USB_MODE_DEVICE 0x2
  28. #define USB_MODE_HOST 0x3
  29. #define USB_MODE_SDIS BIT(4)
  30. #define USB_CAUSE 0x310
  31. #define USB_MASK 0x314
  32. #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
  33. #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
  34. #define USB_IPG 0x360
  35. #define USB_PHY_PWR_CTRL 0x400
  36. #define USB_PHY_TX_CTRL 0x420
  37. #define USB_PHY_RX_CTRL 0x430
  38. #define USB_PHY_IVREF_CTRL 0x440
  39. #define USB_PHY_TST_GRP_CTRL 0x450
  40. #define USB_SBUSCFG 0x90
  41. /* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
  42. #define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6)
  43. #define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3)
  44. /* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */
  45. #define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0)
  46. #define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \
  47. | USB_SBUSCFG_BARD_ALIGN_128B \
  48. | USB_SBUSCFG_AHBBRST_INCR16)
  49. #define DRIVER_DESC "EHCI orion driver"
  50. #define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
  51. struct orion_ehci_hcd {
  52. struct clk *clk;
  53. struct phy *phy;
  54. };
  55. static struct hc_driver __read_mostly ehci_orion_hc_driver;
  56. /*
  57. * Legacy DMA mask is 32 bit.
  58. * AC5 has the DDR starting at 8GB, hence it requires
  59. * a larger (34-bit) DMA mask, in order for DMA allocations
  60. * to succeed:
  61. */
  62. static const u64 dma_mask_orion = DMA_BIT_MASK(32);
  63. static const u64 dma_mask_ac5 = DMA_BIT_MASK(34);
  64. /*
  65. * Implement Orion USB controller specification guidelines
  66. */
  67. static void orion_usb_phy_v1_setup(struct usb_hcd *hcd)
  68. {
  69. /* The below GLs are according to the Orion Errata document */
  70. /*
  71. * Clear interrupt cause and mask
  72. */
  73. wrl(USB_CAUSE, 0);
  74. wrl(USB_MASK, 0);
  75. /*
  76. * Reset controller
  77. */
  78. wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
  79. while (rdl(USB_CMD) & USB_CMD_RESET);
  80. /*
  81. * GL# USB-10: Set IPG for non start of frame packets
  82. * Bits[14:8]=0xc
  83. */
  84. wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
  85. /*
  86. * GL# USB-9: USB 2.0 Power Control
  87. * BG_VSEL[7:6]=0x1
  88. */
  89. wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
  90. /*
  91. * GL# USB-1: USB PHY Tx Control - force calibration to '8'
  92. * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8
  93. */
  94. wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
  95. /*
  96. * GL# USB-3 GL# USB-9: USB PHY Rx Control
  97. * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0,
  98. * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1
  99. */
  100. wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
  101. /*
  102. * GL# USB-3 GL# USB-9: USB PHY IVREF Control
  103. * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0
  104. */
  105. wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
  106. /*
  107. * GL# USB-3 GL# USB-9: USB PHY Test Group Control
  108. * REG_FIFO_SQ_RST[15]=0
  109. */
  110. wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
  111. /*
  112. * Stop and reset controller
  113. */
  114. wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
  115. wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
  116. while (rdl(USB_CMD) & USB_CMD_RESET);
  117. /*
  118. * GL# USB-5 Streaming disable REG_USB_MODE[4]=1
  119. * TBD: This need to be done after each reset!
  120. * GL# USB-4 Setup USB Host mode
  121. */
  122. wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
  123. }
  124. static void
  125. ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
  126. const struct mbus_dram_target_info *dram)
  127. {
  128. int i;
  129. for (i = 0; i < 4; i++) {
  130. wrl(USB_WINDOW_CTRL(i), 0);
  131. wrl(USB_WINDOW_BASE(i), 0);
  132. }
  133. for (i = 0; i < dram->num_cs; i++) {
  134. const struct mbus_dram_window *cs = dram->cs + i;
  135. wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
  136. (cs->mbus_attr << 8) |
  137. (dram->mbus_dram_target_id << 4) | 1);
  138. wrl(USB_WINDOW_BASE(i), cs->base);
  139. }
  140. }
  141. static int ehci_orion_drv_reset(struct usb_hcd *hcd)
  142. {
  143. struct device *dev = hcd->self.controller;
  144. int ret;
  145. ret = ehci_setup(hcd);
  146. if (ret)
  147. return ret;
  148. /*
  149. * For SoC without hlock, need to program sbuscfg value to guarantee
  150. * AHB master's burst would not overrun or underrun FIFO.
  151. *
  152. * sbuscfg reg has to be set after usb controller reset, otherwise
  153. * the value would be override to 0.
  154. */
  155. if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
  156. wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
  157. return ret;
  158. }
  159. static int __maybe_unused ehci_orion_drv_suspend(struct device *dev)
  160. {
  161. struct usb_hcd *hcd = dev_get_drvdata(dev);
  162. return ehci_suspend(hcd, device_may_wakeup(dev));
  163. }
  164. static int __maybe_unused ehci_orion_drv_resume(struct device *dev)
  165. {
  166. struct usb_hcd *hcd = dev_get_drvdata(dev);
  167. return ehci_resume(hcd, false);
  168. }
  169. static SIMPLE_DEV_PM_OPS(ehci_orion_pm_ops, ehci_orion_drv_suspend,
  170. ehci_orion_drv_resume);
  171. static const struct ehci_driver_overrides orion_overrides __initconst = {
  172. .extra_priv_size = sizeof(struct orion_ehci_hcd),
  173. .reset = ehci_orion_drv_reset,
  174. };
  175. static int ehci_orion_drv_probe(struct platform_device *pdev)
  176. {
  177. struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev);
  178. const struct mbus_dram_target_info *dram;
  179. struct resource *res;
  180. struct usb_hcd *hcd;
  181. struct ehci_hcd *ehci;
  182. void __iomem *regs;
  183. int irq, err;
  184. enum orion_ehci_phy_ver phy_version;
  185. struct orion_ehci_hcd *priv;
  186. u64 *dma_mask_ptr;
  187. if (usb_disabled())
  188. return -ENODEV;
  189. pr_debug("Initializing Orion-SoC USB Host Controller\n");
  190. irq = platform_get_irq(pdev, 0);
  191. if (irq < 0) {
  192. err = irq;
  193. goto err;
  194. }
  195. /*
  196. * Right now device-tree probed devices don't get dma_mask
  197. * set. Since shared usb code relies on it, set it here for
  198. * now. Once we have dma capability bindings this can go away.
  199. */
  200. dma_mask_ptr = (u64 *)of_device_get_match_data(&pdev->dev);
  201. err = dma_coerce_mask_and_coherent(&pdev->dev, *dma_mask_ptr);
  202. if (err)
  203. goto err;
  204. regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
  205. if (IS_ERR(regs)) {
  206. err = PTR_ERR(regs);
  207. goto err;
  208. }
  209. hcd = usb_create_hcd(&ehci_orion_hc_driver,
  210. &pdev->dev, dev_name(&pdev->dev));
  211. if (!hcd) {
  212. err = -ENOMEM;
  213. goto err;
  214. }
  215. hcd->rsrc_start = res->start;
  216. hcd->rsrc_len = resource_size(res);
  217. hcd->regs = regs;
  218. ehci = hcd_to_ehci(hcd);
  219. ehci->caps = hcd->regs + 0x100;
  220. hcd->has_tt = 1;
  221. priv = hcd_to_orion_priv(hcd);
  222. /*
  223. * Not all platforms can gate the clock, so it is not an error if
  224. * the clock does not exists.
  225. */
  226. priv->clk = devm_clk_get(&pdev->dev, NULL);
  227. if (!IS_ERR(priv->clk)) {
  228. err = clk_prepare_enable(priv->clk);
  229. if (err)
  230. goto err_put_hcd;
  231. }
  232. priv->phy = devm_phy_optional_get(&pdev->dev, "usb");
  233. if (IS_ERR(priv->phy)) {
  234. err = PTR_ERR(priv->phy);
  235. if (err != -ENOSYS)
  236. goto err_dis_clk;
  237. }
  238. /*
  239. * (Re-)program MBUS remapping windows if we are asked to.
  240. */
  241. dram = mv_mbus_dram_info();
  242. if (dram)
  243. ehci_orion_conf_mbus_windows(hcd, dram);
  244. /*
  245. * setup Orion USB controller.
  246. */
  247. if (pdev->dev.of_node)
  248. phy_version = EHCI_PHY_NA;
  249. else
  250. phy_version = pd->phy_version;
  251. switch (phy_version) {
  252. case EHCI_PHY_NA: /* dont change USB phy settings */
  253. break;
  254. case EHCI_PHY_ORION:
  255. orion_usb_phy_v1_setup(hcd);
  256. break;
  257. case EHCI_PHY_DD:
  258. case EHCI_PHY_KW:
  259. default:
  260. dev_warn(&pdev->dev, "USB phy version isn't supported.\n");
  261. }
  262. err = usb_add_hcd(hcd, irq, IRQF_SHARED);
  263. if (err)
  264. goto err_dis_clk;
  265. device_wakeup_enable(hcd->self.controller);
  266. return 0;
  267. err_dis_clk:
  268. if (!IS_ERR(priv->clk))
  269. clk_disable_unprepare(priv->clk);
  270. err_put_hcd:
  271. usb_put_hcd(hcd);
  272. err:
  273. dev_err(&pdev->dev, "init %s fail, %d\n",
  274. dev_name(&pdev->dev), err);
  275. return err;
  276. }
  277. static void ehci_orion_drv_remove(struct platform_device *pdev)
  278. {
  279. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  280. struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd);
  281. usb_remove_hcd(hcd);
  282. if (!IS_ERR(priv->clk))
  283. clk_disable_unprepare(priv->clk);
  284. usb_put_hcd(hcd);
  285. }
  286. static const struct of_device_id ehci_orion_dt_ids[] = {
  287. { .compatible = "marvell,orion-ehci", .data = &dma_mask_orion},
  288. { .compatible = "marvell,armada-3700-ehci", .data = &dma_mask_orion},
  289. { .compatible = "marvell,ac5-ehci", .data = &dma_mask_ac5},
  290. {},
  291. };
  292. MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
  293. static struct platform_driver ehci_orion_driver = {
  294. .probe = ehci_orion_drv_probe,
  295. .remove_new = ehci_orion_drv_remove,
  296. .shutdown = usb_hcd_platform_shutdown,
  297. .driver = {
  298. .name = "orion-ehci",
  299. .of_match_table = ehci_orion_dt_ids,
  300. .pm = &ehci_orion_pm_ops,
  301. },
  302. };
  303. static int __init ehci_orion_init(void)
  304. {
  305. if (usb_disabled())
  306. return -ENODEV;
  307. ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides);
  308. return platform_driver_register(&ehci_orion_driver);
  309. }
  310. module_init(ehci_orion_init);
  311. static void __exit ehci_orion_cleanup(void)
  312. {
  313. platform_driver_unregister(&ehci_orion_driver);
  314. }
  315. module_exit(ehci_orion_cleanup);
  316. MODULE_DESCRIPTION(DRIVER_DESC);
  317. MODULE_ALIAS("platform:orion-ehci");
  318. MODULE_AUTHOR("Tzachi Perelstein");
  319. MODULE_LICENSE("GPL v2");