max3421-hcd.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MAX3421 Host Controller driver for USB.
  4. *
  5. * Author: David Mosberger-Tang <davidm@egauge.net>
  6. *
  7. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  8. *
  9. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  10. * controller on a SPI bus.
  11. *
  12. * Based on:
  13. * o MAX3421E datasheet
  14. * https://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  15. * o MAX3421E Programming Guide
  16. * https://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  17. * o gadget/dummy_hcd.c
  18. * For USB HCD implementation.
  19. * o Arduino MAX3421 driver
  20. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  21. *
  22. * This file is licenced under the GPL v2.
  23. *
  24. * Important note on worst-case (full-speed) packet size constraints
  25. * (See USB 2.0 Section 5.6.3 and following):
  26. *
  27. * - control: 64 bytes
  28. * - isochronous: 1023 bytes
  29. * - interrupt: 64 bytes
  30. * - bulk: 64 bytes
  31. *
  32. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  33. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  34. * transfers. We don't support isochronous transfers at this time, so we
  35. * just assume that a USB packet always fits into a single FIFO buffer.
  36. *
  37. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  38. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  39. *
  40. * The description of RCVDAVIRQ says "The CPU *must* clear
  41. * this IRQ bit (by writing a 1 to it) before reading the
  42. * RCVFIFO data.
  43. *
  44. * However, the earlier section on "Programming BULK-IN
  45. * Transfers" says * that:
  46. *
  47. * After the CPU retrieves the data, it clears the
  48. * RCVDAVIRQ bit.
  49. *
  50. * The December 2006 version has been corrected and it consistently
  51. * states the second behavior is the correct one.
  52. *
  53. * Synchronous SPI transactions sleep so we can't perform any such
  54. * transactions while holding a spin-lock (and/or while interrupts are
  55. * masked). To achieve this, all SPI transactions are issued from a
  56. * single thread (max3421_spi_thread).
  57. */
  58. #include <linux/jiffies.h>
  59. #include <linux/module.h>
  60. #include <linux/spi/spi.h>
  61. #include <linux/usb.h>
  62. #include <linux/usb/hcd.h>
  63. #include <linux/of.h>
  64. #include <linux/platform_data/max3421-hcd.h>
  65. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  66. #define DRIVER_VERSION "1.0"
  67. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  68. #define USB_MAX_FRAME_NUMBER 0x7ff
  69. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  70. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  71. /* Port-change mask: */
  72. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  73. USB_PORT_STAT_C_ENABLE | \
  74. USB_PORT_STAT_C_SUSPEND | \
  75. USB_PORT_STAT_C_OVERCURRENT | \
  76. USB_PORT_STAT_C_RESET) << 16)
  77. #define MAX3421_GPOUT_COUNT 8
  78. enum max3421_rh_state {
  79. MAX3421_RH_RESET,
  80. MAX3421_RH_SUSPENDED,
  81. MAX3421_RH_RUNNING
  82. };
  83. enum pkt_state {
  84. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  85. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  86. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  87. };
  88. enum scheduling_pass {
  89. SCHED_PASS_PERIODIC,
  90. SCHED_PASS_NON_PERIODIC,
  91. SCHED_PASS_DONE
  92. };
  93. /* Bit numbers for max3421_hcd->todo: */
  94. enum {
  95. ENABLE_IRQ = 0,
  96. RESET_HCD,
  97. RESET_PORT,
  98. CHECK_UNLINK,
  99. IOPIN_UPDATE
  100. };
  101. struct max3421_dma_buf {
  102. u8 data[2];
  103. };
  104. struct max3421_hcd {
  105. spinlock_t lock;
  106. struct task_struct *spi_thread;
  107. enum max3421_rh_state rh_state;
  108. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  109. u32 port_status;
  110. unsigned active:1;
  111. struct list_head ep_list; /* list of EP's with work */
  112. /*
  113. * The following are owned by spi_thread (may be accessed by
  114. * SPI-thread without acquiring the HCD lock:
  115. */
  116. u8 rev; /* chip revision */
  117. u16 frame_number;
  118. /*
  119. * kmalloc'd buffers guaranteed to be in separate (DMA)
  120. * cache-lines:
  121. */
  122. struct max3421_dma_buf *tx;
  123. struct max3421_dma_buf *rx;
  124. /*
  125. * URB we're currently processing. Must not be reset to NULL
  126. * unless MAX3421E chip is idle:
  127. */
  128. struct urb *curr_urb;
  129. enum scheduling_pass sched_pass;
  130. int urb_done; /* > 0 -> no errors, < 0: errno */
  131. size_t curr_len;
  132. u8 hien;
  133. u8 mode;
  134. u8 iopins[2];
  135. unsigned long todo;
  136. #ifdef DEBUG
  137. unsigned long err_stat[16];
  138. #endif
  139. };
  140. struct max3421_ep {
  141. struct usb_host_endpoint *ep;
  142. struct list_head ep_list;
  143. u32 naks;
  144. u16 last_active; /* frame # this ep was last active */
  145. enum pkt_state pkt_state;
  146. u8 retries;
  147. u8 retransmit; /* packet needs retransmission */
  148. };
  149. #define MAX3421_FIFO_SIZE 64
  150. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  151. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  152. /* SPI commands: */
  153. #define MAX3421_SPI_DIR_SHIFT 1
  154. #define MAX3421_SPI_REG_SHIFT 3
  155. #define MAX3421_REG_RCVFIFO 1
  156. #define MAX3421_REG_SNDFIFO 2
  157. #define MAX3421_REG_SUDFIFO 4
  158. #define MAX3421_REG_RCVBC 6
  159. #define MAX3421_REG_SNDBC 7
  160. #define MAX3421_REG_USBIRQ 13
  161. #define MAX3421_REG_USBIEN 14
  162. #define MAX3421_REG_USBCTL 15
  163. #define MAX3421_REG_CPUCTL 16
  164. #define MAX3421_REG_PINCTL 17
  165. #define MAX3421_REG_REVISION 18
  166. #define MAX3421_REG_IOPINS1 20
  167. #define MAX3421_REG_IOPINS2 21
  168. #define MAX3421_REG_GPINIRQ 22
  169. #define MAX3421_REG_GPINIEN 23
  170. #define MAX3421_REG_GPINPOL 24
  171. #define MAX3421_REG_HIRQ 25
  172. #define MAX3421_REG_HIEN 26
  173. #define MAX3421_REG_MODE 27
  174. #define MAX3421_REG_PERADDR 28
  175. #define MAX3421_REG_HCTL 29
  176. #define MAX3421_REG_HXFR 30
  177. #define MAX3421_REG_HRSL 31
  178. enum {
  179. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  180. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  181. MAX3421_USBIRQ_VBUSIRQ_BIT
  182. };
  183. enum {
  184. MAX3421_CPUCTL_IE_BIT = 0,
  185. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  186. MAX3421_CPUCTL_PULSEWID1_BIT
  187. };
  188. enum {
  189. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  190. MAX3421_USBCTL_CHIPRES_BIT
  191. };
  192. enum {
  193. MAX3421_PINCTL_GPXA_BIT = 0,
  194. MAX3421_PINCTL_GPXB_BIT,
  195. MAX3421_PINCTL_POSINT_BIT,
  196. MAX3421_PINCTL_INTLEVEL_BIT,
  197. MAX3421_PINCTL_FDUPSPI_BIT,
  198. MAX3421_PINCTL_EP0INAK_BIT,
  199. MAX3421_PINCTL_EP2INAK_BIT,
  200. MAX3421_PINCTL_EP3INAK_BIT,
  201. };
  202. enum {
  203. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  204. MAX3421_HI_RWU_BIT, /* remote wakeup */
  205. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  206. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  207. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  208. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  209. MAX3421_HI_FRAME_BIT, /* frame generator */
  210. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  211. };
  212. enum {
  213. MAX3421_HCTL_BUSRST_BIT = 0,
  214. MAX3421_HCTL_FRMRST_BIT,
  215. MAX3421_HCTL_SAMPLEBUS_BIT,
  216. MAX3421_HCTL_SIGRSM_BIT,
  217. MAX3421_HCTL_RCVTOG0_BIT,
  218. MAX3421_HCTL_RCVTOG1_BIT,
  219. MAX3421_HCTL_SNDTOG0_BIT,
  220. MAX3421_HCTL_SNDTOG1_BIT
  221. };
  222. enum {
  223. MAX3421_MODE_HOST_BIT = 0,
  224. MAX3421_MODE_LOWSPEED_BIT,
  225. MAX3421_MODE_HUBPRE_BIT,
  226. MAX3421_MODE_SOFKAENAB_BIT,
  227. MAX3421_MODE_SEPIRQ_BIT,
  228. MAX3421_MODE_DELAYISO_BIT,
  229. MAX3421_MODE_DMPULLDN_BIT,
  230. MAX3421_MODE_DPPULLDN_BIT
  231. };
  232. enum {
  233. MAX3421_HRSL_OK = 0,
  234. MAX3421_HRSL_BUSY,
  235. MAX3421_HRSL_BADREQ,
  236. MAX3421_HRSL_UNDEF,
  237. MAX3421_HRSL_NAK,
  238. MAX3421_HRSL_STALL,
  239. MAX3421_HRSL_TOGERR,
  240. MAX3421_HRSL_WRONGPID,
  241. MAX3421_HRSL_BADBC,
  242. MAX3421_HRSL_PIDERR,
  243. MAX3421_HRSL_PKTERR,
  244. MAX3421_HRSL_CRCERR,
  245. MAX3421_HRSL_KERR,
  246. MAX3421_HRSL_JERR,
  247. MAX3421_HRSL_TIMEOUT,
  248. MAX3421_HRSL_BABBLE,
  249. MAX3421_HRSL_RESULT_MASK = 0xf,
  250. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  251. MAX3421_HRSL_SNDTOGRD_BIT,
  252. MAX3421_HRSL_KSTATUS_BIT,
  253. MAX3421_HRSL_JSTATUS_BIT
  254. };
  255. /* Return same error-codes as ohci.h:cc_to_error: */
  256. static const int hrsl_to_error[] = {
  257. [MAX3421_HRSL_OK] = 0,
  258. [MAX3421_HRSL_BUSY] = -EINVAL,
  259. [MAX3421_HRSL_BADREQ] = -EINVAL,
  260. [MAX3421_HRSL_UNDEF] = -EINVAL,
  261. [MAX3421_HRSL_NAK] = -EAGAIN,
  262. [MAX3421_HRSL_STALL] = -EPIPE,
  263. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  264. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  265. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  266. [MAX3421_HRSL_PIDERR] = -EPROTO,
  267. [MAX3421_HRSL_PKTERR] = -EPROTO,
  268. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  269. [MAX3421_HRSL_KERR] = -EIO,
  270. [MAX3421_HRSL_JERR] = -EIO,
  271. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  272. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  273. };
  274. /*
  275. * See https://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  276. * reasonable overview of how control transfers use the IN/OUT
  277. * tokens.
  278. */
  279. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  280. #define MAX3421_HXFR_SETUP 0x10
  281. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  282. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  283. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  284. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  285. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  286. #define field(val, bit) ((val) << (bit))
  287. static inline s16
  288. frame_diff(u16 left, u16 right)
  289. {
  290. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  291. }
  292. static inline struct max3421_hcd *
  293. hcd_to_max3421(struct usb_hcd *hcd)
  294. {
  295. return (struct max3421_hcd *) hcd->hcd_priv;
  296. }
  297. static inline struct usb_hcd *
  298. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  299. {
  300. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  301. }
  302. static u8
  303. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  304. {
  305. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  306. struct spi_device *spi = to_spi_device(hcd->self.controller);
  307. struct spi_transfer transfer;
  308. struct spi_message msg;
  309. memset(&transfer, 0, sizeof(transfer));
  310. spi_message_init(&msg);
  311. max3421_hcd->tx->data[0] =
  312. (field(reg, MAX3421_SPI_REG_SHIFT) |
  313. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  314. transfer.tx_buf = max3421_hcd->tx->data;
  315. transfer.rx_buf = max3421_hcd->rx->data;
  316. transfer.len = 2;
  317. spi_message_add_tail(&transfer, &msg);
  318. spi_sync(spi, &msg);
  319. return max3421_hcd->rx->data[1];
  320. }
  321. static void
  322. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  323. {
  324. struct spi_device *spi = to_spi_device(hcd->self.controller);
  325. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  326. struct spi_transfer transfer;
  327. struct spi_message msg;
  328. memset(&transfer, 0, sizeof(transfer));
  329. spi_message_init(&msg);
  330. max3421_hcd->tx->data[0] =
  331. (field(reg, MAX3421_SPI_REG_SHIFT) |
  332. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  333. max3421_hcd->tx->data[1] = val;
  334. transfer.tx_buf = max3421_hcd->tx->data;
  335. transfer.len = 2;
  336. spi_message_add_tail(&transfer, &msg);
  337. spi_sync(spi, &msg);
  338. }
  339. static void
  340. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  341. {
  342. struct spi_device *spi = to_spi_device(hcd->self.controller);
  343. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  344. struct spi_transfer transfer[2];
  345. struct spi_message msg;
  346. memset(transfer, 0, sizeof(transfer));
  347. spi_message_init(&msg);
  348. max3421_hcd->tx->data[0] =
  349. (field(reg, MAX3421_SPI_REG_SHIFT) |
  350. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  351. transfer[0].tx_buf = max3421_hcd->tx->data;
  352. transfer[0].len = 1;
  353. transfer[1].rx_buf = buf;
  354. transfer[1].len = len;
  355. spi_message_add_tail(&transfer[0], &msg);
  356. spi_message_add_tail(&transfer[1], &msg);
  357. spi_sync(spi, &msg);
  358. }
  359. static void
  360. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  361. {
  362. struct spi_device *spi = to_spi_device(hcd->self.controller);
  363. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  364. struct spi_transfer transfer[2];
  365. struct spi_message msg;
  366. memset(transfer, 0, sizeof(transfer));
  367. spi_message_init(&msg);
  368. max3421_hcd->tx->data[0] =
  369. (field(reg, MAX3421_SPI_REG_SHIFT) |
  370. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  371. transfer[0].tx_buf = max3421_hcd->tx->data;
  372. transfer[0].len = 1;
  373. transfer[1].tx_buf = buf;
  374. transfer[1].len = len;
  375. spi_message_add_tail(&transfer[0], &msg);
  376. spi_message_add_tail(&transfer[1], &msg);
  377. spi_sync(spi, &msg);
  378. }
  379. /*
  380. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  381. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  382. * full speed, but it's talking to a low-speed device (i.e., through a
  383. * hub). Setting that bit ensures that every low-speed packet is
  384. * preceded by a full-speed PRE PID. Possible configurations:
  385. *
  386. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  387. * FULL FULL => 0 0
  388. * FULL LOW => 1 1
  389. * LOW LOW => 1 0
  390. * LOW FULL => 1 0
  391. */
  392. static void
  393. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  394. {
  395. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  396. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  397. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  398. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  399. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  400. mode |= mode_lowspeed;
  401. mode &= ~mode_hubpre;
  402. } else if (dev->speed == USB_SPEED_LOW) {
  403. mode |= mode_lowspeed | mode_hubpre;
  404. } else {
  405. mode &= ~(mode_lowspeed | mode_hubpre);
  406. }
  407. if (mode != max3421_hcd->mode) {
  408. max3421_hcd->mode = mode;
  409. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  410. }
  411. }
  412. /*
  413. * Caller must NOT hold HCD spinlock.
  414. */
  415. static void
  416. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum)
  417. {
  418. int rcvtog, sndtog;
  419. u8 hctl;
  420. /* setup new endpoint's toggle bits: */
  421. rcvtog = usb_gettoggle(dev, epnum, 0);
  422. sndtog = usb_gettoggle(dev, epnum, 1);
  423. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  424. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  425. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  426. /*
  427. * Note: devnum for one and the same device can change during
  428. * address-assignment so it's best to just always load the
  429. * address whenever the end-point changed/was forced.
  430. */
  431. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  432. }
  433. static int
  434. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  435. {
  436. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  437. return MAX3421_HXFR_SETUP;
  438. }
  439. static int
  440. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  441. {
  442. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  443. int epnum = usb_pipeendpoint(urb->pipe);
  444. max3421_hcd->curr_len = 0;
  445. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  446. return MAX3421_HXFR_BULK_IN(epnum);
  447. }
  448. static int
  449. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  450. {
  451. struct spi_device *spi = to_spi_device(hcd->self.controller);
  452. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  453. int epnum = usb_pipeendpoint(urb->pipe);
  454. u32 max_packet;
  455. void *src;
  456. src = urb->transfer_buffer + urb->actual_length;
  457. if (fast_retransmit) {
  458. if (max3421_hcd->rev == 0x12) {
  459. /* work around rev 0x12 bug: */
  460. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  461. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  462. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  463. }
  464. return MAX3421_HXFR_BULK_OUT(epnum);
  465. }
  466. max_packet = usb_maxpacket(urb->dev, urb->pipe);
  467. if (max_packet > MAX3421_FIFO_SIZE) {
  468. /*
  469. * We do not support isochronous transfers at this
  470. * time.
  471. */
  472. dev_err(&spi->dev,
  473. "%s: packet-size of %u too big (limit is %u bytes)",
  474. __func__, max_packet, MAX3421_FIFO_SIZE);
  475. max3421_hcd->urb_done = -EMSGSIZE;
  476. return -EMSGSIZE;
  477. }
  478. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  479. urb->actual_length), max_packet);
  480. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  481. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  482. return MAX3421_HXFR_BULK_OUT(epnum);
  483. }
  484. /*
  485. * Issue the next host-transfer command.
  486. * Caller must NOT hold HCD spinlock.
  487. */
  488. static void
  489. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  490. {
  491. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  492. struct urb *urb = max3421_hcd->curr_urb;
  493. struct max3421_ep *max3421_ep;
  494. int cmd = -EINVAL;
  495. if (!urb)
  496. return; /* nothing to do */
  497. max3421_ep = urb->ep->hcpriv;
  498. switch (max3421_ep->pkt_state) {
  499. case PKT_STATE_SETUP:
  500. cmd = max3421_ctrl_setup(hcd, urb);
  501. break;
  502. case PKT_STATE_TRANSFER:
  503. if (usb_urb_dir_in(urb))
  504. cmd = max3421_transfer_in(hcd, urb);
  505. else
  506. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  507. break;
  508. case PKT_STATE_TERMINATE:
  509. /*
  510. * IN transfers are terminated with HS_OUT token,
  511. * OUT transfers with HS_IN:
  512. */
  513. if (usb_urb_dir_in(urb))
  514. cmd = MAX3421_HXFR_HS_OUT;
  515. else
  516. cmd = MAX3421_HXFR_HS_IN;
  517. break;
  518. }
  519. if (cmd < 0)
  520. return;
  521. /* issue the command and wait for host-xfer-done interrupt: */
  522. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  523. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  524. }
  525. /*
  526. * Find the next URB to process and start its execution.
  527. *
  528. * At this time, we do not anticipate ever connecting a USB hub to the
  529. * MAX3421 chip, so at most USB device can be connected and we can use
  530. * a simplistic scheduler: at the start of a frame, schedule all
  531. * periodic transfers. Once that is done, use the remainder of the
  532. * frame to process non-periodic (bulk & control) transfers.
  533. *
  534. * Preconditions:
  535. * o Caller must NOT hold HCD spinlock.
  536. * o max3421_hcd->curr_urb MUST BE NULL.
  537. * o MAX3421E chip must be idle.
  538. */
  539. static int
  540. max3421_select_and_start_urb(struct usb_hcd *hcd)
  541. {
  542. struct spi_device *spi = to_spi_device(hcd->self.controller);
  543. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  544. struct urb *urb, *curr_urb = NULL;
  545. struct max3421_ep *max3421_ep;
  546. int epnum;
  547. struct usb_host_endpoint *ep;
  548. struct list_head *pos;
  549. unsigned long flags;
  550. spin_lock_irqsave(&max3421_hcd->lock, flags);
  551. for (;
  552. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  553. ++max3421_hcd->sched_pass)
  554. list_for_each(pos, &max3421_hcd->ep_list) {
  555. urb = NULL;
  556. max3421_ep = container_of(pos, struct max3421_ep,
  557. ep_list);
  558. ep = max3421_ep->ep;
  559. switch (usb_endpoint_type(&ep->desc)) {
  560. case USB_ENDPOINT_XFER_ISOC:
  561. case USB_ENDPOINT_XFER_INT:
  562. if (max3421_hcd->sched_pass !=
  563. SCHED_PASS_PERIODIC)
  564. continue;
  565. break;
  566. case USB_ENDPOINT_XFER_CONTROL:
  567. case USB_ENDPOINT_XFER_BULK:
  568. if (max3421_hcd->sched_pass !=
  569. SCHED_PASS_NON_PERIODIC)
  570. continue;
  571. break;
  572. }
  573. if (list_empty(&ep->urb_list))
  574. continue; /* nothing to do */
  575. urb = list_first_entry(&ep->urb_list, struct urb,
  576. urb_list);
  577. if (urb->unlinked) {
  578. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  579. __func__, urb, urb->unlinked);
  580. max3421_hcd->curr_urb = urb;
  581. max3421_hcd->urb_done = 1;
  582. spin_unlock_irqrestore(&max3421_hcd->lock,
  583. flags);
  584. return 1;
  585. }
  586. switch (usb_endpoint_type(&ep->desc)) {
  587. case USB_ENDPOINT_XFER_CONTROL:
  588. /*
  589. * Allow one control transaction per
  590. * frame per endpoint:
  591. */
  592. if (frame_diff(max3421_ep->last_active,
  593. max3421_hcd->frame_number) == 0)
  594. continue;
  595. break;
  596. case USB_ENDPOINT_XFER_BULK:
  597. if (max3421_ep->retransmit
  598. && (frame_diff(max3421_ep->last_active,
  599. max3421_hcd->frame_number)
  600. == 0))
  601. /*
  602. * We already tried this EP
  603. * during this frame and got a
  604. * NAK or error; wait for next frame
  605. */
  606. continue;
  607. break;
  608. case USB_ENDPOINT_XFER_ISOC:
  609. case USB_ENDPOINT_XFER_INT:
  610. if (frame_diff(max3421_hcd->frame_number,
  611. max3421_ep->last_active)
  612. < urb->interval)
  613. /*
  614. * We already processed this
  615. * end-point in the current
  616. * frame
  617. */
  618. continue;
  619. break;
  620. }
  621. /* move current ep to tail: */
  622. list_move_tail(pos, &max3421_hcd->ep_list);
  623. curr_urb = urb;
  624. goto done;
  625. }
  626. done:
  627. if (!curr_urb) {
  628. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  629. return 0;
  630. }
  631. urb = max3421_hcd->curr_urb = curr_urb;
  632. epnum = usb_endpoint_num(&urb->ep->desc);
  633. if (max3421_ep->retransmit)
  634. /* restart (part of) a USB transaction: */
  635. max3421_ep->retransmit = 0;
  636. else {
  637. /* start USB transaction: */
  638. if (usb_endpoint_xfer_control(&ep->desc)) {
  639. /*
  640. * See USB 2.0 spec section 8.6.1
  641. * Initialization via SETUP Token:
  642. */
  643. usb_settoggle(urb->dev, epnum, 0, 1);
  644. usb_settoggle(urb->dev, epnum, 1, 1);
  645. max3421_ep->pkt_state = PKT_STATE_SETUP;
  646. } else
  647. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  648. }
  649. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  650. max3421_ep->last_active = max3421_hcd->frame_number;
  651. max3421_set_address(hcd, urb->dev, epnum);
  652. max3421_set_speed(hcd, urb->dev);
  653. max3421_next_transfer(hcd, 0);
  654. return 1;
  655. }
  656. /*
  657. * Check all endpoints for URBs that got unlinked.
  658. *
  659. * Caller must NOT hold HCD spinlock.
  660. */
  661. static int
  662. max3421_check_unlink(struct usb_hcd *hcd)
  663. {
  664. struct spi_device *spi = to_spi_device(hcd->self.controller);
  665. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  666. struct max3421_ep *max3421_ep;
  667. struct usb_host_endpoint *ep;
  668. struct urb *urb, *next;
  669. unsigned long flags;
  670. int retval = 0;
  671. spin_lock_irqsave(&max3421_hcd->lock, flags);
  672. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  673. ep = max3421_ep->ep;
  674. list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
  675. if (urb->unlinked) {
  676. retval = 1;
  677. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  678. __func__, urb, urb->unlinked);
  679. if (urb == max3421_hcd->curr_urb) {
  680. max3421_hcd->urb_done = 1;
  681. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  682. BIT(MAX3421_HI_RCVDAV_BIT));
  683. } else {
  684. usb_hcd_unlink_urb_from_ep(hcd, urb);
  685. spin_unlock_irqrestore(&max3421_hcd->lock,
  686. flags);
  687. usb_hcd_giveback_urb(hcd, urb, 0);
  688. spin_lock_irqsave(&max3421_hcd->lock, flags);
  689. }
  690. }
  691. }
  692. }
  693. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  694. return retval;
  695. }
  696. /*
  697. * Caller must NOT hold HCD spinlock.
  698. */
  699. static void
  700. max3421_slow_retransmit(struct usb_hcd *hcd)
  701. {
  702. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  703. struct urb *urb = max3421_hcd->curr_urb;
  704. struct max3421_ep *max3421_ep;
  705. max3421_ep = urb->ep->hcpriv;
  706. max3421_ep->retransmit = 1;
  707. max3421_hcd->curr_urb = NULL;
  708. }
  709. /*
  710. * Caller must NOT hold HCD spinlock.
  711. */
  712. static void
  713. max3421_recv_data_available(struct usb_hcd *hcd)
  714. {
  715. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  716. struct urb *urb = max3421_hcd->curr_urb;
  717. size_t remaining, transfer_size;
  718. u8 rcvbc;
  719. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  720. if (rcvbc > MAX3421_FIFO_SIZE)
  721. rcvbc = MAX3421_FIFO_SIZE;
  722. if (urb->actual_length >= urb->transfer_buffer_length)
  723. remaining = 0;
  724. else
  725. remaining = urb->transfer_buffer_length - urb->actual_length;
  726. transfer_size = rcvbc;
  727. if (transfer_size > remaining)
  728. transfer_size = remaining;
  729. if (transfer_size > 0) {
  730. void *dst = urb->transfer_buffer + urb->actual_length;
  731. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  732. urb->actual_length += transfer_size;
  733. max3421_hcd->curr_len = transfer_size;
  734. }
  735. /* ack the RCVDAV irq now that the FIFO has been read: */
  736. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  737. }
  738. static void
  739. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  740. {
  741. struct spi_device *spi = to_spi_device(hcd->self.controller);
  742. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  743. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  744. struct urb *urb = max3421_hcd->curr_urb;
  745. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  746. int switch_sndfifo;
  747. /*
  748. * If an OUT command results in any response other than OK
  749. * (i.e., error or NAK), we have to perform a dummy-write to
  750. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  751. * get out of sync with the SNDFIFO double buffer.
  752. */
  753. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  754. usb_urb_dir_out(urb));
  755. switch (result_code) {
  756. case MAX3421_HRSL_OK:
  757. return; /* this shouldn't happen */
  758. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  759. case MAX3421_HRSL_BUSY: /* SIE busy */
  760. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  761. case MAX3421_HRSL_UNDEF: /* reserved */
  762. case MAX3421_HRSL_KERR: /* K-state instead of response */
  763. case MAX3421_HRSL_JERR: /* J-state instead of response */
  764. /*
  765. * packet experienced an error that we cannot recover
  766. * from; report error
  767. */
  768. max3421_hcd->urb_done = hrsl_to_error[result_code];
  769. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  770. __func__, hrsl);
  771. break;
  772. case MAX3421_HRSL_TOGERR:
  773. if (usb_urb_dir_in(urb))
  774. ; /* don't do anything (device will switch toggle) */
  775. else {
  776. /* flip the send toggle bit: */
  777. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  778. sndtog ^= 1;
  779. spi_wr8(hcd, MAX3421_REG_HCTL,
  780. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  781. }
  782. fallthrough;
  783. case MAX3421_HRSL_BADBC: /* bad byte count */
  784. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  785. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  786. case MAX3421_HRSL_CRCERR: /* CRC error */
  787. case MAX3421_HRSL_BABBLE: /* device talked too long */
  788. case MAX3421_HRSL_TIMEOUT:
  789. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  790. /* retry the packet again in the next frame */
  791. max3421_slow_retransmit(hcd);
  792. else {
  793. /* Based on ohci.h cc_to_err[]: */
  794. max3421_hcd->urb_done = hrsl_to_error[result_code];
  795. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  796. __func__, hrsl);
  797. }
  798. break;
  799. case MAX3421_HRSL_STALL:
  800. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  801. __func__, hrsl);
  802. max3421_hcd->urb_done = hrsl_to_error[result_code];
  803. break;
  804. case MAX3421_HRSL_NAK:
  805. /*
  806. * Device wasn't ready for data or has no data
  807. * available: retry the packet again.
  808. */
  809. max3421_next_transfer(hcd, 1);
  810. switch_sndfifo = 0;
  811. break;
  812. }
  813. if (switch_sndfifo)
  814. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  815. }
  816. /*
  817. * Caller must NOT hold HCD spinlock.
  818. */
  819. static int
  820. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  821. {
  822. struct spi_device *spi = to_spi_device(hcd->self.controller);
  823. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  824. u32 max_packet;
  825. if (urb->actual_length >= urb->transfer_buffer_length)
  826. return 1; /* read is complete, so we're done */
  827. /*
  828. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  829. * except for last one.
  830. */
  831. max_packet = usb_maxpacket(urb->dev, urb->pipe);
  832. if (max_packet > MAX3421_FIFO_SIZE) {
  833. /*
  834. * We do not support isochronous transfers at this
  835. * time...
  836. */
  837. dev_err(&spi->dev,
  838. "%s: packet-size of %u too big (limit is %u bytes)",
  839. __func__, max_packet, MAX3421_FIFO_SIZE);
  840. return -EINVAL;
  841. }
  842. if (max3421_hcd->curr_len < max_packet) {
  843. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  844. /*
  845. * remaining > 0 and received an
  846. * unexpected partial packet ->
  847. * error
  848. */
  849. return -EREMOTEIO;
  850. } else
  851. /* short read, but it's OK */
  852. return 1;
  853. }
  854. return 0; /* not done */
  855. }
  856. /*
  857. * Caller must NOT hold HCD spinlock.
  858. */
  859. static int
  860. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  861. {
  862. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  863. urb->actual_length += max3421_hcd->curr_len;
  864. if (urb->actual_length < urb->transfer_buffer_length)
  865. return 0;
  866. if (urb->transfer_flags & URB_ZERO_PACKET) {
  867. /*
  868. * Some hardware needs a zero-size packet at the end
  869. * of a bulk-out transfer if the last transfer was a
  870. * full-sized packet (i.e., such hardware use <
  871. * max_packet as an indicator that the end of the
  872. * packet has been reached).
  873. */
  874. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe);
  875. if (max3421_hcd->curr_len == max_packet)
  876. return 0;
  877. }
  878. return 1;
  879. }
  880. /*
  881. * Caller must NOT hold HCD spinlock.
  882. */
  883. static void
  884. max3421_host_transfer_done(struct usb_hcd *hcd)
  885. {
  886. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  887. struct urb *urb = max3421_hcd->curr_urb;
  888. struct max3421_ep *max3421_ep;
  889. u8 result_code, hrsl;
  890. int urb_done = 0;
  891. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  892. BIT(MAX3421_HI_RCVDAV_BIT));
  893. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  894. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  895. #ifdef DEBUG
  896. ++max3421_hcd->err_stat[result_code];
  897. #endif
  898. max3421_ep = urb->ep->hcpriv;
  899. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  900. max3421_handle_error(hcd, hrsl);
  901. return;
  902. }
  903. max3421_ep->naks = 0;
  904. max3421_ep->retries = 0;
  905. switch (max3421_ep->pkt_state) {
  906. case PKT_STATE_SETUP:
  907. if (urb->transfer_buffer_length > 0)
  908. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  909. else
  910. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  911. break;
  912. case PKT_STATE_TRANSFER:
  913. if (usb_urb_dir_in(urb))
  914. urb_done = max3421_transfer_in_done(hcd, urb);
  915. else
  916. urb_done = max3421_transfer_out_done(hcd, urb);
  917. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  918. /*
  919. * We aren't really done - we still need to
  920. * terminate the control transfer:
  921. */
  922. max3421_hcd->urb_done = urb_done = 0;
  923. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  924. }
  925. break;
  926. case PKT_STATE_TERMINATE:
  927. urb_done = 1;
  928. break;
  929. }
  930. if (urb_done)
  931. max3421_hcd->urb_done = urb_done;
  932. else
  933. max3421_next_transfer(hcd, 0);
  934. }
  935. /*
  936. * Caller must NOT hold HCD spinlock.
  937. */
  938. static void
  939. max3421_detect_conn(struct usb_hcd *hcd)
  940. {
  941. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  942. unsigned int jk, have_conn = 0;
  943. u32 old_port_status, chg;
  944. unsigned long flags;
  945. u8 hrsl, mode;
  946. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  947. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  948. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  949. mode = max3421_hcd->mode;
  950. switch (jk) {
  951. case 0x0: /* SE0: disconnect */
  952. /*
  953. * Turn off SOFKAENAB bit to avoid getting interrupt
  954. * every milli-second:
  955. */
  956. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  957. break;
  958. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  959. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  960. if (jk == 0x2)
  961. /* need to switch to the other speed: */
  962. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  963. /* turn on SOFKAENAB bit: */
  964. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  965. have_conn = 1;
  966. break;
  967. case 0x3: /* illegal */
  968. break;
  969. }
  970. max3421_hcd->mode = mode;
  971. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  972. spin_lock_irqsave(&max3421_hcd->lock, flags);
  973. old_port_status = max3421_hcd->port_status;
  974. if (have_conn)
  975. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  976. else
  977. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  978. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  979. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  980. else
  981. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  982. chg = (old_port_status ^ max3421_hcd->port_status);
  983. max3421_hcd->port_status |= chg << 16;
  984. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  985. }
  986. static irqreturn_t
  987. max3421_irq_handler(int irq, void *dev_id)
  988. {
  989. struct usb_hcd *hcd = dev_id;
  990. struct spi_device *spi = to_spi_device(hcd->self.controller);
  991. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  992. if (max3421_hcd->spi_thread)
  993. wake_up_process(max3421_hcd->spi_thread);
  994. if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
  995. disable_irq_nosync(spi->irq);
  996. return IRQ_HANDLED;
  997. }
  998. #ifdef DEBUG
  999. static void
  1000. dump_eps(struct usb_hcd *hcd)
  1001. {
  1002. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1003. struct max3421_ep *max3421_ep;
  1004. struct usb_host_endpoint *ep;
  1005. char ubuf[512], *dp, *end;
  1006. unsigned long flags;
  1007. struct urb *urb;
  1008. int epnum, ret;
  1009. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1010. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  1011. ep = max3421_ep->ep;
  1012. dp = ubuf;
  1013. end = dp + sizeof(ubuf);
  1014. *dp = '\0';
  1015. list_for_each_entry(urb, &ep->urb_list, urb_list) {
  1016. ret = scnprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1017. usb_pipetype(urb->pipe),
  1018. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1019. urb->actual_length,
  1020. urb->transfer_buffer_length);
  1021. if (ret == end - dp - 1)
  1022. break; /* error or buffer full */
  1023. dp += ret;
  1024. }
  1025. epnum = usb_endpoint_num(&ep->desc);
  1026. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1027. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1028. max3421_ep->retries, max3421_ep->naks,
  1029. max3421_ep->retransmit, ubuf);
  1030. }
  1031. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1032. }
  1033. #endif /* DEBUG */
  1034. /* Return zero if no work was performed, 1 otherwise. */
  1035. static int
  1036. max3421_handle_irqs(struct usb_hcd *hcd)
  1037. {
  1038. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1039. u32 chg, old_port_status;
  1040. unsigned long flags;
  1041. u8 hirq;
  1042. /*
  1043. * Read and ack pending interrupts (CPU must never
  1044. * clear SNDBAV directly and RCVDAV must be cleared by
  1045. * max3421_recv_data_available()!):
  1046. */
  1047. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1048. hirq &= max3421_hcd->hien;
  1049. if (!hirq)
  1050. return 0;
  1051. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1052. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1053. BIT(MAX3421_HI_RCVDAV_BIT)));
  1054. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1055. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1056. & USB_MAX_FRAME_NUMBER);
  1057. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1058. }
  1059. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1060. max3421_recv_data_available(hcd);
  1061. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1062. max3421_host_transfer_done(hcd);
  1063. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1064. max3421_detect_conn(hcd);
  1065. /*
  1066. * Now process interrupts that may affect HCD state
  1067. * other than the end-points:
  1068. */
  1069. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1070. old_port_status = max3421_hcd->port_status;
  1071. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1072. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1073. /* BUSEVENT due to completion of Bus Reset */
  1074. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1075. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1076. } else {
  1077. /* BUSEVENT due to completion of Bus Resume */
  1078. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1079. }
  1080. }
  1081. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1082. pr_info("%s: RWU\n", __func__);
  1083. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1084. pr_info("%s: SUSDN\n", __func__);
  1085. chg = (old_port_status ^ max3421_hcd->port_status);
  1086. max3421_hcd->port_status |= chg << 16;
  1087. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1088. #ifdef DEBUG
  1089. {
  1090. static unsigned long last_time;
  1091. char sbuf[16 * 16], *dp, *end;
  1092. int i;
  1093. if (time_after(jiffies, last_time + 5*HZ)) {
  1094. dp = sbuf;
  1095. end = sbuf + sizeof(sbuf);
  1096. *dp = '\0';
  1097. for (i = 0; i < 16; ++i) {
  1098. int ret = scnprintf(dp, end - dp, " %lu",
  1099. max3421_hcd->err_stat[i]);
  1100. if (ret == end - dp - 1)
  1101. break; /* error or buffer full */
  1102. dp += ret;
  1103. }
  1104. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1105. memset(max3421_hcd->err_stat, 0,
  1106. sizeof(max3421_hcd->err_stat));
  1107. last_time = jiffies;
  1108. dump_eps(hcd);
  1109. }
  1110. }
  1111. #endif
  1112. return 1;
  1113. }
  1114. static int
  1115. max3421_reset_hcd(struct usb_hcd *hcd)
  1116. {
  1117. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1118. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1119. int timeout;
  1120. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1121. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1122. /* clear reset: */
  1123. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1124. timeout = 1000;
  1125. while (1) {
  1126. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1127. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1128. break;
  1129. if (--timeout < 0) {
  1130. dev_err(&spi->dev,
  1131. "timed out waiting for oscillator OK signal");
  1132. return 1;
  1133. }
  1134. cond_resched();
  1135. }
  1136. /*
  1137. * Turn on host mode, automatic generation of SOF packets, and
  1138. * enable pull-down registers on DM/DP:
  1139. */
  1140. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1141. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1142. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1143. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1144. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1145. /* reset frame-number: */
  1146. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1147. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1148. /* sample the state of the D+ and D- lines */
  1149. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1150. max3421_detect_conn(hcd);
  1151. /* enable frame, connection-detected, and bus-event interrupts: */
  1152. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1153. BIT(MAX3421_HI_CONDET_BIT) |
  1154. BIT(MAX3421_HI_BUSEVENT_BIT));
  1155. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1156. /* enable interrupts: */
  1157. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1158. return 1;
  1159. }
  1160. static int
  1161. max3421_urb_done(struct usb_hcd *hcd)
  1162. {
  1163. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1164. unsigned long flags;
  1165. struct urb *urb;
  1166. int status;
  1167. status = max3421_hcd->urb_done;
  1168. max3421_hcd->urb_done = 0;
  1169. if (status > 0)
  1170. status = 0;
  1171. urb = max3421_hcd->curr_urb;
  1172. if (urb) {
  1173. /* save the old end-points toggles: */
  1174. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  1175. int rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  1176. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  1177. int epnum = usb_endpoint_num(&urb->ep->desc);
  1178. /* no locking: HCD (i.e., we) own toggles, don't we? */
  1179. usb_settoggle(urb->dev, epnum, 0, rcvtog);
  1180. usb_settoggle(urb->dev, epnum, 1, sndtog);
  1181. max3421_hcd->curr_urb = NULL;
  1182. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1183. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1184. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1185. /* must be called without the HCD spinlock: */
  1186. usb_hcd_giveback_urb(hcd, urb, status);
  1187. }
  1188. return 1;
  1189. }
  1190. static int
  1191. max3421_spi_thread(void *dev_id)
  1192. {
  1193. struct usb_hcd *hcd = dev_id;
  1194. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1195. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1196. int i, i_worked = 1;
  1197. /* set full-duplex SPI mode, low-active interrupt pin: */
  1198. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1199. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1200. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1201. while (!kthread_should_stop()) {
  1202. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1203. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1204. break;
  1205. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1206. msleep(10000);
  1207. }
  1208. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1209. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1210. spi->irq);
  1211. while (!kthread_should_stop()) {
  1212. if (!i_worked) {
  1213. /*
  1214. * We'll be waiting for wakeups from the hard
  1215. * interrupt handler, so now is a good time to
  1216. * sync our hien with the chip:
  1217. */
  1218. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1219. set_current_state(TASK_INTERRUPTIBLE);
  1220. if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1221. enable_irq(spi->irq);
  1222. schedule();
  1223. __set_current_state(TASK_RUNNING);
  1224. }
  1225. i_worked = 0;
  1226. if (max3421_hcd->urb_done)
  1227. i_worked |= max3421_urb_done(hcd);
  1228. else if (max3421_handle_irqs(hcd))
  1229. i_worked = 1;
  1230. else if (!max3421_hcd->curr_urb)
  1231. i_worked |= max3421_select_and_start_urb(hcd);
  1232. if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
  1233. /* reset the HCD: */
  1234. i_worked |= max3421_reset_hcd(hcd);
  1235. if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
  1236. /* perform a USB bus reset: */
  1237. spi_wr8(hcd, MAX3421_REG_HCTL,
  1238. BIT(MAX3421_HCTL_BUSRST_BIT));
  1239. i_worked = 1;
  1240. }
  1241. if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
  1242. i_worked |= max3421_check_unlink(hcd);
  1243. if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
  1244. /*
  1245. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1246. * use spi_wr_buf().
  1247. */
  1248. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1249. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1 + i);
  1250. val = ((val & 0xf0) |
  1251. (max3421_hcd->iopins[i] & 0x0f));
  1252. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1253. max3421_hcd->iopins[i] = val;
  1254. }
  1255. i_worked = 1;
  1256. }
  1257. }
  1258. set_current_state(TASK_RUNNING);
  1259. dev_info(&spi->dev, "SPI thread exiting");
  1260. return 0;
  1261. }
  1262. static int
  1263. max3421_reset_port(struct usb_hcd *hcd)
  1264. {
  1265. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1266. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1267. USB_PORT_STAT_LOW_SPEED);
  1268. max3421_hcd->port_status |= USB_PORT_STAT_RESET;
  1269. set_bit(RESET_PORT, &max3421_hcd->todo);
  1270. wake_up_process(max3421_hcd->spi_thread);
  1271. return 0;
  1272. }
  1273. static int
  1274. max3421_reset(struct usb_hcd *hcd)
  1275. {
  1276. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1277. hcd->self.sg_tablesize = 0;
  1278. hcd->speed = HCD_USB2;
  1279. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1280. set_bit(RESET_HCD, &max3421_hcd->todo);
  1281. wake_up_process(max3421_hcd->spi_thread);
  1282. return 0;
  1283. }
  1284. static int
  1285. max3421_start(struct usb_hcd *hcd)
  1286. {
  1287. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1288. spin_lock_init(&max3421_hcd->lock);
  1289. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1290. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1291. hcd->power_budget = POWER_BUDGET;
  1292. hcd->state = HC_STATE_RUNNING;
  1293. hcd->uses_new_polling = 1;
  1294. return 0;
  1295. }
  1296. static void
  1297. max3421_stop(struct usb_hcd *hcd)
  1298. {
  1299. }
  1300. static int
  1301. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1302. {
  1303. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1304. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1305. struct max3421_ep *max3421_ep;
  1306. unsigned long flags;
  1307. int retval;
  1308. switch (usb_pipetype(urb->pipe)) {
  1309. case PIPE_INTERRUPT:
  1310. case PIPE_ISOCHRONOUS:
  1311. if (urb->interval < 0) {
  1312. dev_err(&spi->dev,
  1313. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1314. __func__, urb->interval);
  1315. return -EINVAL;
  1316. }
  1317. break;
  1318. default:
  1319. break;
  1320. }
  1321. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1322. max3421_ep = urb->ep->hcpriv;
  1323. if (!max3421_ep) {
  1324. /* gets freed in max3421_endpoint_disable: */
  1325. max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
  1326. if (!max3421_ep) {
  1327. retval = -ENOMEM;
  1328. goto out;
  1329. }
  1330. max3421_ep->ep = urb->ep;
  1331. max3421_ep->last_active = max3421_hcd->frame_number;
  1332. urb->ep->hcpriv = max3421_ep;
  1333. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1334. }
  1335. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1336. if (retval == 0) {
  1337. /* Since we added to the queue, restart scheduling: */
  1338. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1339. wake_up_process(max3421_hcd->spi_thread);
  1340. }
  1341. out:
  1342. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1343. return retval;
  1344. }
  1345. static int
  1346. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1347. {
  1348. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1349. unsigned long flags;
  1350. int retval;
  1351. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1352. /*
  1353. * This will set urb->unlinked which in turn causes the entry
  1354. * to be dropped at the next opportunity.
  1355. */
  1356. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1357. if (retval == 0) {
  1358. set_bit(CHECK_UNLINK, &max3421_hcd->todo);
  1359. wake_up_process(max3421_hcd->spi_thread);
  1360. }
  1361. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1362. return retval;
  1363. }
  1364. static void
  1365. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1366. {
  1367. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1368. unsigned long flags;
  1369. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1370. if (ep->hcpriv) {
  1371. struct max3421_ep *max3421_ep = ep->hcpriv;
  1372. /* remove myself from the ep_list: */
  1373. if (!list_empty(&max3421_ep->ep_list))
  1374. list_del(&max3421_ep->ep_list);
  1375. kfree(max3421_ep);
  1376. ep->hcpriv = NULL;
  1377. }
  1378. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1379. }
  1380. static int
  1381. max3421_get_frame_number(struct usb_hcd *hcd)
  1382. {
  1383. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1384. return max3421_hcd->frame_number;
  1385. }
  1386. /*
  1387. * Should return a non-zero value when any port is undergoing a resume
  1388. * transition while the root hub is suspended.
  1389. */
  1390. static int
  1391. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1392. {
  1393. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1394. unsigned long flags;
  1395. int retval = 0;
  1396. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1397. if (!HCD_HW_ACCESSIBLE(hcd))
  1398. goto done;
  1399. *buf = 0;
  1400. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1401. *buf = (1 << 1); /* a hub over-current condition exists */
  1402. dev_dbg(hcd->self.controller,
  1403. "port status 0x%08x has changes\n",
  1404. max3421_hcd->port_status);
  1405. retval = 1;
  1406. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1407. usb_hcd_resume_root_hub(hcd);
  1408. }
  1409. done:
  1410. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1411. return retval;
  1412. }
  1413. static inline void
  1414. hub_descriptor(struct usb_hub_descriptor *desc)
  1415. {
  1416. memset(desc, 0, sizeof(*desc));
  1417. /*
  1418. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1419. */
  1420. desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
  1421. desc->bDescLength = 9;
  1422. desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
  1423. HUB_CHAR_COMMON_OCPM);
  1424. desc->bNbrPorts = 1;
  1425. }
  1426. /*
  1427. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1428. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1429. * any other value, this function acts as a no-op.
  1430. */
  1431. static void
  1432. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1433. {
  1434. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1435. u8 mask, idx;
  1436. --pin_number;
  1437. if (pin_number >= MAX3421_GPOUT_COUNT)
  1438. return;
  1439. mask = 1u << (pin_number % 4);
  1440. idx = pin_number / 4;
  1441. if (value)
  1442. max3421_hcd->iopins[idx] |= mask;
  1443. else
  1444. max3421_hcd->iopins[idx] &= ~mask;
  1445. set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
  1446. wake_up_process(max3421_hcd->spi_thread);
  1447. }
  1448. static int
  1449. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1450. char *buf, u16 length)
  1451. {
  1452. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1453. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1454. struct max3421_hcd_platform_data *pdata;
  1455. unsigned long flags;
  1456. int retval = 0;
  1457. pdata = spi->dev.platform_data;
  1458. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1459. switch (type_req) {
  1460. case ClearHubFeature:
  1461. break;
  1462. case ClearPortFeature:
  1463. switch (value) {
  1464. case USB_PORT_FEAT_SUSPEND:
  1465. break;
  1466. case USB_PORT_FEAT_POWER:
  1467. dev_dbg(hcd->self.controller, "power-off\n");
  1468. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1469. !pdata->vbus_active_level);
  1470. fallthrough;
  1471. default:
  1472. max3421_hcd->port_status &= ~(1 << value);
  1473. }
  1474. break;
  1475. case GetHubDescriptor:
  1476. hub_descriptor((struct usb_hub_descriptor *) buf);
  1477. break;
  1478. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1479. case GetPortErrorCount:
  1480. case SetHubDepth:
  1481. /* USB3 only */
  1482. goto error;
  1483. case GetHubStatus:
  1484. *(__le32 *) buf = cpu_to_le32(0);
  1485. break;
  1486. case GetPortStatus:
  1487. if (index != 1) {
  1488. retval = -EPIPE;
  1489. goto error;
  1490. }
  1491. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1492. ((__le16 *) buf)[1] =
  1493. cpu_to_le16(max3421_hcd->port_status >> 16);
  1494. break;
  1495. case SetHubFeature:
  1496. retval = -EPIPE;
  1497. break;
  1498. case SetPortFeature:
  1499. switch (value) {
  1500. case USB_PORT_FEAT_LINK_STATE:
  1501. case USB_PORT_FEAT_U1_TIMEOUT:
  1502. case USB_PORT_FEAT_U2_TIMEOUT:
  1503. case USB_PORT_FEAT_BH_PORT_RESET:
  1504. goto error;
  1505. case USB_PORT_FEAT_SUSPEND:
  1506. if (max3421_hcd->active)
  1507. max3421_hcd->port_status |=
  1508. USB_PORT_STAT_SUSPEND;
  1509. break;
  1510. case USB_PORT_FEAT_POWER:
  1511. dev_dbg(hcd->self.controller, "power-on\n");
  1512. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1513. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1514. pdata->vbus_active_level);
  1515. break;
  1516. case USB_PORT_FEAT_RESET:
  1517. max3421_reset_port(hcd);
  1518. fallthrough;
  1519. default:
  1520. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1521. != 0)
  1522. max3421_hcd->port_status |= (1 << value);
  1523. }
  1524. break;
  1525. default:
  1526. dev_dbg(hcd->self.controller,
  1527. "hub control req%04x v%04x i%04x l%d\n",
  1528. type_req, value, index, length);
  1529. error: /* "protocol stall" on error */
  1530. retval = -EPIPE;
  1531. }
  1532. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1533. return retval;
  1534. }
  1535. static int
  1536. max3421_bus_suspend(struct usb_hcd *hcd)
  1537. {
  1538. return -1;
  1539. }
  1540. static int
  1541. max3421_bus_resume(struct usb_hcd *hcd)
  1542. {
  1543. return -1;
  1544. }
  1545. static const struct hc_driver max3421_hcd_desc = {
  1546. .description = "max3421",
  1547. .product_desc = DRIVER_DESC,
  1548. .hcd_priv_size = sizeof(struct max3421_hcd),
  1549. .flags = HCD_USB11,
  1550. .reset = max3421_reset,
  1551. .start = max3421_start,
  1552. .stop = max3421_stop,
  1553. .get_frame_number = max3421_get_frame_number,
  1554. .urb_enqueue = max3421_urb_enqueue,
  1555. .urb_dequeue = max3421_urb_dequeue,
  1556. .endpoint_disable = max3421_endpoint_disable,
  1557. .hub_status_data = max3421_hub_status_data,
  1558. .hub_control = max3421_hub_control,
  1559. .bus_suspend = max3421_bus_suspend,
  1560. .bus_resume = max3421_bus_resume,
  1561. };
  1562. static int
  1563. max3421_of_vbus_en_pin(struct device *dev, struct max3421_hcd_platform_data *pdata)
  1564. {
  1565. int retval;
  1566. uint32_t value[2];
  1567. if (!pdata)
  1568. return -EINVAL;
  1569. retval = of_property_read_u32_array(dev->of_node, "maxim,vbus-en-pin", value, 2);
  1570. if (retval) {
  1571. dev_err(dev, "device tree node property 'maxim,vbus-en-pin' is missing\n");
  1572. return retval;
  1573. }
  1574. dev_info(dev, "property 'maxim,vbus-en-pin' value is <%d %d>\n", value[0], value[1]);
  1575. pdata->vbus_gpout = value[0];
  1576. pdata->vbus_active_level = value[1];
  1577. return 0;
  1578. }
  1579. static int
  1580. max3421_probe(struct spi_device *spi)
  1581. {
  1582. struct device *dev = &spi->dev;
  1583. struct max3421_hcd *max3421_hcd;
  1584. struct usb_hcd *hcd = NULL;
  1585. struct max3421_hcd_platform_data *pdata = NULL;
  1586. int retval;
  1587. if (spi_setup(spi) < 0) {
  1588. dev_err(&spi->dev, "Unable to setup SPI bus");
  1589. return -EFAULT;
  1590. }
  1591. if (!spi->irq) {
  1592. dev_err(dev, "Failed to get SPI IRQ");
  1593. return -EFAULT;
  1594. }
  1595. if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
  1596. pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
  1597. if (!pdata) {
  1598. retval = -ENOMEM;
  1599. goto error;
  1600. }
  1601. retval = max3421_of_vbus_en_pin(dev, pdata);
  1602. if (retval)
  1603. goto error;
  1604. spi->dev.platform_data = pdata;
  1605. }
  1606. pdata = spi->dev.platform_data;
  1607. if (!pdata) {
  1608. dev_err(&spi->dev, "driver configuration data is not provided\n");
  1609. retval = -EFAULT;
  1610. goto error;
  1611. }
  1612. if (pdata->vbus_active_level > 1) {
  1613. dev_err(&spi->dev, "vbus active level value %d is out of range (0/1)\n", pdata->vbus_active_level);
  1614. retval = -EINVAL;
  1615. goto error;
  1616. }
  1617. if (pdata->vbus_gpout < 1 || pdata->vbus_gpout > MAX3421_GPOUT_COUNT) {
  1618. dev_err(&spi->dev, "vbus gpout value %d is out of range (1..8)\n", pdata->vbus_gpout);
  1619. retval = -EINVAL;
  1620. goto error;
  1621. }
  1622. retval = -ENOMEM;
  1623. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1624. dev_name(&spi->dev));
  1625. if (!hcd) {
  1626. dev_err(&spi->dev, "failed to create HCD structure\n");
  1627. goto error;
  1628. }
  1629. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1630. max3421_hcd = hcd_to_max3421(hcd);
  1631. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1632. spi_set_drvdata(spi, max3421_hcd);
  1633. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1634. if (!max3421_hcd->tx)
  1635. goto error;
  1636. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1637. if (!max3421_hcd->rx)
  1638. goto error;
  1639. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1640. "max3421_spi_thread");
  1641. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1642. dev_err(&spi->dev,
  1643. "failed to create SPI thread (out of memory)\n");
  1644. goto error;
  1645. }
  1646. retval = usb_add_hcd(hcd, 0, 0);
  1647. if (retval) {
  1648. dev_err(&spi->dev, "failed to add HCD\n");
  1649. goto error;
  1650. }
  1651. retval = request_irq(spi->irq, max3421_irq_handler,
  1652. IRQF_TRIGGER_LOW, "max3421", hcd);
  1653. if (retval < 0) {
  1654. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1655. goto error;
  1656. }
  1657. return 0;
  1658. error:
  1659. if (IS_ENABLED(CONFIG_OF) && dev->of_node && pdata) {
  1660. devm_kfree(&spi->dev, pdata);
  1661. spi->dev.platform_data = NULL;
  1662. }
  1663. if (hcd) {
  1664. kfree(max3421_hcd->tx);
  1665. kfree(max3421_hcd->rx);
  1666. if (max3421_hcd->spi_thread)
  1667. kthread_stop(max3421_hcd->spi_thread);
  1668. usb_put_hcd(hcd);
  1669. }
  1670. return retval;
  1671. }
  1672. static void
  1673. max3421_remove(struct spi_device *spi)
  1674. {
  1675. struct max3421_hcd *max3421_hcd;
  1676. struct usb_hcd *hcd;
  1677. unsigned long flags;
  1678. max3421_hcd = spi_get_drvdata(spi);
  1679. hcd = max3421_to_hcd(max3421_hcd);
  1680. usb_remove_hcd(hcd);
  1681. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1682. kthread_stop(max3421_hcd->spi_thread);
  1683. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1684. free_irq(spi->irq, hcd);
  1685. usb_put_hcd(hcd);
  1686. }
  1687. static const struct of_device_id max3421_of_match_table[] = {
  1688. { .compatible = "maxim,max3421", },
  1689. {},
  1690. };
  1691. MODULE_DEVICE_TABLE(of, max3421_of_match_table);
  1692. static struct spi_driver max3421_driver = {
  1693. .probe = max3421_probe,
  1694. .remove = max3421_remove,
  1695. .driver = {
  1696. .name = "max3421-hcd",
  1697. .of_match_table = max3421_of_match_table,
  1698. },
  1699. };
  1700. module_spi_driver(max3421_driver);
  1701. MODULE_DESCRIPTION(DRIVER_DESC);
  1702. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1703. MODULE_LICENSE("GPL");