ark1668ed-bsp/linux/drivers/video/fbdev/arkmicro/ark1668e_lcdc_funcs.c

/*
 * Arkmicro ark1668 lcd driver
 *
 * Licensed under GPLv2 or later.
 */

#include <linux/kernel.h>
#include <linux/fb.h>
#include <linux/poll.h>
#include "ark1668e_lcdc.h"

#define CVBS_PAL    0
#define CVBS_NTSC   1

static struct ark1668e_lcdfb_info *lcdfb_info = NULL;
static void *lcdc_base = NULL;
static int lcdc_width = 0;
static int lcdc_height = 0;
static struct ark_disp_vp lcdc_vp = {0};

#define lcdc_readl_sys(sinfo, reg)		__raw_readl((sinfo)->sysreg+(reg))
#define lcdc_writel_sys(sinfo, reg, val)	__raw_writel((val), (sinfo)->sysreg+(reg))
static int ark1668e_lcdc_layer_enable(int layer, int enable)
{
	unsigned int reg;
	unsigned int val;
	int offset = 0;

	reg = ARK1668E_LCDC_CONTROL;
	val = readl(lcdc_base + reg);

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			offset = 5;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			offset = 6;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			offset = 7;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			offset = 8;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			offset = 9;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	if(enable)
		val |= (1<<offset);
	else
		val &= ~(1<<offset);
	writel(val, lcdc_base + reg);

	return 0;
}

//no use func
#if 0
static int ark1668e_lcdc_set_backcolor(int y, int cb, int cr)
{
	unsigned int val = ((y&0xFF) << 16) |((cb&0xFF) << 8) | (cr&0xFF);

	writel(val, lcdc_base + ARK1668E_LCDC_BACK_COLOR);
	return 0;
}

static int ark1668e_lcdc_set_backcolor_tvout(int y, int cb, int cr)
{
	unsigned int val = ((y&0xFF) << 16) |((cb&0xFF) << 8) | (cr&0xFF);

	writel(val, lcdc_base + ARK1668E_LCDC_BACK_COLOR_TV);
	return 0;
}

static int ark1668e_lcdc_set_priority(int video1_prio, int video2_prio, int osd1_prio, int osd2_prio, int osd3_prio)
{
	unsigned int reg;
	unsigned int val;

	if((video1_prio + video2_prio + osd1_prio + osd2_prio + osd3_prio) != 10) {
		printk(KERN_ERR "%s, Invalid priority value, video1_prio:%d, video2_prio:%d, osd1_prio:%d, osd2_prio:%d, osd3_prio:%d\n",
			__FUNCTION__, video1_prio, video2_prio, osd1_prio, osd2_prio, osd3_prio);
		return -1;
	}

	reg = ARK1668E_LCDC_BLD_MODE_LCD_REG0;
	val = readl(lcdc_base + reg);
	val &= ~((0x7<<0) | (0x7<8) | (0x7<<16) | (0x7<24));
	val |= ((video1_prio<<0) | (osd1_prio<8) | (osd2_prio<<16) | (osd3_prio<24));
	writel(val, lcdc_base + reg);

	reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
	val = readl(lcdc_base + reg);
	val &= ~(0x7<<0);
	val |= (video2_prio<<0);
	writel(val, lcdc_base + reg);
	return 0;
}

static int ark1668e_lcdc_set_priority_tvout(int video1_prio, int video2_prio, int osd1_prio, int osd2_prio, int osd3_prio)
{
	unsigned int reg;
	unsigned int val;

	if((video1_prio + video2_prio + osd1_prio + osd2_prio + osd3_prio) != 10) {
		printk(KERN_ERR "%s, Invalid priority value, video1_prio:%d, video2_prio:%d, osd1_prio:%d, osd2_prio:%d, osd3_prio:%d\n",
			__FUNCTION__, video1_prio, video2_prio, osd1_prio, osd2_prio, osd3_prio);
		return -1;
	}

	reg = ARK1668E_LCDC_BLD_MODE_TV_REG0;
	val = readl(lcdc_base + reg);
	val &= ~((0x7<<0) | (0x7<8) | (0x7<<16) | (0x7<24));
	val |= ((video1_prio<<0) | (osd1_prio<8) | (osd2_prio<<16) | (osd3_prio<24));
	writel(val, lcdc_base + reg);

	reg = ARK1668E_LCDC_BLD_MODE_TV_REG1;
	val = readl(lcdc_base + reg);
	val &= ~(0x7<<0);
	val |= (video2_prio<<0);
	writel(val, lcdc_base + reg);
	return 0;
}
static int ark1668e_lcdc_set_alpha_blend_mode(int layer, int mode)
{
	unsigned int reg;
	unsigned int val;
	int offset = 0;

	if((mode < 0) || (mode > 0xE0)) {
		printk(KERN_ERR "%s, Invalid mode:%d\n", __FUNCTION__, mode);
		return -1;
	}

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG0;
			offset = 4;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
			offset = 4;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG0;
			offset = 12;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG0;
			offset = 20;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG0;
			offset = 28;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = readl(lcdc_base + reg);
	val &= ~(0xF<<offset);
	val |= (mode<<offset);
	writel(val, lcdc_base + reg);

	return 0;
}
static int ark1668e_lcdc_set_alpha_blend_mode_tvout(int layer, int mode)
{
	unsigned int reg;
	unsigned int val;
	int offset = 0;

	if((mode < 0) || (mode > 0xE0)) {
		printk(KERN_ERR "%s, Invalid mode:%d\n", __FUNCTION__, mode);
		return -1;
	}

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_BLD_MODE_TV_REG0;
			offset = 4;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_BLD_MODE_TV_REG1;
			offset = 4;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_BLD_MODE_TV_REG0;
			offset = 12;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_BLD_MODE_TV_REG0;
			offset = 20;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_BLD_MODE_TV_REG0;
			offset = 28;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = readl(lcdc_base + reg);
	val &= ~(0xF<<offset);
	val |= (mode<<offset);
	writel(val, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_set_video_osd_alpha(int layer, int alpha)
{
	unsigned int reg;
	unsigned int val;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_ALPHA1_ALPHA0_BLENDING_COEFF;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_ALPHA1_ALPHA0_BLENDING_COEFF;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_CTL;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_CTL;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_CTL;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = readl(lcdc_base + reg);
	val &= ~0xFF;
	val |= alpha;
	writel(val, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_set_video_osd_blend_win_cut(int layer, int left, int right, int up, int down)
{
	unsigned int reg_cut_lr, reg_cut_ud;
	unsigned int val;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg_cut_lr = ARK1668E_LCDC_BLD_CUT_LEFT_RIGHT_VIDEO1;
			reg_cut_ud = ARK1668E_LCDC_BLD_CUT_UP_DOWN_VIDEO1;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg_cut_lr = ARK1668E_LCDC_BLD_CUT_LEFT_RIGHT_VIDEO2;
			reg_cut_ud = ARK1668E_LCDC_BLD_CUT_UP_DOWN_VIDEO2;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg_cut_lr = ARK1668E_LCDC_BLD_CUT_LEFT_RIGHT_OSD1;
			reg_cut_ud = ARK1668E_LCDC_BLD_CUT_UP_DOWN_OSD1;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg_cut_lr = ARK1668E_LCDC_BLD_CUT_LEFT_RIGHT_OSD2;
			reg_cut_ud = ARK1668E_LCDC_BLD_CUT_UP_DOWN_OSD2;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg_cut_lr = ARK1668E_LCDC_BLD_CUT_LEFT_RIGHT_OSD3;
			reg_cut_ud = ARK1668E_LCDC_BLD_CUT_UP_DOWN_OSD3;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = ((right&0xFFF)<<12) | (left&0xFFF);
	writel(val, lcdc_base + reg_cut_lr);
	val = ((down&0xFFF)<<12) | (up&0xFFF);
	writel(val, lcdc_base + reg_cut_ud);

	return 0;
}

static int ark1668e_lcdc_set_video_osd_colorkey_mask_value(int layer, int y, int cb, int cr, int enable)
{
	unsigned int reg;
	unsigned int val;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_VALUE_VIDEO1;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_VALUE_VIDEO2;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_VALUE_OSD1;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_VALUE_OSD2;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_VALUE_OSD3;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = ((!!enable)<<24) | ((y&0xFF)<<16) | ((cb&0xFF)<<8) | (cr&0xFF);
	writel(val, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_set_video_osd_colorkey_mask_thld(int layer, int y, int cb, int cr)
{
	unsigned int reg;
	unsigned int val;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_THLD_VIDEO1;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_THLD_VIDEO2;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_THLD_OSD1;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_THLD_OSD2;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_COLOR_KEY_MASK_THLD_OSD3;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = ((y&0xFF)<<16) | ((cb&0xFF)<<8) | (cr&0xFF);
	writel(val, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_set_video_addr_group1(int layer,  unsigned int yaddr,unsigned int cbaddr, unsigned int craddr)
{
	unsigned int reg_addr1, reg_addr2, reg_addr3;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg_addr1 = ARK1668E_LCDC_VIDEO1_ADDR1_GROUP1;
			reg_addr2 = ARK1668E_LCDC_VIDEO1_ADDR2_GROUP1;
			reg_addr3 = ARK1668E_LCDC_VIDEO1_ADDR3_GROUP1;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg_addr1 = ARK1668E_LCDC_VIDEO2_ADDR1_GROUP1;
			reg_addr2 = ARK1668E_LCDC_VIDEO2_ADDR2_GROUP1;
			reg_addr3 = ARK1668E_LCDC_VIDEO2_ADDR3_GROUP1;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	writel(yaddr, lcdc_base + reg_addr1);
	if(cbaddr)
		writel(cbaddr, lcdc_base + reg_addr2);
	if(craddr)
		writel(craddr, lcdc_base + reg_addr3);

	return 0;
}

static int ark1668e_lcdc_set_video_ycbcr_format(int layer, ARK1668E_LCDC_YCBCR_FORMAT format)
{
	unsigned int reg;
	unsigned int val;
	int offset = 0;

	if((format < 0) || (format >= ARK1668E_LCDC_YCBCR_FORMAT_END)) {
		printk(KERN_ERR "%s, Invalid YCBCR fromat:%d\n", __FUNCTION__, format);
		return -1;
	}

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_CTL;
			offset = 21;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_CTL;
			offset = 21;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = readl(lcdc_base + reg);
	val &= ~(0x1 << offset);
	val |= ((format&0x1) << offset);
	writel(val, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_set_osd_addr_group1(int layer, int addr)
{
	unsigned int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_ADDR_GROUP1;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_ADDR_GROUP1;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_ADDR_GROUP1;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	writel(addr, lcdc_base + reg);

	return 0;
}

static void ark1668e_lcdc_global_enable(int enable)
{
	writel((enable?1:0), lcdc_base + ARK1668E_LCDC_EANBLE);
}
#endif

static int ark1668e_lcdc_alpha_blend_per_pix_mode_enable(int layer, int enable)
{
	unsigned int pos;
	unsigned int val;

	if ((layer < 0) || (layer > ARK1668E_LCDC_LAYER_MAX))
		return -1;

	val = readl(lcdc_base + ARK1668E_LCDC_BLD_MODE_LCD_REG1);

	switch (layer)
	{
		case ARK1668E_LCDC_LAYER_VIDEO1:
			pos = 10;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			pos = 8;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			pos = 12;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			pos = 14;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			pos = 16;
			break;
		default:
			return -1;
	}

	if (enable)
		val |= 1<<pos;
	else
		val &= ~(1 << pos);
	writel(val, lcdc_base + ARK1668E_LCDC_BLD_MODE_LCD_REG1);
	return 0;
}

static int ark1668e_lcdc_alpha_blend_with_backcolor_enable(int layer, int enable)
{
	unsigned int reg;
	unsigned int val;
	int offset = 0;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
			offset = 11;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
			offset = 9;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
			offset = 13;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
			offset = 15;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_BLD_MODE_LCD_REG1;
			offset = 17;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = readl(lcdc_base + reg);
	if(enable)
		val |= (0x1<<offset);
	else
		val &= ~(0x1<<offset);
	writel(val, lcdc_base + reg);

	return 0;
}

/**************************************************************************************************
 *		Video and Osd common interface.
 *
 **************************************************************************************************/
static int ark1668e_lcdc_set_video_osd_format(int layer, ARK1668E_LCDC_FORMAT format, int yuv_order, int rgb_order)
{
	int rgb_ycbcr_bypass;
	int yuv_ycbcr_bypass;
	int y_uv_order;
	int colour_matrix_reg0;
	int colour_matrix_reg1;
	int colour_matrix_reg2;
	int colour_matrix_reg3;
	int colour_matrix_reg4;
	int colour_matrix_reg5;
	unsigned int reg;
	unsigned int val;

	if((format < 0) || ((format >= ARK1668E_LCDC_FORMAT_MAX) && (format != ARK1668E_LCDC_FORMAT_Y_UV422)&&
		(format != ARK1668E_LCDC_FORMAT_Y_UV420))) {
		printk(KERN_ERR "%s, Invalid fromat:%d\n", __FUNCTION__, format);
		return -1;
	}

#if 0
	if(format <= ARK1668E_LCDC_FORMAT_OSD_BMP24BIT_VIDEO_YUV420) {
		if((layer >= ARK1668E_LCDC_LAYER_VIDEO1) && (layer <= ARK1668E_LCDC_LAYER_VIDEO2)) {
			rgb_ycbcr_bypass = 1;
		} else {
			rgb_ycbcr_bypass = 0;
		}
	} else if(format <= ARK1668E_LCDC_FORMAT_YUV) {
		rgb_ycbcr_bypass = 1;
	} else {
		rgb_ycbcr_bypass = 0;
	}

#else
	rgb_ycbcr_bypass = 1;
	yuv_ycbcr_bypass = 1;
#endif

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_CTL;
			colour_matrix_reg0 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG0;
			colour_matrix_reg1 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG1;
			colour_matrix_reg2 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG2;
			colour_matrix_reg3 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG3;
			colour_matrix_reg4 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG4;
			colour_matrix_reg5 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_CTL;
			colour_matrix_reg0 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG0;
			colour_matrix_reg1 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG1;
			colour_matrix_reg2 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG2;
			colour_matrix_reg3 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG3;
			colour_matrix_reg4 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG4;
			colour_matrix_reg5 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_CTL;
			colour_matrix_reg0 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG0;
			colour_matrix_reg1 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG1;
			colour_matrix_reg2 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG2;
			colour_matrix_reg3 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG3;
			colour_matrix_reg4 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG4;
			colour_matrix_reg5 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_CTL;
			colour_matrix_reg0 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG0;
			colour_matrix_reg1 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG1;
			colour_matrix_reg2 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG2;
			colour_matrix_reg3 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG3;
			colour_matrix_reg4 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG4;
			colour_matrix_reg5 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_CTL;
			colour_matrix_reg0 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG0;
			colour_matrix_reg1 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG1;
			colour_matrix_reg2 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG2;
			colour_matrix_reg3 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG3;
			colour_matrix_reg4 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG4;
			colour_matrix_reg5 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG5;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	if((format >= ARK1668E_LCDC_FORMAT_RGBI555) && (format < ARK1668E_LCDC_FORMAT_MAX)) {
		writel(0, lcdc_base + colour_matrix_reg0);
		writel(0, lcdc_base + colour_matrix_reg1);
		writel(0, lcdc_base + colour_matrix_reg2);
		writel(0, lcdc_base + colour_matrix_reg3);
		writel(0, lcdc_base + colour_matrix_reg4);
		writel(0, lcdc_base + colour_matrix_reg5);
	} else {
		writel(0x01000100, lcdc_base + colour_matrix_reg0);
		writel(0x100167, lcdc_base + colour_matrix_reg1);
		writel(0xf4afa8, lcdc_base + colour_matrix_reg2);
		writel(0x12d100, lcdc_base + colour_matrix_reg3);
		writel(0xf4d000, lcdc_base + colour_matrix_reg4);
		writel(0xf69086, lcdc_base + colour_matrix_reg5);
	}

	val = readl(lcdc_base + reg);
	if((layer >= ARK1668E_LCDC_LAYER_VIDEO1) && (layer <= ARK1668E_LCDC_LAYER_VIDEO2)) {
		int scal_bypass_sel = 1;	//1:bypass; 0:if scale based on input/ouput size.
		int scal_bypass_mode = 1;	//1:disable scale; 0:enable, ignore scal_bypass_sel.
		if(format == ARK1668E_LCDC_FORMAT_Y_UV420) {
			y_uv_order = 1;	//0:y_u_v order, 1:y_uv order.
			format = ARK1668E_LCDC_FORMAT_OSD_BMP24BIT_VIDEO_YUV420;
		} else if(format == ARK1668E_LCDC_FORMAT_Y_UV422) {
			y_uv_order = 1;
			format = ARK1668E_LCDC_FORMAT_OSD_PALETTE_VIDEO_YUV422;
		} else {
			y_uv_order = 0;
		}
		val &= ~((1<<21) | (3<<17) | (1<<9) | (1<<8) | (7<<14) | (1<<5) | (1<<4) | (0xF<<0));
		val |= ((y_uv_order<<21) | (yuv_order<<17) | (rgb_order<<14) | (scal_bypass_sel<<9) | (scal_bypass_mode<<8) | (yuv_ycbcr_bypass<<5) | (rgb_ycbcr_bypass<<4) | (format<<0));
	} else {
		val &= ~((3<<21) | (7<<18) | (1<<17) | (1<<16) | (0xF<<12));
		val |= ((yuv_order<<21) | (rgb_order<<18) | (yuv_ycbcr_bypass<<17) | (rgb_ycbcr_bypass<<16) | (format<<12));
	}
	writel(val, lcdc_base + reg);
	//printk(KERN_ALERT "%s, layer:%d, reg:0x%x, val:0x%x, format:0x%x\n", __FUNCTION__, layer, reg, val, format);

	return 0;
}

static int ark1668e_lcdc_get_video_osd_format(int layer)
{
	unsigned int reg;
	unsigned int val;
	int format;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_CTL;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_CTL;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_CTL;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_CTL;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_CTL;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = readl(lcdc_base + reg);
	if((layer >= ARK1668E_LCDC_LAYER_VIDEO1) && (layer <= ARK1668E_LCDC_LAYER_VIDEO2)) {
		int y_uv_order = (val>>21) & 0x1;;
		format = val & 0xF;
		if(y_uv_order) {
			if(format == ARK1668E_LCDC_FORMAT_OSD_BMP24BIT_VIDEO_YUV420)
				format = ARK1668E_LCDC_FORMAT_Y_UV420;
			else if(format == ARK1668E_LCDC_FORMAT_OSD_PALETTE_VIDEO_YUV422)
				format = ARK1668E_LCDC_FORMAT_Y_UV422;
		}
	} else {
		format = (val>>12)&0xF;
	}

	return format;
}

static int ark1668e_lcdc_set_video_osd_source_size(int layer, int width, int height)
{
	unsigned int val;
	int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_SOURCE_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_SOURCE_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_SOURCE_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_SOURCE_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_SOURCE_SIZE;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	val = ((height&0xFFF) << 12) | (width&0xFFF);
	writel(val, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_set_video_osd_size(int layer, int width, int height)
{
	unsigned int val;
	int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_SIZE;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}
	val = ((height&0xFFF) << 12) | (width&0xFFF);

	writel(val, lcdc_base + reg);
	return 0;
}

static int ark1668e_lcdc_set_video_osd_win_point(int layer, int x, int y)
{
	unsigned int val;
	int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_WIN_POINT;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_WIN_POINT;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_WIN_POINT;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_WIN_POINT;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_WIN_POINT;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}
	val = ((y&0xFFF) << 12) | (x&0xFFF);

	writel(val, lcdc_base + reg);
	return 0;
}

static int ark1668e_lcdc_set_video_osd_layer_point(int layer, int x, int y)
{
	unsigned int val;
	int reg;
	int sign_x = 0;
	int sign_y = 0;

	if (x < 0) {
		sign_x = 1;
		x = -x;	
	}

	if (y < 0) {
		sign_y = 1;
		y = -y;
	}

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_POSITION;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_POSITION;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_POSITION;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_POSITION;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_POSITION;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}
	val = (sign_y << 25) | ((y&0xFFF) << 13) | (sign_x << 12) | (x&0xFFF);

	writel(val, lcdc_base + reg);
	return 0;
}

static int ark1668e_lcdc_set_video_osd_color_matrix(int layer, int reg0_val, int reg1_val, int reg2_val, int reg3_val, int reg4_val, int reg5_val)
{
	unsigned int reg0, reg1, reg2, reg3, reg4, reg5;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg0 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG0;
			reg1 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG1;
			reg2 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG2;
			reg3 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG3;
			reg4 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG4;
			reg5 = ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg0 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG0;
			reg1 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG1;
			reg2 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG2;
			reg3 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG3;
			reg4 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG4;
			reg5 = ARK1668E_LCDC_VIDEO2_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_OSD1:
			reg0 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG0;
			reg1 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG1;
			reg2 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG2;
			reg3 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG3;
			reg4 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG4;
			reg5 = ARK1668E_LCDC_OSD1_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg0 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG0;
			reg1 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG1;
			reg2 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG2;
			reg3 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG3;
			reg4 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG4;
			reg5 = ARK1668E_LCDC_OSD2_COLOUR_MATRIX_REG5;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg0 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG0;
			reg1 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG1;
			reg2 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG2;
			reg3 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG3;
			reg4 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG4;
			reg5 = ARK1668E_LCDC_OSD3_COLOUR_MATRIX_REG5;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	writel(reg0_val, lcdc_base + reg0);
	writel(reg1_val, lcdc_base + reg1);
	writel(reg2_val, lcdc_base + reg2);
	writel(reg3_val, lcdc_base + reg3);
	writel(reg4_val, lcdc_base + reg4);
	writel(reg5_val, lcdc_base + reg5);

	return 0;
}

/**************************************************************************************************
 *		Video interface.
 *
 **************************************************************************************************/

static int ark1668e_lcdc_set_video_win_size(int layer, int width, int height)
{
	unsigned int val;
	int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg = ARK1668E_LCDC_VIDEO1_WIN_SIZE;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg = ARK1668E_LCDC_VIDEO2_WIN_SIZE;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}
	val = ((height & 0xFFF) << 12) | (width & 0xFFF);

	writel(val, lcdc_base + reg);
	return 0;
}

int ark1668e_lcdc_set_video_addr(int layer,  unsigned int yaddr,unsigned int cbaddr, unsigned int craddr)
{
	unsigned int reg_addr1, reg_addr2, reg_addr3;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg_addr1 = ARK1668E_LCDC_VIDEO1_ADDR1;
			reg_addr2 = ARK1668E_LCDC_VIDEO1_ADDR2;
			reg_addr3 = ARK1668E_LCDC_VIDEO1_ADDR3;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg_addr1 = ARK1668E_LCDC_VIDEO2_ADDR1;
			reg_addr2 = ARK1668E_LCDC_VIDEO2_ADDR2;
			reg_addr3 = ARK1668E_LCDC_VIDEO2_ADDR3;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	writel(yaddr, lcdc_base + reg_addr1);
	if(cbaddr)
		writel(cbaddr, lcdc_base + reg_addr2);
	if(craddr)
		writel(craddr, lcdc_base + reg_addr3);

	return 0;
}

static int ark1668e_lcdc_get_video_addr(int layer, unsigned int *yaddr,unsigned int *cbaddr, unsigned int *craddr)
{
	unsigned int reg_addr1, reg_addr2, reg_addr3;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_VIDEO1:
			reg_addr1 = ARK1668E_LCDC_VIDEO1_ADDR1;
			reg_addr2 = ARK1668E_LCDC_VIDEO1_ADDR2;
			reg_addr3 = ARK1668E_LCDC_VIDEO1_ADDR3;
			break;
		case ARK1668E_LCDC_LAYER_VIDEO2:
			reg_addr1 = ARK1668E_LCDC_VIDEO2_ADDR1;
			reg_addr2 = ARK1668E_LCDC_VIDEO2_ADDR2;
			reg_addr3 = ARK1668E_LCDC_VIDEO2_ADDR3;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	*yaddr = readl(lcdc_base + reg_addr1);
	*cbaddr = readl(lcdc_base + reg_addr2);
	*craddr = readl(lcdc_base + reg_addr3);

	return 0;
}

static int ark1668e_lcdc_set_video1_scal(
		int layer,
		unsigned int win_width, unsigned int win_height,
		unsigned int left_blank, unsigned int right_blank,
		unsigned int top_blank, unsigned int bottom_blank,
		unsigned int dst_width, unsigned int dst_height,
		int interlace_out_en // 1=interlace, 0=progressive
		)
{
	unsigned int vblank = top_blank + bottom_blank;
	unsigned int hblank = left_blank + right_blank;
	unsigned int reg_ctl, reg_ctl0, reg_ctl1, reg_cut;
	unsigned int val;
	unsigned int format;

	if (layer != ARK1668E_LCDC_LAYER_VIDEO1) {
		printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
		return -EINVAL;
	}

	if (dst_width == 0 || dst_height == 0) {
		printk(KERN_ERR "%s, Invalid dst_width:%d, dst_height:%d\n", __FUNCTION__, dst_width, dst_height);
		return -EINVAL;;
	}

	val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
	format = (val & 0xF);
	if(format == ARK1668E_LCDC_FORMAT_OSD_BMP24BIT_VIDEO_YUV420) {
		int src_width = (readl(lcdc_base + ARK1668E_LCDC_VIDEO1_SOURCE_SIZE) & 0xFFF);
		if(src_width&7) {
			printk(KERN_ERR "Video layer scaler didn't support the width which is not the multiple of 8 when the format is YUV420.\n");
			return -EINVAL;
		}
	}
	if(((val >> 8) & 0x3) != 1) {
		val &= ~(1<<9);	//scale bypass select(1:not bypass).
		val |= (1<<8);	//1: enable scale when scale is not bypass and disable scale when scale bypass; 0: enable scale no matter if scale is bypass.
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
	}

	reg_ctl  = ARK1668E_LCDC_VIDEO1_SCALE_CTL;
	reg_ctl0 = ARK1668E_LCDC_VIDEO1_SCAL_CTL0;
	reg_ctl1 = ARK1668E_LCDC_VIDEO1_SCAL_CTL1;
	reg_cut  = ARK1668E_LCDC_VIDEO1_RIGHT_BOTTOM_CUT_NUM;

	val =	0<<11| // 0=addr update per field
			0<<9 | // 10-9: 00=
			0<<8 | // 0=not line chroma
			1<<7 | // 1=YUV
			0<<6 | // 0=disable horizontal filter (use for down scale)
			1<<5 | // 1=auto set coef of h-filter when down scale
			0<<4 | // 0=normal scale de-interlace mode
			0<<3 | // 0=current field is field=0
			0<<2 | // 0=field=0 is odd, field=1 is even
			0<<1 | // 0=de-interlace disable
			0<<0;  // 0=use 2 line buffers

	if ((dst_width + hblank) < win_width)
		val |= 1<<6;
	writel(val, lcdc_base + reg_ctl);

	val = (right_blank<<8) | bottom_blank;
	writel(val, lcdc_base + reg_cut);

	val = (left_blank<<18) |(win_width * 1024 / (dst_width + hblank));
	writel(val, lcdc_base + reg_ctl0);

	val = (top_blank<<18) | (win_height * 1024 / (dst_height + vblank));
	writel(val, lcdc_base + reg_ctl1);

	if (interlace_out_en) {
		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val &= ~(1<<8);
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);

		/* when v scaler cof is 0x400,v scaler  bypass, now we  should change the cof to
			force v scaler, otherwise there was sawtooth on picture */
		val = readl(lcdc_base + reg_ctl1);
		if ((val & 0x3FFFF) == 0x400) {
			val -= 1;
			writel(val, lcdc_base + reg_ctl1);
		}

		val = readl(lcdc_base + reg_ctl);
		val &= ~(7<<9);
		val |= (1<<11) | (1<<9);
		writel(val, lcdc_base + reg_ctl);
	}
	return 0;
}

/**************************************************************************************************
 *		Osd interface.
 *
 **************************************************************************************************/
int ark1668e_lcdc_set_osd_addr(int layer, int addr)
{
	unsigned int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_ADDR;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_ADDR;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_ADDR;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	writel(addr, lcdc_base + reg);

	return 0;
}

static int ark1668e_lcdc_get_osd_addr(int layer)
{
	unsigned int reg;

	switch (layer) {
		case ARK1668E_LCDC_LAYER_OSD1:
			reg = ARK1668E_LCDC_OSD1_ADDR;
			break;
		case ARK1668E_LCDC_LAYER_OSD2:
			reg = ARK1668E_LCDC_OSD2_ADDR;
			break;
		case ARK1668E_LCDC_LAYER_OSD3:
			reg = ARK1668E_LCDC_OSD3_ADDR;
			break;
		default:
			printk(KERN_ERR "%s, Invalid layer:%d\n", __FUNCTION__, layer);
			return -1;
	}

	return readl(lcdc_base + reg);
}

/**************************************************************************************************
 *		Ioctl interface.
 *
 **************************************************************************************************/
static void ark1668e_lcdc_display_update_atomic(struct ark1668e_lcdfb_info* sinfo)
{
	unsigned int format, yuv_order, rgb_order, i, layer;
	struct ark_disp_atomic *p = NULL;

	if(!sinfo->atomic_flag)
		return;
	for(i = 0; i < ARK1668E_LCDC_LAYER_MAX; i++) {
		if(!(sinfo->atomic_flag & (1 << i)))
			continue;

		p = &sinfo->patomic[i];
		if(!p->atomic_stat || (p->layer < 0) || (p->layer) > ARK1668E_LCDC_LAYER_MAX){
			sinfo->atomic_flag &= ~(1 << i);
			memset(&sinfo->patomic[i], 0 ,sizeof(struct ark_disp_atomic));
			continue;
		}

		//printk(KERN_ALERT "%s: atomic_stat=0x%0x, layer=%d.\n ",__func__, p->atomic_stat, p->layer);
		layer = p->layer;
		if(p->layer >= ARK1668E_LCDC_LAYER_OSD1 && p->layer <= ARK1668E_LCDC_LAYER_OSD3){
			if(p->atomic_stat & ATOMIC_SET_LAYER_POS) {
				ark1668e_lcdc_set_video_osd_layer_point(layer, p->pos_x, p->pos_y);
			}
			if(p->atomic_stat & ATOMIC_SET_LAYER_SIZE) {
				ark1668e_lcdc_set_video_osd_size(layer, p->width, p->height);
				ark1668e_lcdc_set_video_osd_source_size(layer, p->width, p->height);
			}
			if(p->atomic_stat & ATOMIC_SET_LAYER_FMT) {
				format    = (p->format >> 0)  & 0xFF;
				yuv_order = (p->format >> 16) & 0xF;
				rgb_order = (p->format >> 24) & 0xF;
				ark1668e_lcdc_set_video_osd_format(layer, format, yuv_order, rgb_order);
				if(format == ARK1668E_LCDC_FORMAT_RGBA888){
					ark1668e_lcdc_alpha_blend_with_backcolor_enable(layer, 1);
					ark1668e_lcdc_alpha_blend_per_pix_mode_enable(layer, 1);
				}
				//printk(KERN_ALERT "%s: format=%d, yuv_order=%d, rgb_order=%d.\n ",__func__, format, yuv_order,rgb_order);
			}
			if(p->atomic_stat & ATOMIC_SET_LAYER_ADDR)
				ark1668e_lcdc_set_osd_addr(layer, p->addr.yaddr);
		}else{
			if(p->atomic_stat & ATOMIC_SET_LAYER_POS) {
				ark1668e_lcdc_set_video_osd_layer_point(layer, p->pos_x, p->pos_y);
			}
			if(p->atomic_stat & ATOMIC_SET_LAYER_SIZE) {
				ark1668e_lcdc_set_video_osd_source_size(layer, p->width, p->height);
				ark1668e_lcdc_set_video_win_size(layer, p->width, p->height);
				ark1668e_lcdc_set_video_osd_win_point(layer, 0, 0);
				ark1668e_lcdc_set_video_osd_size(layer, p->width, p->height);
				//if(!(p->atomic_stat & ATOMIC_SET_LAYER_SCALER)) {
				//	if(layer == ARK1668E_LCDC_LAYER_VIDEO1) {
				//		ark1668e_lcdc_set_video1_scal(layer, p->width, p->height,
				//			0, 0, 0, 0, p->width, p->height, 0);
				//	}
				//}
			}
			if(p->atomic_stat & ATOMIC_SET_LAYER_FMT){
				format    = (p->format >> 0)  & 0xFF;
				yuv_order = (p->format >> 16) & 0xF;
				rgb_order = (p->format >> 24) & 0xF;
				ark1668e_lcdc_set_video_osd_format(layer, format, yuv_order, rgb_order);
			}
			if(p->atomic_stat & ATOMIC_SET_LAYER_ADDR)
				ark1668e_lcdc_set_video_addr(layer, p->addr.yaddr, p->addr.cbaddr, p->addr.craddr);
			if(p->atomic_stat & ATOMIC_SET_LAYER_SCALER) {
				if(layer == ARK1668E_LCDC_LAYER_VIDEO1) {
					ark1668e_lcdc_set_video1_scal(layer, p->scaler.src_w, p->scaler.src_h,
						p->scaler.cut_left, p->scaler.cut_right, p->scaler.cut_top, p->scaler.cut_bottom,
						p->scaler.out_w, p->scaler.out_h, 0);
				}
			}
		}

		sinfo->atomic_flag &= ~(1 << i);
		memset(&sinfo->patomic[i], 0 ,sizeof(struct ark_disp_atomic));
	}
}

int ark1668e_lcdc_wait_for_vsync(void)
{
	struct ark1668e_lcdfb_info *sinfo = lcdfb_info;
	int ret;

	if(!sinfo)
		return -EINVAL;

	sinfo->vsync_flag = 0;
	ret = wait_event_interruptible_timeout(sinfo->vsync_waitq,
					sinfo->vsync_flag != 0,
					msecs_to_jiffies(100)); // 100ms at most
	if (ret < 0)
		return ret;
	if (ret == 0)
		return -ETIMEDOUT;
	if(sinfo->atomic_flag)
		ark1668e_lcdc_display_update_atomic(sinfo);
	return 0;
}
EXPORT_SYMBOL(ark1668e_lcdc_wait_for_vsync);

int ark_vin_get_screen_info(int* width,int* height)
{
    if(lcdc_base == NULL){
            return -1;
    }
	*width = lcdc_width;
	*height = lcdc_height;
	return 0;
}
EXPORT_SYMBOL(ark_vin_get_screen_info);

int ark_vin_display_init(int layer,int src_width, int src_height,int out_posx, int out_posy)
{
	if(lcdc_base == NULL)
		return -1;
	ark1668e_lcdc_set_video_osd_source_size(layer, src_width, src_height);
	ark1668e_lcdc_set_video_win_size(layer, src_width, src_height);
	ark1668e_lcdc_set_video_osd_layer_point(layer, out_posx, out_posy);
	ark1668e_lcdc_set_video_osd_win_point(layer, 0, 0);
	ark1668e_lcdc_set_video_osd_size(layer, src_width, src_height);
	ark1668e_lcdc_set_video_osd_format(layer,ARK1668E_LCDC_FORMAT_Y_UV420,ARK_LCDC_ORDER_VYUY,0);
	return 0;
}
EXPORT_SYMBOL(ark_vin_display_init);
int ark_vin_display_addr(unsigned int yaddr, unsigned int uaddr, unsigned int vaddr)
{
    if(lcdc_base == NULL || yaddr == 0){
            return -1;
    }
	//ark1668e_lcdc_set_video_addr(ARK1668E_LCDC_LAYER_VIDEO2, addr, 0, 0);
	lcdfb_info->render_addr[ARK1668E_LCDC_LAYER_VIDEO2].yaddr = yaddr;
	lcdfb_info->render_addr[ARK1668E_LCDC_LAYER_VIDEO2].cbaddr = uaddr;
	lcdfb_info->render_addr[ARK1668E_LCDC_LAYER_VIDEO2].craddr = vaddr;
	return 0;
}
EXPORT_SYMBOL(ark_vin_display_addr);


int ark_vin_get_display_addr(void)
{
	int yaddr,uaddr,vaddr;
    if(lcdc_base == NULL){
            return -1;
    }
	ark1668e_lcdc_get_video_addr(ARK1668E_LCDC_LAYER_VIDEO2, &yaddr,&uaddr,&vaddr);
	
	return yaddr;
}
EXPORT_SYMBOL(ark_vin_get_display_addr);


int ark_bootanimation_display_init(int width, int height, unsigned int Yaddr,unsigned int Uaddr,unsigned int Vaddr,unsigned int format)
{
//	ark1668_lcdc_set_osd_size(OSD_LAYER2, width, height);
//	ark1668_lcdc_set_osd_pos(OSD_LAYER2, (lcdc_width - width) / 2, (lcdc_height - height) / 2);
//	ark1668_lcdc_set_osd_format(OSD_LAYER2, ARK1668_LCDC_FORMAT_VYUY, ARK_LCDC_ORDER_UYVY, 0);
//	ark1668_lcdc_set_osd_addr(OSD_LAYER2, addr);
//	ark1668_lcdc_set_osd_en(OSD_LAYER2, 1);

	if(lcdc_base == NULL)
		return -1;
	ark1668e_lcdc_set_video_osd_source_size(ARK1668E_LCDC_LAYER_VIDEO1, width, height);
	ark1668e_lcdc_set_video_win_size(ARK1668E_LCDC_LAYER_VIDEO1, width, height);
	ark1668e_lcdc_set_video_osd_layer_point(ARK1668E_LCDC_LAYER_VIDEO1, 0, 0);
	ark1668e_lcdc_set_video_osd_win_point(ARK1668E_LCDC_LAYER_VIDEO1, 0, 0);
	ark1668e_lcdc_set_video_osd_size(ARK1668E_LCDC_LAYER_VIDEO1, width, height);
	ark1668e_lcdc_set_video_osd_format(ARK1668E_LCDC_LAYER_VIDEO1,/*ARK1668E_LCDC_FORMAT_Y_UV420*/format,ARK_LCDC_ORDER_VYUY,0);
	ark1668e_lcdc_set_video_addr(ARK1668E_LCDC_LAYER_VIDEO1, Yaddr, Uaddr,Vaddr);
	ark1668e_lcdc_layer_enable(ARK1668E_LCDC_LAYER_VIDEO1, 1);
	return 0;
}
EXPORT_SYMBOL(ark_bootanimation_display_init);

int ark_bootanimation_display_uninit(void)
{
	ark1668e_lcdc_layer_enable(ARK1668E_LCDC_LAYER_VIDEO1, 0);
	return 0;
}
EXPORT_SYMBOL(ark_bootanimation_display_uninit);

int ark_bootanimation_set_display_addr(unsigned int Yaddr,unsigned int Uaddr,unsigned int Vaddr,unsigned int format)
{
	ark1668e_lcdc_set_video_addr(ARK1668E_LCDC_LAYER_VIDEO1, Yaddr, Uaddr, Vaddr);
//	ark1668e_lcdc_wait_for_vsync();

	return 0;
}
EXPORT_SYMBOL(ark_bootanimation_set_display_addr);





static int ark1668e_lcdc_convert_layer(int layer)
{
	switch(layer) {
		case 0:	//fb0 for UI.
			layer = ARK1668E_LCDC_LAYER_OSD2;
			break;
		case 1:	//fb1 for video/carback/phonelink
			layer = ARK1668E_LCDC_LAYER_VIDEO2;
			break;
		case 2:	//overlay for UI(carback track/radar)
			layer = ARK1668E_LCDC_LAYER_OSD1;
			break;
		case 3:	//tvout
			layer = ARK1668E_LCDC_LAYER_VIDEO1;
			break;
		case 4:	//aux for(itu601/itu656). Here is reserved.
			layer = ARK1668E_LCDC_LAYER_OSD3;
			break;
		default:
			layer = -1;
			break;
	}

	return layer;

}

int ark_disp_set_layer_en(int layer_id, int enable)
{
	if(lcdc_base == NULL){
	        return -1;
	}
	if(layer_id > 4 || layer_id < 0){
	        return -1;
	}
	ark1668e_lcdc_layer_enable(layer_id, enable);
	return 0;
}
EXPORT_SYMBOL(ark_disp_set_layer_en);

/*******************************************************************************/

int ark_track_display_init(int width,int height)
{ 
	if(lcdc_base == NULL)
		return -1;
	ark1668e_lcdc_set_video_osd_source_size(ARK1668E_LCDC_LAYER_OSD1, width, height);
	ark1668e_lcdc_set_video_osd_layer_point(ARK1668E_LCDC_LAYER_OSD1, 0, 0);
	ark1668e_lcdc_set_video_osd_win_point(ARK1668E_LCDC_LAYER_OSD1, 0, 0);
	ark1668e_lcdc_set_video_osd_size(ARK1668E_LCDC_LAYER_OSD1, width, height);
	ark1668e_lcdc_set_video_osd_format(ARK1668E_LCDC_LAYER_OSD1,ARK1668E_LCDC_FORMAT_RGBA888,ARK_LCDC_ORDER_YUYV,0);
	return 0;
}
EXPORT_SYMBOL(ark_track_display_init);

int ark_track_set_display_addr(unsigned int addr)
{ 
	//ark1668e_lcdc_set_osd_addr(ARK1668E_LCDC_LAYER_OSD1, addr);
	//ark1668e_lcdc_wait_for_vsync();
	
	lcdfb_info->render_addr[ARK1668E_LCDC_LAYER_OSD1].yaddr = addr;
	return 0;
}
EXPORT_SYMBOL(ark_track_set_display_addr);

int ark_track_alpha_blend(void)
{ 
	unsigned int val;

	val = readl(lcdc_base + ARK1668E_LCDC_BLD_MODE_LCD_REG0);
	val &= ~(0xF << 12);
	writel(val, lcdc_base + ARK1668E_LCDC_BLD_MODE_LCD_REG0);

	val = readl(lcdc_base + ARK1668E_LCDC_BLD_MODE_LCD_REG1);
	val |= (3 << 14);
	writel(val, lcdc_base + ARK1668E_LCDC_BLD_MODE_LCD_REG1); 

	return 0;
}
EXPORT_SYMBOL(ark_track_alpha_blend);

int ark_track_get_screen_info(int* width,int* height)
{
    if(lcdc_base == NULL){
            return -1;
    }
	*width = lcdc_width;
	*height = lcdc_height;
	return 0;
}
EXPORT_SYMBOL(ark_track_get_screen_info);

static void ark1668e_tvenc_video1_image_scaler(video_scaler_para *para)
{
	unsigned int rgb_ycbcr_bypass=0;
	unsigned int y_uv_order=0;
	unsigned int format = para->Format;
	unsigned int vblank,hblank,val;

	if ((para->XOffset+para->WinWidth)>para->SrcWidth || (para->YOffset+para->WinHeight)>para->SrcHeight
	    || para->DstHeight ==0 || para->DstWidth == 0) {
		printk("video layer scaler parameter error!\n");
		return ;
	}

	if(para->Format == ARK1668E_LCDC_FORMAT_Y_UV420 || para->Format == ARK1668E_LCDC_FORMAT_Y_UV420) {
		if(para->SrcWidth&7) {
			printk("Video layer scaler didn't support the width which is not the multiple of 8 when the format is SEQ420.\n");
			return ;
		}
	}

	vblank = para->UpBlank + para->DownBlank;
	hblank = para->LeftBlank + para->RightBlank;

	if (format >= ARK1668E_LCDC_FORMAT_Y_UV422) {
		y_uv_order = 1;
		format &= 1;
		rgb_ycbcr_bypass = 1;
	} else
		rgb_ycbcr_bypass = 0;

	val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
	val = (1<<22) | (y_uv_order<<21) | (1<<8)  | (1<<5)  | (1<<4)  | (format<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);


	if (format == ARK1668E_LCDC_FORMAT_OSD_BMP24BIT_VIDEO_YUV420) {
		val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
		val |= (1<<11);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
	}

	val = (para->YOffset<<12) | (para->XOffset);
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_WIN_POINT);

	val = (para->WinHeight<<12) | (para->WinWidth<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_WIN_SIZE);

	val = 0;
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_POSITION);

	val = (para->DstHeight<<12) | (para->DstWidth<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SIZE);

	val = (para->SrcHeight<< 12) | (para->SrcWidth);
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SOURCE_SIZE);

#if 0
	val = (unsigned int )para->SrcBuf;
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR1);

	val = (unsigned int )para->SrcBuf + para->SrcWidth*para->SrcHeight;
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR2);

	if (para->Format == ARK1668E_LCDC_FORMAT_OSD_BMP24BIT_VIDEO_YUV420) {
		val = ((unsigned int )para->SrcBuf + para->SrcWidth*para->SrcHeight) + para->SrcWidth*para->SrcHeight/4;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR3);
	}
	else if (para->Format == ARK1668E_LCDC_FORMAT_OSD_PALETTE_VIDEO_YUV422) {
		val = ((unsigned int )para->SrcBuf + para->SrcWidth*para->SrcHeight) + para->SrcWidth*para->SrcHeight/2;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR3);
	}
#endif

	val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_SCALE_CTL);
	val = (1<<7) | (1<<5);
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SCALE_CTL);

	if ((para->DstWidth+hblank) < para->WinWidth) {	   // enable filter when horizontal down scaler
		val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_SCALE_CTL);
		val |= (1<<6);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SCALE_CTL);
	}

	val = (para->LeftBlank<<18) | (para->WinWidth*1024/(para->DstWidth+hblank));
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SCAL_CTL0);

	val = (para->UpBlank<<18) | (para->WinHeight*1024/(para->DstHeight+vblank));
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SCAL_CTL1);

	if (para->Interlace4TV) {
		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val &= ~(1<<8);
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		//when v scaler cof is 0x400,v scaler  bypass, now we  should change the cof to
		//force v scaler, otherwise there was sawtooth on picture
		if((readl(lcdc_base + ARK1668E_LCDC_VIDEO1_SCAL_CTL1) &0x3FFFF) == 0x400) {
			val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_SCAL_CTL1);
			val = val - 1;
			writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SCAL_CTL1);
		}
		val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_SCALE_CTL);
		val &= ~(7<<9);
		val |= (1<<9) | (1<<11);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_SCALE_CTL);
	}

	if ((para->Format>= 4)&&(para->Format <= 12)) {
		val = 0;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG0);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG1);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG2);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG3);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG4);
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG5);
	} else {
		val = 0x01000100;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG0);
		val = 0x100167;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG1);
		val = 0xf4afa8;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG2);
		val = 0x12d100;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG3);
		val = 0xf4d000;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG4);
		val = 0xf69086;
		writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_COLOUR_MATRIX_REG5);
	}
}

static void ark1668e_tvenc_cfg_lcdclk(int enable)
{
	unsigned int val;

	if(enable){
		val = lcdc_readl_sys(lcdfb_info, 0xcc);
		val |= (1 << 14);         //video out
		lcdc_writel_sys(lcdfb_info, 0xcc, val);
	}else{
		val = lcdc_readl_sys(lcdfb_info, 0xcc);
		val &= ~(1<<14);         //video out
		lcdc_writel_sys(lcdfb_info, 0xcc, val);
	}
}

static int ark1668e_tvenc_cfg_tvpll(int mode)
{
	switch (mode)
	{
		case ARKE_TVENC_OUT_CVBS_NTSC:
		case ARKE_TVENC_OUT_CVBS_PAL:
			lcdc_writel_sys(lcdfb_info, 0x24, 0x08A09004);			//432M
			break;
		case ARKE_TVENC_AHDOUT_720P_25FPS:
			lcdc_writel_sys(lcdfb_info, 0x24, 0x08E12904);			//297M
			break;
		default:
			return -1;
	}
	return 0;
}

static void ark1668e_enable_tvenc(int enable)
{
	unsigned int val;

	if (enable) {
		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val |=(1 << 2);    //video out
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		ark1668e_lcdc_layer_enable(ARK1668E_LCDC_LAYER_VIDEO1, 0);
	} else {
		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val &= ~(1 << 2);    //video out
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
	}
}

static void ark1668e_set_tvenc_backcolor(unsigned char y, unsigned char cb, unsigned char cr)
{
	unsigned int val;
	val = (y << 16) |(cb << 8) |cr;
	writel(val, lcdc_base + ARK1668E_LCDC_BACK_COLOR_TV);
}

static void ark1668e_config_tvenc_cvbs_clk(void)
{
	unsigned int val;
	val = lcdc_readl_sys(lcdfb_info, 0xd0);
	val &= ~(0xff << 20);
	val |=  (0x7 << 24) |(1 << 21) | ( 0 << 14) | (0 << 12);
	lcdc_writel_sys(lcdfb_info, 0xd0, val);

	ark1668e_tvenc_cfg_lcdclk(1);
}

static void ark1668e_config_tvenc_ahd_clk(void)
{
	unsigned int val;

	val = lcdc_readl_sys(lcdfb_info, 0xd0);
	val &= ~(0xff << 20);
	val |=  (1 << 24) |(1 << 21) | ( 0 << 14) | (0 << 12) | 3;
	val &= ~(1 << 15);
	lcdc_writel_sys(lcdfb_info, 0xd0, val);

	ark1668e_tvenc_cfg_lcdclk(1);
}

static void ark1668e_enable_dac(void)
{
	unsigned int val;
	
	val = lcdc_readl_sys(lcdfb_info, 0x120);
	val &= ~(0x1f << 16);
	val |= (1 << 17) | ( 1 << 20);
	lcdc_writel_sys(lcdfb_info, 0x120, val);
}

static void ark1668e_cvbs_ntsc_init(void)
{
	//TV encoder setting
	unsigned int chroma_freq_ntsc = 0x21f07c1f;  //ntsc
	unsigned int chroma_phase = 0x2a;
	unsigned int clrbar_sel = 0;
	unsigned int clrbar_mode = 0;
	unsigned int bypass_yclamp = 0;
	unsigned int yc_delay = 4;
	unsigned int cvbs_enable = 1;
	unsigned int chroma_bw_1 = 0; // bw_1,bw_0 : 00: narrow band; 01: wide band; 10: extra wide; 11: ultra wide.
	unsigned int chroma_bw_0 = 1;
	unsigned int comp_yuv = 0;
	unsigned int compchgain = 0;
	unsigned int hsync_width = 0x3f; //0x7e*2
	unsigned int burst_width = 0x44;   //pal 0x3e     ntsc 0x44
	unsigned int back_porch = 0x3b;   //pal 0x45     ntsc 0x3b
	unsigned int cb_burst_amp = 0x20;
	unsigned int cr_burst_amp = 0x00;   //pal 0x20     ntsc 0x00
	unsigned int slave_mode =  0x1;
	unsigned int black_level  = 0xf2;
	unsigned int blank_level = 0xf0;
	unsigned int n1 = 0x17;
	unsigned int n3 = 0x21;
	unsigned int n8 = 0x1b;
	unsigned int n9 = 0x1b;
	unsigned int n10 = 0x24;
	unsigned int num_lines = 525;   // pal: 625;   ntsc: 525.
	unsigned int n0 = 0x3e;
	unsigned int n13 = 0x0f;
	unsigned int n14 = 0x0f;
	unsigned int n15 = 0x60;
	unsigned int n5 = 0x05;
	unsigned int white_level = 0x320;
	unsigned int cb_gain = 0x89;
	unsigned int n20 = 0x04;
	unsigned int cr_gain = 0x89;
	unsigned int n16 = 0x1;
	unsigned int n7 = 0x2;
	unsigned int tint = 0;
	unsigned int n17 = 0x0a;
	unsigned int n19 = 0x05;
	unsigned int n18 = 0x00;
	unsigned int breeze_way = 0x16;
	unsigned int n21 = 0x3ff;
	unsigned int front_porch = 0x10;    //pal 0x0c    ntsc 0x10   ??
	unsigned int n11 = 0x7ce;
	unsigned int n12 = 0x000;
	unsigned int activeline = 1440;
	unsigned int firstvideoline = 0xe;
	unsigned int uv_order = 0;
	unsigned int pal_mode = 0;       //pal 0x1    ntsc 0x0
	unsigned int invert_top = 0;
	unsigned int sys625_50 = 0;
	unsigned int cphase_rst = 3;
	unsigned int vsync5 = 1;
	unsigned int sync_level = 0x48;
	unsigned int n22 = 0;
	unsigned int agc_pulse_level = 0xa3;
	unsigned int bp_pulse_level = 0xc8;
	unsigned int n4 = 0x15;
	unsigned int n6 = 0x05;
	unsigned int n2 = 0x15;
	unsigned int vbi_blank_level = 0x128;
	unsigned int soft_rst = 0;
	//unsigned int row63 = 0;
	unsigned int row64 = 0x07;
	unsigned int wss_clock = 0x2f7;
	unsigned int wss_dataf1 = 0;
	unsigned int wss_dataf0 = 0;
	unsigned int wss_linef1 = 0;
	unsigned int wss_linef0 = 0;
	unsigned int wss_level = 0x3ff;
	unsigned int venc_en = 1;
	unsigned int uv_first = 0;
	unsigned int uv_flter_en = 1;
	unsigned int notch_en = 0;
	unsigned int notch_wide = 0;
	unsigned int notch_freq = 0;
	unsigned int row78 = 0;
	unsigned int row79 = 0;
	unsigned int row80 = 0;

	unsigned int val;

	val = chroma_freq_ntsc;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG0); //森揭隅砱 N秶 P秶

	val = chroma_bw_1<<27 | comp_yuv<<26|compchgain<<24|yc_delay<<17|cvbs_enable<<16|clrbar_sel<<10|clrbar_mode<<9|
				  bypass_yclamp<<8 | chroma_phase;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG1);

	val = cb_burst_amp<<24 | back_porch<<16 | burst_width<<8 | hsync_width;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG2);

	val = black_level<< 16 | slave_mode<<8 | cr_burst_amp ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG3);

	val = n3<<24 | n1<<16 | blank_level ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG4);

	val = n10<<24 | n9<<16 | n8 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG5);

	val = num_lines ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG6);

	val = n15<<24 | n14<<16| n13<<8 | n0 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG7);

	val = cb_gain<<24 | white_level<<8 | n5 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG8);

	val = n7<<24 | n16 <<16 | cr_gain<<8 | n20 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG9);

	val = n18<<24 | n19 <<16 | n17<<8 | tint ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG10);

	val = front_porch<<24 | n21<<8 | breeze_way ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG11);

	val = n12 <<16 | n11 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG12);

	val = activeline ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG13);

	val = n22<<24 | sync_level <<16 | uv_order<<15|pal_mode<<14|chroma_bw_0<<13|invert_top<<12|sys625_50<<11|
		  cphase_rst<<9|vsync5<<8     | firstvideoline ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG14);

	val = n6<<24 | n4 <<16  | bp_pulse_level<<8 | agc_pulse_level ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG15);

	val = soft_rst<<24| vbi_blank_level<<8 | n2 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG16);

	val = row64 <<16 | wss_clock ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG17);

	val = wss_dataf1 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG18);

	val = wss_dataf0 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG19);

	val = wss_level <<16 | wss_linef0<<8 | wss_linef1 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG20);

	val = row80<<24 | row79<<16 | row78<<8 | venc_en<<7 | uv_first <<6 | uv_flter_en<<5  |notch_en<<4 |  notch_wide<<3 | notch_freq ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG21);
}

static void ark1668e_cvbs_pal_init(void)
{
	//TV encoder setting
	unsigned int chroma_freq_palbg = 0x2a098acb;  //pal
	unsigned int chroma_phase = 0x2a;
	unsigned int clrbar_sel = 0;
	unsigned int clrbar_mode = 0;
	unsigned int bypass_yclamp = 0;
	unsigned int yc_delay = 4;
	unsigned int cvbs_enable = 1;
	unsigned int chroma_bw_1 = 0; // bw_1,bw_0 : 00: narrow band; 01: wide band; 10: extra wide; 11: ultra wide.
	unsigned int chroma_bw_0 = 1;
	unsigned int comp_yuv = 0;
	unsigned int compchgain = 0;
	unsigned int hsync_width = 0x3f; //0x7e*2
	unsigned int burst_width = 0x3e;   //pal 0x3e     ntsc 0x44
	unsigned int back_porch = 0x45;   //pal 0x45     ntsc 0x3b
	unsigned int cb_burst_amp = 0x20;
	unsigned int cr_burst_amp = 0x20;   //pal 0x20     ntsc 0x00
	unsigned int slave_mode = 0x1;
	unsigned int black_level = 0xf2;
	unsigned int blank_level  = 0xf0;
	unsigned int n1 = 0x17;
	unsigned int n3 = 0x21;
	unsigned int n8 = 0x1b;
	unsigned int n9 = 0x1b;
	unsigned int n10 = 0x24;
	unsigned int num_lines = 625;   // pal: 625;   ntsc: 525.
	unsigned int n0 = 0x3e;
	unsigned int n13 = 0x0f;
	unsigned int n14 = 0x0f;
	unsigned int n15 = 0x60;
	unsigned int n5 = 0x05;
	unsigned int white_level = 0x320;
	unsigned int cb_gain = 0x89;
	unsigned int n20 = 0x04;
	unsigned int cr_gain = 0x89;
	unsigned int n16 = 0x1;
	unsigned int n7 = 0x2;
	unsigned int tint = 0;
	unsigned int n17 = 0x0a;
	unsigned int n19 = 0x05;
	unsigned int n18 = 0x00;
	unsigned int breeze_way  = 0x16;
	unsigned int n21 = 0x3ff;
	unsigned int front_porch = 0x0c;    //pal 0x0c    ntsc 0x10
	unsigned int n11 = 0x7ce;
	unsigned int n12 = 0x000;
	unsigned int activeline = 1440;
	unsigned int firstvideoline = 0x0e;
	unsigned int uv_order = 0;
	unsigned int pal_mode = 1;       //pal 0x1    ntsc 0x0
	unsigned int invert_top = 0;
	unsigned int sys625_50 = 0;
	unsigned int cphase_rst = 3;
	unsigned int vsync5 = 1;
	unsigned int sync_level = 0x48;
	unsigned int n22 = 0;
	unsigned int agc_pulse_level = 0xa3;
	unsigned int bp_pulse_level = 0xc8;
	unsigned int n4 = 0x15;
	unsigned int n6 = 0x05;
	unsigned int n2 = 0x15;
	unsigned int vbi_blank_level  = 0x128;
	unsigned int soft_rst = 0;
	//unsigned int row63 = 0;
	unsigned int row64 = 0x07;
	unsigned int wss_clock = 0x2f7;
	unsigned int wss_dataf1 = 0;
	unsigned int wss_dataf0 = 0;
	unsigned int wss_linef1 = 0;
	unsigned int wss_linef0 = 0;
	unsigned int wss_level  = 0x3ff;
	unsigned int venc_en  = 1;
	unsigned int uv_first = 0;
	unsigned int uv_flter_en = 1;
	unsigned int notch_en = 0;
	unsigned int notch_wide  = 0;
	unsigned int notch_freq  = 0;
	unsigned int row78 =  0;
	unsigned int row79 = 0;
	unsigned int row80 = 0;

	unsigned int val;

	val = chroma_freq_palbg;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG0); //森揭隅砱 N秶 P秶

	val = chroma_bw_1<<27 | comp_yuv<<26|compchgain<<24|yc_delay<<17|cvbs_enable<<16|clrbar_sel<<10|clrbar_mode<<9|
		bypass_yclamp<<8 | chroma_phase;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG1);

	val = cb_burst_amp<<24 | back_porch<<16 | burst_width<<8 | hsync_width;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG2);

	val = black_level<< 16 | slave_mode<<8 | cr_burst_amp ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG3);

	val = n3<<24 | n1<<16 | blank_level ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG4);

	val = n10<<24 | n9<<16 | n8 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG5);

	val = num_lines ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG6);

	val = n15<<24 | n14<<16| n13<<8 | n0 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG7);

	val = cb_gain<<24 | white_level<<8 | n5 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG8);

	val = n7<<24 | n16 <<16 | cr_gain<<8 | n20 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG9);

	val = n18<<24 | n19 <<16 | n17<<8 | tint ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG10);

	val = front_porch<<24 | n21<<8 | breeze_way ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG11);

	val = n12 <<16 | n11 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG12);

	val = activeline ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG13);

	val = n22<<24 | sync_level <<16 | uv_order<<15|pal_mode<<14|chroma_bw_0<<13|invert_top<<12|sys625_50<<11|
						  cphase_rst<<9|vsync5<<8     | firstvideoline ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG14);

	val = n6<<24 | n4 <<16  | bp_pulse_level<<8 | agc_pulse_level ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG15);

	val = soft_rst<<24| vbi_blank_level<<8 | n2 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG16);

	val = row64 <<16 | wss_clock ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG17);

	val = wss_dataf1 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG18);

	val = wss_dataf0 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG19);

	val = wss_level <<16 | wss_linef0<<8 | wss_linef1 ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG20);

	val = row80<<24 | row79<<16 | row78<<8 | venc_en<<7 | uv_first <<6 | uv_flter_en<<5  |notch_en<<4 |  notch_wide<<3 | notch_freq ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG21);
}

static void ark1668e_ahd_720p25_init(void)
{
	unsigned int Control_0 = 0xa4;
	unsigned int Control_1 = 0xc0;
	unsigned int Control_2 = 0x40;
	unsigned int Control_3 = 0x00;
	unsigned int Hphase_value_man = 0x192;
	unsigned int Vphase_value_man = 0x2eb;		//0x0;
	unsigned int Fsc_seed_man = 	0x27890423;
	unsigned int Hblank_start_man = 0x656;
	unsigned int Hblank_end_man = 0x116;
	unsigned int Hsync1_start_man = 0x00;
	unsigned int Hsync1_end_man = 0x7c;
	unsigned int Hsync2_start_man = 0x00;
	unsigned int Hsync2_end_man  = 0x7c;
	unsigned int HBroad1_start_man = 0x0;
	unsigned int HBroad1_end_man = 0x268;
	unsigned int HBroad2_start_man = 0x3de;
	unsigned int HBroad2_end_man  = 0x646;
	unsigned int burstgate_start_man = 0x9f;
	unsigned int burstgate_end_man = 0x10b;
	unsigned int Halfline_start_man = 0x000;
	unsigned int Equalising1_end_man = 0x3e;
	unsigned int Halfline2_start_man = 0x3de;
	unsigned int Halfline2_end_man = 0x41c;
	unsigned int Equalising2_end_man = 0x00;
	unsigned int Vsync1_start_man = 0x00;
	unsigned int Vsync1_end_man = 0x02;
	unsigned int Vsync2_start_man = 0x00;
	unsigned int Vsync2_end_man = 0x02;
	unsigned int Vblank1_start_man = 0x2eb;
	unsigned int Vblank1_end_man = 0x1b;
	unsigned int Vblank2_start_man = 0x2eb;
	unsigned int Vblank2_end_man = 0x1b;
	unsigned int Luma_scaling_value = 0x4e;
	unsigned int Sync_scaling_value = 0x40;
	unsigned int Black_level_value  = 0x00;
	unsigned int Preemphasis_gain = 0x00;
	unsigned int Tx_Data_word = 0x000;
	unsigned int VSync1_half_start = 0x2eb;
	unsigned int VSync1_half_end = 0x4;
	unsigned int VSync2_half_start = 0x2eb;
	unsigned int VSync2_half_end = 0x4;
	unsigned int vsyn_hor_start = 0x3de;
	unsigned int vsyn_hor_end = 0x0;
	unsigned int Y_in_offset = 16;
	unsigned int Default_UV_scaling_value = 0x3b1;		//0x2b1;
	unsigned int Default_CB_scaling_value = 0x15c;
	unsigned int Default_CR_scaling_value = 0x2b0;
	unsigned int Default_Burst_amplitude_value = 0x59;
	unsigned int val;

	val = (Control_0 << 0)|(Control_1 << 8)|(Control_2 <<16)|(Control_3 <<24);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG0);

	val = Hphase_value_man|(Vphase_value_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG1);

	val = Hblank_start_man|(Hblank_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG2);

	val = Hsync1_start_man|(Hsync1_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG3);

	val = Hsync2_start_man|(Hsync2_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG4);

	val = HBroad1_start_man|(HBroad1_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG5);

	val = HBroad2_start_man|(HBroad2_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG6);

	val = burstgate_start_man|(burstgate_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG7);

	val = Halfline_start_man;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG8);

	val = Equalising1_end_man|(Equalising2_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG9);

	val = Vsync1_start_man|(Vsync1_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG10);

	val = Vsync2_start_man|(Vsync2_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG11);

	val = Vblank1_start_man|(Vblank1_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG12);

	val = Vblank2_start_man|(Vblank2_end_man<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG13);

	val = Fsc_seed_man ;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG14);

	val = Luma_scaling_value|(Sync_scaling_value<<8)|(Black_level_value <<16)|(Preemphasis_gain<<24);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG15);

	val = VSync1_half_start|(VSync1_half_end<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG16);

	val = VSync2_half_start|(VSync2_half_end<<16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG17);

	val = Default_UV_scaling_value | (Default_CB_scaling_value << 16);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG18);

	val = Default_CR_scaling_value;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG19);

	val = Default_Burst_amplitude_value;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG20);

	val = vsyn_hor_start | (vsyn_hor_end << 12);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG21);

	val = Y_in_offset;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG22);

	val = Halfline2_start_man | (Halfline2_end_man << 12);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG23);

	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG24);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG25);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG26);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG27);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG28);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG29);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG30);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG31);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG32);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG33);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG34);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG35);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG36);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG37);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG38);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG39);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG40);
	writel(0, lcdc_base + ARK1668E_LCDC_TV_AHD_PARAM_REG41);

	val = Tx_Data_word;
	writel(val, lcdc_base + ARK1668E_LCDC_TV_PARAM_REG16);
}

cvbs_format_struct cvbs_info[2] =
{
	//{720, 576, 144, 24, 0}, //PAL
	{720, 576, 142, 24, 0}, //PAL
	// {720, 480, 138, 22, 1}  //NTSC
	{720, 480, 136, 22, 1}  //NTSC
};

ahd_format_struct AHD_info[2] =
{
	{1279, 719,27,670,0,6,22,0,1}, //720p @25 pixle1980
	//{1279, 719,199,299,199,6,22,0,1}, //720p @25 pixle1980
	{0},
};

static void ark1668e_config_tvenc_cvbs_timing(unsigned int mode)
{
	unsigned int tvmode = mode;
	unsigned int val;
	tvenc_info_struct cvbs_timing;

	cvbs_timing.tHSW = (cvbs_info[tvmode].hsw-1);
	cvbs_timing.tHBP = 0x0;
	cvbs_timing.tHFP = 0x0;
	cvbs_timing.tCPL = (cvbs_info[tvmode].width - 1);
	cvbs_timing.tVSW = (cvbs_info[tvmode].vsw - 1);
	cvbs_timing.tVFP = 0x0;
	cvbs_timing.tVBP = 0x0;
	cvbs_timing.tLPS = (cvbs_info[tvmode].height/2- 1);

	cvbs_timing.tIVS = 0x0;
	cvbs_timing.tIHS = 0x0;
	cvbs_timing.tIOE = 0x0;

	val = (cvbs_timing.tHSW<<20) | (cvbs_timing.tHBP<<10) | (cvbs_timing.tHFP<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING0_TV);

	val = (cvbs_timing.tVFP<<19) | (cvbs_timing.tVSW<<13) | (cvbs_timing.tCPL<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING1_TV);

	val = (cvbs_timing.tIOE<<23) | (cvbs_timing.tIHS<<22) | (cvbs_timing.tIVS<<21) | (cvbs_timing.tLPS<<10) | (cvbs_timing.tVBP<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING2_TV);

	val = readl(lcdc_base + ARK1668E_LCDC_TIMING_FRAME_START_CNT_TV);
	val = cvbs_timing.tVSW/2;
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING_FRAME_START_CNT_TV);

	//rLCD_TV_HV_DELAY = 39;
}

static void ark1668e_config_tvenc_ahd_timing(void)
{
	tvenc_info_struct ahdtiming;
	unsigned int val;

	ahdtiming.tHSW = AHD_info[0].hsw;
	ahdtiming.tHBP = AHD_info[0].hbp;
	ahdtiming.tHFP = AHD_info[0].hfp;
	ahdtiming.tCPL = AHD_info[0].width;
	ahdtiming.tVSW = AHD_info[0].vsw;
	ahdtiming.tVFP = AHD_info[0].vfp;
	ahdtiming.tVBP = AHD_info[0].vbp;
	ahdtiming.tLPS = AHD_info[0].height;
	ahdtiming.tIVS = 0x0;
	ahdtiming.tIHS = 0x0;
	ahdtiming.tIOE = 0x0;

	val = (ahdtiming.tHSW<<20)|(ahdtiming.tHBP<<10)|(ahdtiming.tHFP<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING0_TV);

	val = (ahdtiming.tVFP<<19)|(ahdtiming.tVSW<<13)|(ahdtiming.tCPL<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING1_TV);

	val = (ahdtiming.tIOE<<23)|(ahdtiming.tIHS<<22)|(ahdtiming.tIVS<<21)|(ahdtiming.tLPS<<10)|(ahdtiming.tVBP<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING2_TV);

	val = readl(lcdc_base + ARK1668E_LCDC_TIMING_FRAME_START_CNT_TV);
	val = ahdtiming.tVSW/2;
	writel(val, lcdc_base + ARK1668E_LCDC_TIMING_FRAME_START_CNT_TV);

}

static void ark1668e_config_ahd_mode(void)
{
	unsigned int val;

	val = (0<<10)|(0<<9)|(0<<8)|(0<<7) |(AHD_info[0].mode<<1)|(1<<0);
	writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);

	val = readl(lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
	val |= 1<<7;
	writel(val, lcdc_base + ARK1668E_LCDC_VIDEO1_CTL);
}

static void ark1668e_disp_init_tvenc_cvbs(unsigned int mode)
{
	unsigned int val;

	if (mode == CVBS_NTSC) {
		printk(KERN_ALERT "ark1668e_disp_init_tvenc_cvbs mode is ntsc\n");
		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val |= (1<<1);
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		ark1668e_config_tvenc_cvbs_timing(mode);
		ark1668e_enable_dac();
		ark1668e_cvbs_ntsc_init();
		ark1668e_config_tvenc_cvbs_clk();
	} else {
		printk(KERN_ALERT "ark1668e_disp_init_tvenc_cvbs mode is pal\n");
		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val &= ~(1<<1);
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		ark1668e_config_tvenc_cvbs_timing(mode);
		ark1668e_enable_dac();
		ark1668e_cvbs_pal_init();
		ark1668e_config_tvenc_cvbs_clk();
	}
	val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
	val |= (1<<8) | (1<<0);
	val &= ~((1<<10)|(1<<9)|(1<<7));
	writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
}

static void ark1668e_disp_init_tvenc_ahd(unsigned int mode)
{
	unsigned int val;

	if (mode == ARKE_TVENC_AHDOUT_720P_25FPS) {
		printk(KERN_ALERT "ark1668e_disp_init_tvenc_cvbs mode is ahd 720p 25fps\n");
		ark1668e_config_tvenc_ahd_timing();
		ark1668e_enable_dac();
		ark1668e_config_ahd_mode();
		ark1668e_config_tvenc_ahd_clk();
		ark1668e_ahd_720p25_init();
	}
	val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
	val |= 1<<16;//ピ遙善AHD
	writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
}

static int ark1668e_disp_set_tvenc_out_mode(int out_mode)
{
	ark1668e_tvenc_cfg_tvpll(out_mode);
	switch (out_mode)
	{
		case ARKE_TVENC_OUT_CVBS_NTSC:
		case ARKE_TVENC_OUT_CVBS_PAL:
			ark1668e_disp_init_tvenc_cvbs(out_mode - ARKE_TVENC_OUT_CVBS_PAL);
			break;
		case ARKE_TVENC_AHDOUT_720P_25FPS:
			ark1668e_disp_init_tvenc_ahd(out_mode);
			break;
		default:
			return -1;
	}
	return 0;
}

static int ark1668e_disp_set_tvenc_cfg(struct ark_disp_tvenc_cfg_arg *arg)
{
	if(lcdfb_info->pdata.interface_type > ARK1668E_LCDC_INTERFACE_MIPI){
		printk(KERN_ALERT "+++The screen type no need to set tvenc cfg+++\n");
		return 0;
	}

	if (ark1668e_disp_set_tvenc_out_mode(arg->out_mode)) {
		printk(KERN_ALERT "%s %d: set out mode error\n",
			__FUNCTION__, __LINE__);
		return -1;
	}

	ark1668e_set_tvenc_backcolor(arg->backcolor_y,arg->backcolor_cb,arg->backcolor_cr);

	return 0;
}

static int ark1668e_disp_set_gui_tvout(struct ark_disp_tvenc_cfg_arg *arg)
{
	unsigned int val;
	video_scaler_para para={0};
	if (lcdc_base == NULL) {
		printk(KERN_ALERT "lcdc_base is null\n");
		return -1;
	}

	if (arg->enable) {
		printk(KERN_ALERT "ark1668e_disp_set_gui_tvout enable\n");
		lcdfb_info->gui_tvout = 1;
		ark1668e_disp_set_tvenc_cfg(arg);

		val = readl(lcdc_base + ARK1668E_LCDC_CONTROL);
		val |= (1<<14);
		writel(val, lcdc_base + ARK1668E_LCDC_CONTROL);

		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val &=~(0x3f<<10);
		val |=(0x3f<<10);
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);

		para.Format = ARK1668E_LCDC_FORMAT_RGBA888;;
		para.SrcBuf = readl(lcdc_base + ARK1668E_LCDC_OSD2_ADDR);
		para.SrcWidth = lcdfb_info->info->var.xres;
		para.SrcHeight = lcdfb_info->info->var.yres;
		para.WinWidth = lcdfb_info->info->var.xres;
		para.WinHeight = lcdfb_info->info->var.yres;
		para.Interlace4TV = 0;

		if (arg->out_mode== ARKE_TVENC_OUT_CVBS_NTSC) {
			para.DstWidth = 720;
			para.DstHeight =480;
		} else if (arg->out_mode == ARKE_TVENC_OUT_CVBS_PAL) {
			para.DstWidth = 720;
			para.DstHeight =576;
		} else if (arg->out_mode == ARKE_TVENC_AHDOUT_720P_25FPS) {
			para.DstWidth = 1280;
			para.DstHeight =720;
		} else {
			para.DstWidth = 720;
			para.DstHeight =480;
		}

		ark1668e_enable_tvenc(0);
		writel(para.SrcBuf,  lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR1);
		ark1668e_tvenc_video1_image_scaler(&para);

		ark1668e_enable_tvenc(1);
	} else {
		printk(KERN_ALERT "ark1668e_disp_set_gui_tvout disable\n");
		lcdfb_info->gui_tvout = 0;
		ark1668e_enable_tvenc(0);
		//ark1668e_tvenc_cfg_lcdclk(0);
	}
	return 0;
}

static int ark1668e_disp_set_video_tvout(struct ark_disp_tvenc_cfg_arg *arg)
{
	video_scaler_para para={0};
	if(lcdc_base == NULL){
		printk(KERN_ALERT "lcdc_base is null\n");
		return -1;
	}
	if (arg->enable) {
		printk(KERN_ALERT "ark1668e_disp_set_video_tvout enable\n");
		lcdfb_info->video_tvout = 1;

#if 0
		ark1668e_disp_set_tvenc_cfg(arg);

		val = readl(lcdc_base + ARK1668E_LCDC_CONTROL);
		val |= (1<<14);
		writel(val, lcdc_base + ARK1668E_LCDC_CONTROL);

		val = readl(lcdc_base + ARK1668E_LCDC_TV_CONTROL);
		val &=~(0x7f<<10);
		val |=(0x3f<<10);
		writel(val, lcdc_base + ARK1668E_LCDC_TV_CONTROL);
#endif

		para.Format = ARK1668E_LCDC_FORMAT_Y_UV420;
		//para.SrcBuf = readl(lcdc_base + ARK1668E_LCDC_VIDEO2_ADDR1);
		para.SrcWidth = arg->src_width;
		para.SrcHeight = arg->src_height;
		para.WinWidth = arg->src_width;
		para.WinHeight = arg->src_height;
		para.Interlace4TV = 0;

		if (arg->out_mode== ARKE_TVENC_OUT_CVBS_NTSC) {
			para.DstWidth = 720;
			para.DstHeight =480;
		} else if (arg->out_mode == ARKE_TVENC_OUT_CVBS_PAL) {
			para.DstWidth = 720;
			para.DstHeight =576;
		} else if (arg->out_mode == ARKE_TVENC_AHDOUT_720P_25FPS) {
			para.DstWidth = 1280;
			para.DstHeight =720;
		} else {
			para.DstWidth = 720;
			para.DstHeight =480;
		}

		ark1668e_enable_tvenc(0);
		ark1668e_tvenc_video1_image_scaler(&para);

		//ark1668e_enable_tvenc(1);
	} else {
		printk(KERN_ALERT "ark1668e_disp_set_video_tvout disable\n");
		lcdfb_info->video_tvout = 0;
		ark1668e_enable_tvenc(0);
		//ark1668e_tvenc_cfg_lcdclk(0);
	}
	return 0;
}

/*******************************************************************************/

int ark1668e_lcdfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
{
	struct ark1668e_lcdfb_info *sinfo;
    int layer;
	int error = 0;

	if(!info || !info->par) {
		printk(KERN_ERR "ERR: %s, Invalid info:%p or info->par:%p\n", __FUNCTION__, info, info->par);
		error = -EINVAL;
		goto end;
	}
	if(!lcdc_base) {
		printk(KERN_ERR "ERR: %s, Invalid lcdc_base(NULL)\n", __FUNCTION__);
		error = -EINVAL;
		goto end;
	}
	sinfo = info->par;
	//layer = info->node;
	layer = ark1668e_lcdc_convert_layer(info->node);
	if(layer < 0) {
		printk(KERN_ERR "ERR: %s, Invalid layer:%d\n", __FUNCTION__, layer);
		error = -EINVAL;
		goto end;
	}

	/* printk("ark1668e_lcdfb_ioctl layer=%d, cmd=0x%x.\n", layer, cmd); */
	switch (cmd) {
		case FBIO_WAITFORVSYNC:
		case ARKFB_WAITFORVSYNC:
			error = ark1668e_lcdc_wait_for_vsync();
			break;
		case ARKFB_SHOW_WINDOW:
			error = ark1668e_lcdc_layer_enable(layer, 1);
			break;
		case ARKFB_HIDE_WINDOW:
			error = ark1668e_lcdc_layer_enable(layer, 0);
			break;
		case ARKFB_SET_WINDOW_POS: {
			unsigned int x, y, data;
			if(copy_from_user(&data, (void *)arg, sizeof(unsigned int))) {
					printk("ERR: %s, copy from user para error\n", __func__);
					error = -EFAULT;
					goto end;
			}
			x =  data & 0xFFFF;
			y = (data >> 16) & 0xFFFF;
			error = ark1668e_lcdc_set_video_osd_layer_point(layer, x, y);
			break;
		}
        case ARKFB_SET_WINDOW_SIZE: {
			unsigned int width, height, data;
			if(copy_from_user(&data, (void *)arg, sizeof(unsigned int))){
					printk("ERR: %s, copy from user para error\n", __func__);
					error = -EFAULT;
					goto end;
			}
			width  = data & 0xFFFF;
			height = (data >> 16) & 0xFFFF;
			if((layer >= ARK1668E_LCDC_LAYER_OSD1) && (layer <= ARK1668E_LCDC_LAYER_OSD3)) {
				error += ark1668e_lcdc_set_video_osd_size(layer, width, height);
				error += ark1668e_lcdc_set_video_osd_source_size(layer, width, height);
			} else if ((layer >= ARK1668E_LCDC_LAYER_VIDEO1) && (layer <= ARK1668E_LCDC_LAYER_VIDEO2)) {
				error += ark1668e_lcdc_set_video_osd_source_size(layer, width, height);
				error += ark1668e_lcdc_set_video_osd_win_point(layer, 0, 0);
				error += ark1668e_lcdc_set_video_win_size(layer, width, height);
				error += ark1668e_lcdc_set_video_osd_size(layer, width, height);
				//scale
				//if(layer == ARK1668E_LCDC_LAYER_VIDEO1) {
				//	error += ark1668e_lcdc_set_video1_scal(ARK1668E_LCDC_LAYER_VIDEO1, width, height,
				//		0, 0, 0, 0, width, height, 0);
				//}
			}
			break;
        }
		case ARKFB_SET_WINDOW_FORMAT: {
			unsigned int data, format, yuv_order, rgb_order;
			if(copy_from_user(&data, (void *)arg, sizeof(unsigned int))) {
					printk("ERR: %s, copy from user para error\n", __func__);
					error = -EFAULT;
					goto end;
			}
			format	  = (data >> 0)  & 0xFF;
			yuv_order = (data >> 16) & 0xF;
			rgb_order = (data >> 24) & 0xF;
			error = ark1668e_lcdc_set_video_osd_format(layer, format, yuv_order, rgb_order);
			//if((layer >= ARK1668E_LCDC_LAYER_OSD1) && (layer <= ARK1668E_LCDC_LAYER_OSD3)) {
				//error += ark1668e_lcdc_alpha_blend_with_backcolor_enable(layer, 1);
				//error += ark1668e_lcdc_alpha_blend_per_pix_mode_enable(layer, 1);
			//}
			if(format == ARK1668E_LCDC_FORMAT_RGBA888){
				error += ark1668e_lcdc_alpha_blend_with_backcolor_enable(layer, 1);
				error += ark1668e_lcdc_alpha_blend_per_pix_mode_enable(layer, 1);
			}
			printk(KERN_DEBUG "layer=%d: format=%d, yuv_order:%d, rgb_order:%d\n",
				layer, format, yuv_order, rgb_order);
			break;
		}
		case ARKFB_SET_WINDOW_ADDR: {
			struct ark_disp_addr addr;
			if(copy_from_user(&addr, (void *)arg, sizeof(struct ark_disp_addr))){
				printk("ERR: %s, copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			memcpy(&sinfo->render_addr[layer], &addr, sizeof(struct ark_disp_addr));
			//printk(KERN_ALERT "layer=%d: yaddr=0x%0x, cbaddr=0x%0x, craddr=0x%0x.\n ",layer, addr.yaddr, addr.cbaddr, addr.craddr);
			if(lcdfb_info->video_tvout && layer == ARK1668E_LCDC_LAYER_VIDEO2){
				writel(addr.yaddr,  lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR1);
				writel(addr.cbaddr, lcdc_base + ARK1668E_LCDC_VIDEO1_ADDR2);
				ark1668e_enable_tvenc(1);
			}

			break;
		}
		case ARKFB_SET_WINDOW_SCALER: {
			struct ark_disp_scaler scaler;
			if(layer != ARK1668E_LCDC_LAYER_VIDEO1){
				error = -EINVAL;
				printk("ERR: %s, Only video1 layer support scaler\n", __func__);
				goto end;
			}
			if(copy_from_user(&scaler, (void *)arg, sizeof(struct ark_disp_scaler))){
				printk("ERR: %s, copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			error += ark1668e_lcdc_set_video_osd_size(layer, scaler.out_w, scaler.out_h);
			error += ark1668e_lcdc_set_video1_scal(layer, scaler.src_w, scaler.src_h,
				scaler.cut_left, scaler.cut_right, scaler.cut_top, scaler.cut_bottom,
				scaler.out_w, scaler.out_h, 0);
			//printk(KERN_DEBUG "layer=%d: scaler src_w=%d, src_h=%d, out_w=%d, out_h=%d.\n ",
			//	layer, scaler.src_w, scaler.src_h, scaler.out_w, scaler.out_h);
			break;
		}
		case ARKFB_SET_WINDOW_ATOMIC: {
			struct ark_disp_atomic atomic;
			if(copy_from_user(&atomic, (void *)arg, sizeof(struct ark_disp_atomic))){
				printk("ERR: %s, copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			atomic.layer = ark1668e_lcdc_convert_layer(atomic.layer);
			if(!atomic.atomic_stat || atomic.layer != layer){
				printk("ERR: %s, atomic_stat:%d or layer:%d error\n", __func__, atomic.atomic_stat, atomic.layer);
				error = -EFAULT;
				goto end;
			}
			printk(KERN_DEBUG "%s===>layer=%d, atomic_stat=0x%0x.\n ",__func__, layer, atomic.atomic_stat);
			sinfo->atomic_flag |= (1 << layer);
			memcpy(&sinfo->patomic[layer], &atomic, sizeof(struct ark_disp_atomic));
			error += ark1668e_lcdc_wait_for_vsync();
			break;
		}
		case ARKFB_GET_WINDOW_ADDR: {
			struct ark_disp_addr addr;
			memset(&addr, 0, sizeof(struct ark_disp_addr));
			if((layer >= ARK1668E_LCDC_LAYER_OSD1) && (layer <= ARK1668E_LCDC_LAYER_OSD3)) {
				addr.yaddr = ark1668e_lcdc_get_osd_addr(layer);
				if(addr.yaddr < 0) {
					addr.yaddr = 0;
					goto end;
				}
			} else {
				error += ark1668e_lcdc_get_video_addr(layer, &addr.yaddr, &addr.cbaddr, &addr.craddr);
				if(error < 0) {
					printk("%s: ark1668e_lcdc_get_video_addr failed\n", __func__);
					error = -EFAULT;
					goto end;
				}
			}
			if(copy_to_user((void  *)arg, &addr, sizeof(struct ark_disp_addr))){
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			break;
		}
		case ARKFB_GET_SCREEN_INFO: {
			struct ark_screen screen;
			memset(&screen, 0, sizeof(struct ark_screen));
			screen.width  = screen.disp_width  = lcdc_width;
			screen.height = screen.disp_height = lcdc_height;
			if(copy_to_user((void  *)arg, &screen, sizeof(struct ark_screen))){
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			break;
		}
		case ARKFB_SET_SCREEN_INFO: {
			struct ark_screen screen;
			if(copy_from_user(&screen, (void  *)arg, sizeof(struct ark_screen))){
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			///////////////// Reserved///////////////////
			break;
		}
		case ARKFB_GET_PLATFORM_INFO: {
			struct ark_platform_info platform;
			memset(&platform, 0, sizeof(struct ark_platform_info));
			platform.type = ARK_PLATFORM_ARK1668ED;
			if(copy_to_user((void  *)arg, &platform, sizeof(struct ark_platform_info))){
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			break;
		}
		case ARKFB_GET_WINDOW_FORMAT: {
			int format = ark1668e_lcdc_get_video_osd_format(layer);
			if(format < 0) {
				printk("%s: get format failed\n", __func__);
				error = -EFAULT;
				goto end;
			}
			if(copy_to_user((void  *)arg, &format, sizeof(int))){
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			break;
		}
		case ARKFB_SET_VP_INFO: {
			struct ark_disp_vp vp;
			memset(&vp, 0, sizeof(struct ark_disp_vp));
			if(copy_from_user(&vp, (void  *)arg, sizeof(struct ark_disp_vp))) {
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			error += ark1668e_lcdc_set_video_osd_color_matrix(layer,
				vp.reg[0], vp.reg[1], vp.reg[2], vp.reg[3], vp.reg[4], vp.reg[5]);
			if(error == 0) {
				memcpy(&lcdc_vp, &vp, sizeof(struct ark_disp_vp));
			}
			break;
		}
		case ARKFB_GET_VP_INFO: {
			if(copy_to_user((void  *)arg, &lcdc_vp, sizeof(struct ark_disp_vp))) {
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			break;
		}
		case ARKFB_SET_REG_VALUE: {
			struct ark_disp_reg reg;

			if(copy_from_user(&reg, (void *)arg, sizeof(struct ark_disp_reg))){
				printk("%s: copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}

			if((reg.addr & 0xffff0000) == 0xe0500000){        
				writel(reg.value, sinfo->mmio + (reg.addr&0xffff));
				printk("arkfb write reg:0x%0x=0x%0x.\n ", reg.addr, reg.value);
			}else{
				error = -EINVAL;
				goto end;
			}
			break;
		}
        case ARKFB_GET_REG_VALUE: {
			struct ark_disp_reg reg;
			if(copy_from_user(&reg, (void *)arg, sizeof(struct ark_disp_reg))){
				printk("%s: copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			if((reg.addr & 0xffff0000) == 0xe0500000){        
				reg.value = readl(sinfo->mmio + (reg.addr&0xffff));
				printk("arkfb read reg:0x%0x=0x%0x.\n ", reg.addr, reg.value);
			}else{
				error = -EINVAL;
				goto end;
			}
			if(copy_to_user((void  *)arg, &reg, sizeof(struct ark_disp_reg))){
				printk("%s: copy to user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}
			break;
		}
		case ARKFB_SET_GUI_TVOUT: {
			struct ark_disp_tvenc_cfg_arg cfg;
			if(copy_from_user(&cfg, (void *)arg, sizeof(struct ark_disp_tvenc_cfg_arg))){
				printk("ERR: %s, copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}

			ark1668e_disp_set_gui_tvout(&cfg);
			break;
		}
		case ARKFB_SET_VIDEO_TVOUT: {
			struct ark_disp_tvenc_cfg_arg cfg;
			if(copy_from_user(&cfg, (void *)arg, sizeof(struct ark_disp_tvenc_cfg_arg))){
				printk("ERR: %s, copy from user para error\n", __func__);
				error = -EFAULT;
				goto end;
			}

			ark1668e_disp_set_video_tvout(&cfg);

			break;
		}
		default:
			break;
	}
end:
    return error;
}
EXPORT_SYMBOL(ark1668e_lcdfb_ioctl);

int ark1668e_lcdc_funcs_init(struct ark1668e_lcdfb_info *sinfo)
{
	struct fb_info *info = NULL;
	struct fb_var_screeninfo *var = NULL;


	if(!sinfo) {
		printk(KERN_ERR "ERR: %s, Invalid sinfo(NULL)\n", __func__);
		return -EINVAL;
	}
	info = sinfo->info;
	var = &info->var;

	lcdfb_info	= sinfo;
	lcdc_base	= sinfo->mmio;
	lcdc_width	= var->xres;
	lcdc_height	= var->yres;

	return 0;
}
EXPORT_SYMBOL(ark1668e_lcdc_funcs_init);