opl3_lib.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
  4. * Hannu Savolainen 1993-1996,
  5. * Rob Hooft
  6. *
  7. * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
  8. *
  9. * Most if code is ported from OSS/Lite.
  10. */
  11. #include <sound/opl3.h>
  12. #include <linux/io.h>
  13. #include <linux/delay.h>
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/slab.h>
  17. #include <linux/ioport.h>
  18. #include <sound/minors.h>
  19. #include "opl3_voice.h"
  20. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
  21. MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
  22. MODULE_LICENSE("GPL");
  23. static void snd_opl2_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
  24. {
  25. unsigned long flags;
  26. unsigned long port;
  27. /*
  28. * The original 2-OP synth requires a quite long delay
  29. * after writing to a register.
  30. */
  31. port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  32. spin_lock_irqsave(&opl3->reg_lock, flags);
  33. outb((unsigned char) cmd, port);
  34. udelay(10);
  35. outb((unsigned char) val, port + 1);
  36. udelay(30);
  37. spin_unlock_irqrestore(&opl3->reg_lock, flags);
  38. }
  39. static void snd_opl3_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
  40. {
  41. unsigned long flags;
  42. unsigned long port;
  43. /*
  44. * The OPL-3 survives with just two INBs
  45. * after writing to a register.
  46. */
  47. port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  48. spin_lock_irqsave(&opl3->reg_lock, flags);
  49. outb((unsigned char) cmd, port);
  50. inb(opl3->l_port);
  51. inb(opl3->l_port);
  52. outb((unsigned char) val, port + 1);
  53. inb(opl3->l_port);
  54. inb(opl3->l_port);
  55. spin_unlock_irqrestore(&opl3->reg_lock, flags);
  56. }
  57. static int snd_opl3_detect(struct snd_opl3 * opl3)
  58. {
  59. /*
  60. * This function returns 1 if the FM chip is present at the given I/O port
  61. * The detection algorithm plays with the timer built in the FM chip and
  62. * looks for a change in the status register.
  63. *
  64. * Note! The timers of the FM chip are not connected to AdLib (and compatible)
  65. * boards.
  66. *
  67. * Note2! The chip is initialized if detected.
  68. */
  69. unsigned char stat1, stat2, signature;
  70. /* Reset timers 1 and 2 */
  71. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
  72. /* Reset the IRQ of the FM chip */
  73. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
  74. signature = stat1 = inb(opl3->l_port); /* Status register */
  75. if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */
  76. dev_dbg(opl3->card->dev, "OPL3: stat1 = 0x%x\n", stat1);
  77. return -ENODEV;
  78. }
  79. /* Set timer1 to 0xff */
  80. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
  81. /* Unmask and start timer 1 */
  82. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
  83. /* Now we have to delay at least 80us */
  84. udelay(200);
  85. /* Read status after timers have expired */
  86. stat2 = inb(opl3->l_port);
  87. /* Stop the timers */
  88. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
  89. /* Reset the IRQ of the FM chip */
  90. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
  91. if ((stat2 & 0xe0) != 0xc0) { /* There is no YM3812 */
  92. dev_dbg(opl3->card->dev, "OPL3: stat2 = 0x%x\n", stat2);
  93. return -ENODEV;
  94. }
  95. /* If the toplevel code knows exactly the type of chip, don't try
  96. to detect it. */
  97. if (opl3->hardware != OPL3_HW_AUTO)
  98. return 0;
  99. /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
  100. if (signature == 0x06) { /* OPL2 */
  101. opl3->hardware = OPL3_HW_OPL2;
  102. } else {
  103. /*
  104. * If we had an OPL4 chip, opl3->hardware would have been set
  105. * by the OPL4 driver; so we can assume OPL3 here.
  106. */
  107. if (snd_BUG_ON(!opl3->r_port))
  108. return -ENODEV;
  109. opl3->hardware = OPL3_HW_OPL3;
  110. }
  111. return 0;
  112. }
  113. /*
  114. * AdLib timers
  115. */
  116. /*
  117. * Timer 1 - 80us
  118. */
  119. static int snd_opl3_timer1_start(struct snd_timer * timer)
  120. {
  121. unsigned long flags;
  122. unsigned char tmp;
  123. unsigned int ticks;
  124. struct snd_opl3 *opl3;
  125. opl3 = snd_timer_chip(timer);
  126. spin_lock_irqsave(&opl3->timer_lock, flags);
  127. ticks = timer->sticks;
  128. tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
  129. opl3->timer_enable = tmp;
  130. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */
  131. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
  132. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  133. return 0;
  134. }
  135. static int snd_opl3_timer1_stop(struct snd_timer * timer)
  136. {
  137. unsigned long flags;
  138. unsigned char tmp;
  139. struct snd_opl3 *opl3;
  140. opl3 = snd_timer_chip(timer);
  141. spin_lock_irqsave(&opl3->timer_lock, flags);
  142. tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
  143. opl3->timer_enable = tmp;
  144. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
  145. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  146. return 0;
  147. }
  148. /*
  149. * Timer 2 - 320us
  150. */
  151. static int snd_opl3_timer2_start(struct snd_timer * timer)
  152. {
  153. unsigned long flags;
  154. unsigned char tmp;
  155. unsigned int ticks;
  156. struct snd_opl3 *opl3;
  157. opl3 = snd_timer_chip(timer);
  158. spin_lock_irqsave(&opl3->timer_lock, flags);
  159. ticks = timer->sticks;
  160. tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
  161. opl3->timer_enable = tmp;
  162. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */
  163. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
  164. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  165. return 0;
  166. }
  167. static int snd_opl3_timer2_stop(struct snd_timer * timer)
  168. {
  169. unsigned long flags;
  170. unsigned char tmp;
  171. struct snd_opl3 *opl3;
  172. opl3 = snd_timer_chip(timer);
  173. spin_lock_irqsave(&opl3->timer_lock, flags);
  174. tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
  175. opl3->timer_enable = tmp;
  176. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
  177. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  178. return 0;
  179. }
  180. /*
  181. */
  182. static const struct snd_timer_hardware snd_opl3_timer1 =
  183. {
  184. .flags = SNDRV_TIMER_HW_STOP,
  185. .resolution = 80000,
  186. .ticks = 256,
  187. .start = snd_opl3_timer1_start,
  188. .stop = snd_opl3_timer1_stop,
  189. };
  190. static const struct snd_timer_hardware snd_opl3_timer2 =
  191. {
  192. .flags = SNDRV_TIMER_HW_STOP,
  193. .resolution = 320000,
  194. .ticks = 256,
  195. .start = snd_opl3_timer2_start,
  196. .stop = snd_opl3_timer2_stop,
  197. };
  198. static int snd_opl3_timer1_init(struct snd_opl3 * opl3, int timer_no)
  199. {
  200. struct snd_timer *timer = NULL;
  201. struct snd_timer_id tid;
  202. int err;
  203. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  204. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  205. tid.card = opl3->card->number;
  206. tid.device = timer_no;
  207. tid.subdevice = 0;
  208. err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer);
  209. if (err >= 0) {
  210. strcpy(timer->name, "AdLib timer #1");
  211. timer->private_data = opl3;
  212. timer->hw = snd_opl3_timer1;
  213. }
  214. opl3->timer1 = timer;
  215. return err;
  216. }
  217. static int snd_opl3_timer2_init(struct snd_opl3 * opl3, int timer_no)
  218. {
  219. struct snd_timer *timer = NULL;
  220. struct snd_timer_id tid;
  221. int err;
  222. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  223. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  224. tid.card = opl3->card->number;
  225. tid.device = timer_no;
  226. tid.subdevice = 0;
  227. err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer);
  228. if (err >= 0) {
  229. strcpy(timer->name, "AdLib timer #2");
  230. timer->private_data = opl3;
  231. timer->hw = snd_opl3_timer2;
  232. }
  233. opl3->timer2 = timer;
  234. return err;
  235. }
  236. /*
  237. */
  238. void snd_opl3_interrupt(struct snd_hwdep * hw)
  239. {
  240. unsigned char status;
  241. struct snd_opl3 *opl3;
  242. struct snd_timer *timer;
  243. if (hw == NULL)
  244. return;
  245. opl3 = hw->private_data;
  246. status = inb(opl3->l_port);
  247. if (!(status & 0x80))
  248. return;
  249. if (status & 0x40) {
  250. timer = opl3->timer1;
  251. snd_timer_interrupt(timer, timer->sticks);
  252. }
  253. if (status & 0x20) {
  254. timer = opl3->timer2;
  255. snd_timer_interrupt(timer, timer->sticks);
  256. }
  257. }
  258. EXPORT_SYMBOL(snd_opl3_interrupt);
  259. /*
  260. */
  261. static int snd_opl3_free(struct snd_opl3 *opl3)
  262. {
  263. if (snd_BUG_ON(!opl3))
  264. return -ENXIO;
  265. if (opl3->private_free)
  266. opl3->private_free(opl3);
  267. snd_opl3_clear_patches(opl3);
  268. release_and_free_resource(opl3->res_l_port);
  269. release_and_free_resource(opl3->res_r_port);
  270. kfree(opl3);
  271. return 0;
  272. }
  273. static int snd_opl3_dev_free(struct snd_device *device)
  274. {
  275. struct snd_opl3 *opl3 = device->device_data;
  276. return snd_opl3_free(opl3);
  277. }
  278. int snd_opl3_new(struct snd_card *card,
  279. unsigned short hardware,
  280. struct snd_opl3 **ropl3)
  281. {
  282. static const struct snd_device_ops ops = {
  283. .dev_free = snd_opl3_dev_free,
  284. };
  285. struct snd_opl3 *opl3;
  286. int err;
  287. *ropl3 = NULL;
  288. opl3 = kzalloc(sizeof(*opl3), GFP_KERNEL);
  289. if (!opl3)
  290. return -ENOMEM;
  291. opl3->card = card;
  292. opl3->hardware = hardware;
  293. spin_lock_init(&opl3->reg_lock);
  294. spin_lock_init(&opl3->timer_lock);
  295. err = snd_device_new(card, SNDRV_DEV_CODEC, opl3, &ops);
  296. if (err < 0) {
  297. snd_opl3_free(opl3);
  298. return err;
  299. }
  300. *ropl3 = opl3;
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(snd_opl3_new);
  304. int snd_opl3_init(struct snd_opl3 *opl3)
  305. {
  306. if (! opl3->command) {
  307. dev_err(opl3->card->dev,
  308. "snd_opl3_init: command not defined!\n");
  309. return -EINVAL;
  310. }
  311. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
  312. /* Melodic mode */
  313. opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);
  314. switch (opl3->hardware & OPL3_HW_MASK) {
  315. case OPL3_HW_OPL2:
  316. opl3->max_voices = MAX_OPL2_VOICES;
  317. break;
  318. case OPL3_HW_OPL3:
  319. case OPL3_HW_OPL4:
  320. opl3->max_voices = MAX_OPL3_VOICES;
  321. /* Enter OPL3 mode */
  322. opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);
  323. }
  324. return 0;
  325. }
  326. EXPORT_SYMBOL(snd_opl3_init);
  327. int snd_opl3_create(struct snd_card *card,
  328. unsigned long l_port,
  329. unsigned long r_port,
  330. unsigned short hardware,
  331. int integrated,
  332. struct snd_opl3 ** ropl3)
  333. {
  334. struct snd_opl3 *opl3;
  335. int err;
  336. *ropl3 = NULL;
  337. err = snd_opl3_new(card, hardware, &opl3);
  338. if (err < 0)
  339. return err;
  340. if (! integrated) {
  341. opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)");
  342. if (!opl3->res_l_port) {
  343. dev_err(card->dev, "opl3: can't grab left port 0x%lx\n", l_port);
  344. snd_device_free(card, opl3);
  345. return -EBUSY;
  346. }
  347. if (r_port != 0) {
  348. opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)");
  349. if (!opl3->res_r_port) {
  350. dev_err(card->dev, "opl3: can't grab right port 0x%lx\n", r_port);
  351. snd_device_free(card, opl3);
  352. return -EBUSY;
  353. }
  354. }
  355. }
  356. opl3->l_port = l_port;
  357. opl3->r_port = r_port;
  358. switch (opl3->hardware) {
  359. /* some hardware doesn't support timers */
  360. case OPL3_HW_OPL3_SV:
  361. case OPL3_HW_OPL3_CS:
  362. case OPL3_HW_OPL3_FM801:
  363. opl3->command = &snd_opl3_command;
  364. break;
  365. default:
  366. opl3->command = &snd_opl2_command;
  367. err = snd_opl3_detect(opl3);
  368. if (err < 0) {
  369. dev_dbg(card->dev, "OPL2/3 chip not detected at 0x%lx/0x%lx\n",
  370. opl3->l_port, opl3->r_port);
  371. snd_device_free(card, opl3);
  372. return err;
  373. }
  374. /* detect routine returns correct hardware type */
  375. switch (opl3->hardware & OPL3_HW_MASK) {
  376. case OPL3_HW_OPL3:
  377. case OPL3_HW_OPL4:
  378. opl3->command = &snd_opl3_command;
  379. }
  380. }
  381. snd_opl3_init(opl3);
  382. *ropl3 = opl3;
  383. return 0;
  384. }
  385. EXPORT_SYMBOL(snd_opl3_create);
  386. int snd_opl3_timer_new(struct snd_opl3 * opl3, int timer1_dev, int timer2_dev)
  387. {
  388. int err;
  389. if (timer1_dev >= 0) {
  390. err = snd_opl3_timer1_init(opl3, timer1_dev);
  391. if (err < 0)
  392. return err;
  393. }
  394. if (timer2_dev >= 0) {
  395. err = snd_opl3_timer2_init(opl3, timer2_dev);
  396. if (err < 0) {
  397. snd_device_free(opl3->card, opl3->timer1);
  398. opl3->timer1 = NULL;
  399. return err;
  400. }
  401. }
  402. return 0;
  403. }
  404. EXPORT_SYMBOL(snd_opl3_timer_new);
  405. int snd_opl3_hwdep_new(struct snd_opl3 * opl3,
  406. int device, int seq_device,
  407. struct snd_hwdep ** rhwdep)
  408. {
  409. struct snd_hwdep *hw;
  410. struct snd_card *card = opl3->card;
  411. int err;
  412. if (rhwdep)
  413. *rhwdep = NULL;
  414. /* create hardware dependent device (direct FM) */
  415. err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw);
  416. if (err < 0) {
  417. snd_device_free(card, opl3);
  418. return err;
  419. }
  420. hw->private_data = opl3;
  421. hw->exclusive = 1;
  422. #ifdef CONFIG_SND_OSSEMUL
  423. if (device == 0)
  424. hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;
  425. #endif
  426. strcpy(hw->name, hw->id);
  427. switch (opl3->hardware & OPL3_HW_MASK) {
  428. case OPL3_HW_OPL2:
  429. strcpy(hw->name, "OPL2 FM");
  430. hw->iface = SNDRV_HWDEP_IFACE_OPL2;
  431. break;
  432. case OPL3_HW_OPL3:
  433. strcpy(hw->name, "OPL3 FM");
  434. hw->iface = SNDRV_HWDEP_IFACE_OPL3;
  435. break;
  436. case OPL3_HW_OPL4:
  437. strcpy(hw->name, "OPL4 FM");
  438. hw->iface = SNDRV_HWDEP_IFACE_OPL4;
  439. break;
  440. }
  441. /* operators - only ioctl */
  442. hw->ops.open = snd_opl3_open;
  443. hw->ops.ioctl = snd_opl3_ioctl;
  444. hw->ops.write = snd_opl3_write;
  445. hw->ops.release = snd_opl3_release;
  446. opl3->hwdep = hw;
  447. opl3->seq_dev_num = seq_device;
  448. #if IS_ENABLED(CONFIG_SND_SEQUENCER)
  449. if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
  450. sizeof(struct snd_opl3 *), &opl3->seq_dev) >= 0) {
  451. strcpy(opl3->seq_dev->name, hw->name);
  452. *(struct snd_opl3 **)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;
  453. }
  454. #endif
  455. if (rhwdep)
  456. *rhwdep = hw;
  457. return 0;
  458. }
  459. EXPORT_SYMBOL(snd_opl3_hwdep_new);