ff-protocol-latter.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // ff-protocol-latter.c - a part of driver for RME Fireface series
  3. //
  4. // Copyright (c) 2019 Takashi Sakamoto
  5. #include <linux/delay.h>
  6. #include "ff.h"
  7. #define LATTER_STF 0xffff00000004ULL
  8. #define LATTER_ISOC_CHANNELS 0xffff00000008ULL
  9. #define LATTER_ISOC_START 0xffff0000000cULL
  10. #define LATTER_FETCH_MODE 0xffff00000010ULL
  11. #define LATTER_SYNC_STATUS 0x0000801c0000ULL
  12. // The content of sync status register differs between models.
  13. //
  14. // Fireface UCX:
  15. // 0xf0000000: (unidentified)
  16. // 0x0f000000: effective rate of sampling clock
  17. // 0x00f00000: detected rate of word clock on BNC interface
  18. // 0x000f0000: detected rate of ADAT or S/PDIF on optical interface
  19. // 0x0000f000: detected rate of S/PDIF on coaxial interface
  20. // 0x00000e00: effective source of sampling clock
  21. // 0x00000e00: Internal
  22. // 0x00000800: (unidentified)
  23. // 0x00000600: Word clock on BNC interface
  24. // 0x00000400: ADAT on optical interface
  25. // 0x00000200: S/PDIF on coaxial or optical interface
  26. // 0x00000100: Optical interface is used for ADAT signal
  27. // 0x00000080: (unidentified)
  28. // 0x00000040: Synchronized to word clock on BNC interface
  29. // 0x00000020: Synchronized to ADAT or S/PDIF on optical interface
  30. // 0x00000010: Synchronized to S/PDIF on coaxial interface
  31. // 0x00000008: (unidentified)
  32. // 0x00000004: Lock word clock on BNC interface
  33. // 0x00000002: Lock ADAT or S/PDIF on optical interface
  34. // 0x00000001: Lock S/PDIF on coaxial interface
  35. //
  36. // Fireface 802 (and perhaps UFX):
  37. // 0xf0000000: effective rate of sampling clock
  38. // 0x0f000000: detected rate of ADAT-B on 2nd optical interface
  39. // 0x00f00000: detected rate of ADAT-A on 1st optical interface
  40. // 0x000f0000: detected rate of AES/EBU on XLR or coaxial interface
  41. // 0x0000f000: detected rate of word clock on BNC interface
  42. // 0x00000e00: effective source of sampling clock
  43. // 0x00000e00: internal
  44. // 0x00000800: ADAT-B
  45. // 0x00000600: ADAT-A
  46. // 0x00000400: AES/EBU
  47. // 0x00000200: Word clock
  48. // 0x00000080: Synchronized to ADAT-B on 2nd optical interface
  49. // 0x00000040: Synchronized to ADAT-A on 1st optical interface
  50. // 0x00000020: Synchronized to AES/EBU on XLR or 2nd optical interface
  51. // 0x00000010: Synchronized to word clock on BNC interface
  52. // 0x00000008: Lock ADAT-B on 2nd optical interface
  53. // 0x00000004: Lock ADAT-A on 1st optical interface
  54. // 0x00000002: Lock AES/EBU on XLR or 2nd optical interface
  55. // 0x00000001: Lock word clock on BNC interface
  56. //
  57. // The pattern for rate bits:
  58. // 0x00: 32.0 kHz
  59. // 0x01: 44.1 kHz
  60. // 0x02: 48.0 kHz
  61. // 0x04: 64.0 kHz
  62. // 0x05: 88.2 kHz
  63. // 0x06: 96.0 kHz
  64. // 0x08: 128.0 kHz
  65. // 0x09: 176.4 kHz
  66. // 0x0a: 192.0 kHz
  67. static int parse_clock_bits(u32 data, unsigned int *rate,
  68. enum snd_ff_clock_src *src,
  69. enum snd_ff_unit_version unit_version)
  70. {
  71. static const struct {
  72. unsigned int rate;
  73. u32 flag;
  74. } *rate_entry, rate_entries[] = {
  75. { 32000, 0x00, },
  76. { 44100, 0x01, },
  77. { 48000, 0x02, },
  78. { 64000, 0x04, },
  79. { 88200, 0x05, },
  80. { 96000, 0x06, },
  81. { 128000, 0x08, },
  82. { 176400, 0x09, },
  83. { 192000, 0x0a, },
  84. };
  85. static const struct {
  86. enum snd_ff_clock_src src;
  87. u32 flag;
  88. } *clk_entry, *clk_entries, ucx_clk_entries[] = {
  89. { SND_FF_CLOCK_SRC_SPDIF, 0x00000200, },
  90. { SND_FF_CLOCK_SRC_ADAT1, 0x00000400, },
  91. { SND_FF_CLOCK_SRC_WORD, 0x00000600, },
  92. { SND_FF_CLOCK_SRC_INTERNAL, 0x00000e00, },
  93. }, ufx_ff802_clk_entries[] = {
  94. { SND_FF_CLOCK_SRC_WORD, 0x00000200, },
  95. { SND_FF_CLOCK_SRC_SPDIF, 0x00000400, },
  96. { SND_FF_CLOCK_SRC_ADAT1, 0x00000600, },
  97. { SND_FF_CLOCK_SRC_ADAT2, 0x00000800, },
  98. { SND_FF_CLOCK_SRC_INTERNAL, 0x00000e00, },
  99. };
  100. u32 rate_bits;
  101. unsigned int clk_entry_count;
  102. int i;
  103. if (unit_version == SND_FF_UNIT_VERSION_UCX) {
  104. rate_bits = (data & 0x0f000000) >> 24;
  105. clk_entries = ucx_clk_entries;
  106. clk_entry_count = ARRAY_SIZE(ucx_clk_entries);
  107. } else {
  108. rate_bits = (data & 0xf0000000) >> 28;
  109. clk_entries = ufx_ff802_clk_entries;
  110. clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries);
  111. }
  112. for (i = 0; i < ARRAY_SIZE(rate_entries); ++i) {
  113. rate_entry = rate_entries + i;
  114. if (rate_bits == rate_entry->flag) {
  115. *rate = rate_entry->rate;
  116. break;
  117. }
  118. }
  119. if (i == ARRAY_SIZE(rate_entries))
  120. return -EIO;
  121. for (i = 0; i < clk_entry_count; ++i) {
  122. clk_entry = clk_entries + i;
  123. if ((data & 0x000e00) == clk_entry->flag) {
  124. *src = clk_entry->src;
  125. break;
  126. }
  127. }
  128. if (i == clk_entry_count)
  129. return -EIO;
  130. return 0;
  131. }
  132. static int latter_get_clock(struct snd_ff *ff, unsigned int *rate,
  133. enum snd_ff_clock_src *src)
  134. {
  135. __le32 reg;
  136. u32 data;
  137. int err;
  138. err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
  139. LATTER_SYNC_STATUS, &reg, sizeof(reg), 0);
  140. if (err < 0)
  141. return err;
  142. data = le32_to_cpu(reg);
  143. return parse_clock_bits(data, rate, src, ff->unit_version);
  144. }
  145. static int latter_switch_fetching_mode(struct snd_ff *ff, bool enable)
  146. {
  147. u32 data;
  148. __le32 reg;
  149. if (enable)
  150. data = 0x00000000;
  151. else
  152. data = 0xffffffff;
  153. reg = cpu_to_le32(data);
  154. return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  155. LATTER_FETCH_MODE, &reg, sizeof(reg), 0);
  156. }
  157. static int latter_allocate_resources(struct snd_ff *ff, unsigned int rate)
  158. {
  159. enum snd_ff_stream_mode mode;
  160. unsigned int code;
  161. __le32 reg;
  162. unsigned int count;
  163. int i;
  164. int err;
  165. // Set the number of data blocks transferred in a second.
  166. if (rate % 48000 == 0)
  167. code = 0x04;
  168. else if (rate % 44100 == 0)
  169. code = 0x02;
  170. else if (rate % 32000 == 0)
  171. code = 0x00;
  172. else
  173. return -EINVAL;
  174. if (rate >= 64000 && rate < 128000)
  175. code |= 0x08;
  176. else if (rate >= 128000)
  177. code |= 0x10;
  178. reg = cpu_to_le32(code);
  179. err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  180. LATTER_STF, &reg, sizeof(reg), 0);
  181. if (err < 0)
  182. return err;
  183. // Confirm to shift transmission clock.
  184. count = 0;
  185. while (count++ < 10) {
  186. unsigned int curr_rate;
  187. enum snd_ff_clock_src src;
  188. err = latter_get_clock(ff, &curr_rate, &src);
  189. if (err < 0)
  190. return err;
  191. if (curr_rate == rate)
  192. break;
  193. }
  194. if (count > 10)
  195. return -ETIMEDOUT;
  196. for (i = 0; i < ARRAY_SIZE(amdtp_rate_table); ++i) {
  197. if (rate == amdtp_rate_table[i])
  198. break;
  199. }
  200. if (i == ARRAY_SIZE(amdtp_rate_table))
  201. return -EINVAL;
  202. err = snd_ff_stream_get_multiplier_mode(i, &mode);
  203. if (err < 0)
  204. return err;
  205. // Keep resources for in-stream.
  206. ff->tx_resources.channels_mask = 0x00000000000000ffuLL;
  207. err = fw_iso_resources_allocate(&ff->tx_resources,
  208. amdtp_stream_get_max_payload(&ff->tx_stream),
  209. fw_parent_device(ff->unit)->max_speed);
  210. if (err < 0)
  211. return err;
  212. // Keep resources for out-stream.
  213. ff->rx_resources.channels_mask = 0x00000000000000ffuLL;
  214. err = fw_iso_resources_allocate(&ff->rx_resources,
  215. amdtp_stream_get_max_payload(&ff->rx_stream),
  216. fw_parent_device(ff->unit)->max_speed);
  217. if (err < 0)
  218. fw_iso_resources_free(&ff->tx_resources);
  219. return err;
  220. }
  221. static int latter_begin_session(struct snd_ff *ff, unsigned int rate)
  222. {
  223. unsigned int generation = ff->rx_resources.generation;
  224. unsigned int flag;
  225. u32 data;
  226. __le32 reg;
  227. int err;
  228. if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) {
  229. // For Fireface UCX. Always use the maximum number of data
  230. // channels in data block of packet.
  231. if (rate >= 32000 && rate <= 48000)
  232. flag = 0x92;
  233. else if (rate >= 64000 && rate <= 96000)
  234. flag = 0x8e;
  235. else if (rate >= 128000 && rate <= 192000)
  236. flag = 0x8c;
  237. else
  238. return -EINVAL;
  239. } else {
  240. // For Fireface UFX and 802. Due to bandwidth limitation on
  241. // IEEE 1394a (400 Mbps), Analog 1-12 and AES are available
  242. // without any ADAT at quadruple speed.
  243. if (rate >= 32000 && rate <= 48000)
  244. flag = 0x9e;
  245. else if (rate >= 64000 && rate <= 96000)
  246. flag = 0x96;
  247. else if (rate >= 128000 && rate <= 192000)
  248. flag = 0x8e;
  249. else
  250. return -EINVAL;
  251. }
  252. if (generation != fw_parent_device(ff->unit)->card->generation) {
  253. err = fw_iso_resources_update(&ff->tx_resources);
  254. if (err < 0)
  255. return err;
  256. err = fw_iso_resources_update(&ff->rx_resources);
  257. if (err < 0)
  258. return err;
  259. }
  260. data = (ff->tx_resources.channel << 8) | ff->rx_resources.channel;
  261. reg = cpu_to_le32(data);
  262. err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  263. LATTER_ISOC_CHANNELS, &reg, sizeof(reg), 0);
  264. if (err < 0)
  265. return err;
  266. reg = cpu_to_le32(flag);
  267. return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  268. LATTER_ISOC_START, &reg, sizeof(reg), 0);
  269. }
  270. static void latter_finish_session(struct snd_ff *ff)
  271. {
  272. __le32 reg;
  273. reg = cpu_to_le32(0x00000000);
  274. snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
  275. LATTER_ISOC_START, &reg, sizeof(reg), 0);
  276. }
  277. static void latter_dump_status(struct snd_ff *ff, struct snd_info_buffer *buffer)
  278. {
  279. static const struct {
  280. char *const label;
  281. u32 locked_mask;
  282. u32 synced_mask;
  283. } *clk_entry, *clk_entries, ucx_clk_entries[] = {
  284. { "S/PDIF", 0x00000001, 0x00000010, },
  285. { "ADAT", 0x00000002, 0x00000020, },
  286. { "WDClk", 0x00000004, 0x00000040, },
  287. }, ufx_ff802_clk_entries[] = {
  288. { "WDClk", 0x00000001, 0x00000010, },
  289. { "AES/EBU", 0x00000002, 0x00000020, },
  290. { "ADAT-A", 0x00000004, 0x00000040, },
  291. { "ADAT-B", 0x00000008, 0x00000080, },
  292. };
  293. __le32 reg;
  294. u32 data;
  295. unsigned int rate;
  296. enum snd_ff_clock_src src;
  297. const char *label;
  298. unsigned int clk_entry_count;
  299. int i;
  300. int err;
  301. err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
  302. LATTER_SYNC_STATUS, &reg, sizeof(reg), 0);
  303. if (err < 0)
  304. return;
  305. data = le32_to_cpu(reg);
  306. snd_iprintf(buffer, "External source detection:\n");
  307. if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) {
  308. clk_entries = ucx_clk_entries;
  309. clk_entry_count = ARRAY_SIZE(ucx_clk_entries);
  310. } else {
  311. clk_entries = ufx_ff802_clk_entries;
  312. clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries);
  313. }
  314. for (i = 0; i < clk_entry_count; ++i) {
  315. clk_entry = clk_entries + i;
  316. snd_iprintf(buffer, "%s: ", clk_entry->label);
  317. if (data & clk_entry->locked_mask) {
  318. if (data & clk_entry->synced_mask)
  319. snd_iprintf(buffer, "sync\n");
  320. else
  321. snd_iprintf(buffer, "lock\n");
  322. } else {
  323. snd_iprintf(buffer, "none\n");
  324. }
  325. }
  326. err = parse_clock_bits(data, &rate, &src, ff->unit_version);
  327. if (err < 0)
  328. return;
  329. label = snd_ff_proc_get_clk_label(src);
  330. if (!label)
  331. return;
  332. snd_iprintf(buffer, "Referred clock: %s %d\n", label, rate);
  333. }
  334. // NOTE: transactions are transferred within 0x00-0x7f in allocated range of
  335. // address. This seems to be for check of discontinuity in receiver side.
  336. //
  337. // Like Fireface 400, drivers can select one of 4 options for lower 4 bytes of
  338. // destination address by bit flags in quadlet register (little endian) at
  339. // 0x'ffff'0000'0014:
  340. //
  341. // bit flags: offset of destination address
  342. // - 0x00002000: 0x'....'....'0000'0000
  343. // - 0x00004000: 0x'....'....'0000'0080
  344. // - 0x00008000: 0x'....'....'0000'0100
  345. // - 0x00010000: 0x'....'....'0000'0180
  346. //
  347. // Drivers can suppress the device to transfer asynchronous transactions by
  348. // clear these bit flags.
  349. //
  350. // Actually, the register is write-only and includes the other settings such as
  351. // input attenuation. This driver allocates for the first option
  352. // (0x'....'....'0000'0000) and expects userspace application to configure the
  353. // register for it.
  354. static void latter_handle_midi_msg(struct snd_ff *ff, unsigned int offset, const __le32 *buf,
  355. size_t length, u32 tstamp)
  356. {
  357. u32 data = le32_to_cpu(*buf);
  358. unsigned int index = (data & 0x000000f0) >> 4;
  359. u8 byte[3];
  360. struct snd_rawmidi_substream *substream;
  361. unsigned int len;
  362. if (index >= ff->spec->midi_in_ports)
  363. return;
  364. switch (data & 0x0000000f) {
  365. case 0x00000008:
  366. case 0x00000009:
  367. case 0x0000000a:
  368. case 0x0000000b:
  369. case 0x0000000e:
  370. len = 3;
  371. break;
  372. case 0x0000000c:
  373. case 0x0000000d:
  374. len = 2;
  375. break;
  376. default:
  377. len = data & 0x00000003;
  378. if (len == 0)
  379. len = 3;
  380. break;
  381. }
  382. byte[0] = (data & 0x0000ff00) >> 8;
  383. byte[1] = (data & 0x00ff0000) >> 16;
  384. byte[2] = (data & 0xff000000) >> 24;
  385. substream = READ_ONCE(ff->tx_midi_substreams[index]);
  386. if (substream)
  387. snd_rawmidi_receive(substream, byte, len);
  388. }
  389. /*
  390. * When return minus value, given argument is not MIDI status.
  391. * When return 0, given argument is a beginning of system exclusive.
  392. * When return the others, given argument is MIDI data.
  393. */
  394. static inline int calculate_message_bytes(u8 status)
  395. {
  396. switch (status) {
  397. case 0xf6: /* Tune request. */
  398. case 0xf8: /* Timing clock. */
  399. case 0xfa: /* Start. */
  400. case 0xfb: /* Continue. */
  401. case 0xfc: /* Stop. */
  402. case 0xfe: /* Active sensing. */
  403. case 0xff: /* System reset. */
  404. return 1;
  405. case 0xf1: /* MIDI time code quarter frame. */
  406. case 0xf3: /* Song select. */
  407. return 2;
  408. case 0xf2: /* Song position pointer. */
  409. return 3;
  410. case 0xf0: /* Exclusive. */
  411. return 0;
  412. case 0xf7: /* End of exclusive. */
  413. break;
  414. case 0xf4: /* Undefined. */
  415. case 0xf5: /* Undefined. */
  416. case 0xf9: /* Undefined. */
  417. case 0xfd: /* Undefined. */
  418. break;
  419. default:
  420. switch (status & 0xf0) {
  421. case 0x80: /* Note on. */
  422. case 0x90: /* Note off. */
  423. case 0xa0: /* Polyphonic key pressure. */
  424. case 0xb0: /* Control change and Mode change. */
  425. case 0xe0: /* Pitch bend change. */
  426. return 3;
  427. case 0xc0: /* Program change. */
  428. case 0xd0: /* Channel pressure. */
  429. return 2;
  430. default:
  431. break;
  432. }
  433. break;
  434. }
  435. return -EINVAL;
  436. }
  437. static int latter_fill_midi_msg(struct snd_ff *ff,
  438. struct snd_rawmidi_substream *substream,
  439. unsigned int port)
  440. {
  441. u32 data = {0};
  442. u8 *buf = (u8 *)&data;
  443. int consumed;
  444. buf[0] = port << 4;
  445. consumed = snd_rawmidi_transmit_peek(substream, buf + 1, 3);
  446. if (consumed <= 0)
  447. return consumed;
  448. if (!ff->on_sysex[port]) {
  449. if (buf[1] != 0xf0) {
  450. if (consumed < calculate_message_bytes(buf[1]))
  451. return 0;
  452. } else {
  453. // The beginning of exclusives.
  454. ff->on_sysex[port] = true;
  455. }
  456. buf[0] |= consumed;
  457. } else {
  458. if (buf[1] != 0xf7) {
  459. if (buf[2] == 0xf7 || buf[3] == 0xf7) {
  460. // Transfer end code at next time.
  461. consumed -= 1;
  462. }
  463. buf[0] |= consumed;
  464. } else {
  465. // The end of exclusives.
  466. ff->on_sysex[port] = false;
  467. consumed = 1;
  468. buf[0] |= 0x0f;
  469. }
  470. }
  471. ff->msg_buf[port][0] = cpu_to_le32(data);
  472. ff->rx_bytes[port] = consumed;
  473. return 1;
  474. }
  475. const struct snd_ff_protocol snd_ff_protocol_latter = {
  476. .handle_msg = latter_handle_midi_msg,
  477. .fill_midi_msg = latter_fill_midi_msg,
  478. .get_clock = latter_get_clock,
  479. .switch_fetching_mode = latter_switch_fetching_mode,
  480. .allocate_resources = latter_allocate_resources,
  481. .begin_session = latter_begin_session,
  482. .finish_session = latter_finish_session,
  483. .dump_status = latter_dump_status,
  484. };