tascam-stream.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * tascam-stream.c - a part of driver for TASCAM FireWire series
  4. *
  5. * Copyright (c) 2015 Takashi Sakamoto
  6. */
  7. #include <linux/delay.h>
  8. #include "tascam.h"
  9. #define CLOCK_STATUS_MASK 0xffff0000
  10. #define CLOCK_CONFIG_MASK 0x0000ffff
  11. #define READY_TIMEOUT_MS 4000
  12. static int get_clock(struct snd_tscm *tscm, u32 *data)
  13. {
  14. int trial = 0;
  15. __be32 reg;
  16. int err;
  17. while (trial++ < 5) {
  18. err = snd_fw_transaction(tscm->unit, TCODE_READ_QUADLET_REQUEST,
  19. TSCM_ADDR_BASE + TSCM_OFFSET_CLOCK_STATUS,
  20. &reg, sizeof(reg), 0);
  21. if (err < 0)
  22. return err;
  23. *data = be32_to_cpu(reg);
  24. if (*data & CLOCK_STATUS_MASK)
  25. break;
  26. // In intermediate state after changing clock status.
  27. msleep(50);
  28. }
  29. // Still in the intermediate state.
  30. if (trial >= 5)
  31. return -EAGAIN;
  32. return 0;
  33. }
  34. static int set_clock(struct snd_tscm *tscm, unsigned int rate,
  35. enum snd_tscm_clock clock)
  36. {
  37. u32 data;
  38. __be32 reg;
  39. int err;
  40. err = get_clock(tscm, &data);
  41. if (err < 0)
  42. return err;
  43. data &= CLOCK_CONFIG_MASK;
  44. if (rate > 0) {
  45. data &= 0x000000ff;
  46. /* Base rate. */
  47. if ((rate % 44100) == 0) {
  48. data |= 0x00000100;
  49. /* Multiplier. */
  50. if (rate / 44100 == 2)
  51. data |= 0x00008000;
  52. } else if ((rate % 48000) == 0) {
  53. data |= 0x00000200;
  54. /* Multiplier. */
  55. if (rate / 48000 == 2)
  56. data |= 0x00008000;
  57. } else {
  58. return -EAGAIN;
  59. }
  60. }
  61. if (clock != INT_MAX) {
  62. data &= 0x0000ff00;
  63. data |= clock + 1;
  64. }
  65. reg = cpu_to_be32(data);
  66. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  67. TSCM_ADDR_BASE + TSCM_OFFSET_CLOCK_STATUS,
  68. &reg, sizeof(reg), 0);
  69. if (err < 0)
  70. return err;
  71. if (data & 0x00008000)
  72. reg = cpu_to_be32(0x0000001a);
  73. else
  74. reg = cpu_to_be32(0x0000000d);
  75. return snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  76. TSCM_ADDR_BASE + TSCM_OFFSET_MULTIPLEX_MODE,
  77. &reg, sizeof(reg), 0);
  78. }
  79. int snd_tscm_stream_get_rate(struct snd_tscm *tscm, unsigned int *rate)
  80. {
  81. u32 data;
  82. int err;
  83. err = get_clock(tscm, &data);
  84. if (err < 0)
  85. return err;
  86. data = (data & 0xff000000) >> 24;
  87. /* Check base rate. */
  88. if ((data & 0x0f) == 0x01)
  89. *rate = 44100;
  90. else if ((data & 0x0f) == 0x02)
  91. *rate = 48000;
  92. else
  93. return -EAGAIN;
  94. /* Check multiplier. */
  95. if ((data & 0xf0) == 0x80)
  96. *rate *= 2;
  97. else if ((data & 0xf0) != 0x00)
  98. return -EAGAIN;
  99. return err;
  100. }
  101. int snd_tscm_stream_get_clock(struct snd_tscm *tscm, enum snd_tscm_clock *clock)
  102. {
  103. u32 data;
  104. int err;
  105. err = get_clock(tscm, &data);
  106. if (err < 0)
  107. return err;
  108. *clock = ((data & 0x00ff0000) >> 16) - 1;
  109. if (*clock < 0 || *clock > SND_TSCM_CLOCK_ADAT)
  110. return -EIO;
  111. return 0;
  112. }
  113. static int enable_data_channels(struct snd_tscm *tscm)
  114. {
  115. __be32 reg;
  116. u32 data;
  117. unsigned int i;
  118. int err;
  119. data = 0;
  120. for (i = 0; i < tscm->spec->pcm_capture_analog_channels; ++i)
  121. data |= BIT(i);
  122. if (tscm->spec->has_adat)
  123. data |= 0x0000ff00;
  124. if (tscm->spec->has_spdif)
  125. data |= 0x00030000;
  126. reg = cpu_to_be32(data);
  127. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  128. TSCM_ADDR_BASE + TSCM_OFFSET_TX_PCM_CHANNELS,
  129. &reg, sizeof(reg), 0);
  130. if (err < 0)
  131. return err;
  132. data = 0;
  133. for (i = 0; i < tscm->spec->pcm_playback_analog_channels; ++i)
  134. data |= BIT(i);
  135. if (tscm->spec->has_adat)
  136. data |= 0x0000ff00;
  137. if (tscm->spec->has_spdif)
  138. data |= 0x00030000;
  139. reg = cpu_to_be32(data);
  140. return snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  141. TSCM_ADDR_BASE + TSCM_OFFSET_RX_PCM_CHANNELS,
  142. &reg, sizeof(reg), 0);
  143. }
  144. static int set_stream_formats(struct snd_tscm *tscm, unsigned int rate)
  145. {
  146. __be32 reg;
  147. int err;
  148. // Set an option for unknown purpose.
  149. reg = cpu_to_be32(0x00200000);
  150. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  151. TSCM_ADDR_BASE + TSCM_OFFSET_SET_OPTION,
  152. &reg, sizeof(reg), 0);
  153. if (err < 0)
  154. return err;
  155. return enable_data_channels(tscm);
  156. }
  157. static void finish_session(struct snd_tscm *tscm)
  158. {
  159. __be32 reg;
  160. reg = 0;
  161. snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  162. TSCM_ADDR_BASE + TSCM_OFFSET_START_STREAMING,
  163. &reg, sizeof(reg), 0);
  164. reg = 0;
  165. snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  166. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_RX_ON,
  167. &reg, sizeof(reg), 0);
  168. // Unregister channels.
  169. reg = cpu_to_be32(0x00000000);
  170. snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  171. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_TX_CH,
  172. &reg, sizeof(reg), 0);
  173. reg = cpu_to_be32(0x00000000);
  174. snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  175. TSCM_ADDR_BASE + TSCM_OFFSET_UNKNOWN,
  176. &reg, sizeof(reg), 0);
  177. reg = cpu_to_be32(0x00000000);
  178. snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  179. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_RX_CH,
  180. &reg, sizeof(reg), 0);
  181. }
  182. static int begin_session(struct snd_tscm *tscm)
  183. {
  184. __be32 reg;
  185. int err;
  186. // Register the isochronous channel for transmitting stream.
  187. reg = cpu_to_be32(tscm->tx_resources.channel);
  188. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  189. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_TX_CH,
  190. &reg, sizeof(reg), 0);
  191. if (err < 0)
  192. return err;
  193. // Unknown.
  194. reg = cpu_to_be32(0x00000002);
  195. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  196. TSCM_ADDR_BASE + TSCM_OFFSET_UNKNOWN,
  197. &reg, sizeof(reg), 0);
  198. if (err < 0)
  199. return err;
  200. // Register the isochronous channel for receiving stream.
  201. reg = cpu_to_be32(tscm->rx_resources.channel);
  202. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  203. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_RX_CH,
  204. &reg, sizeof(reg), 0);
  205. if (err < 0)
  206. return err;
  207. reg = cpu_to_be32(0x00000001);
  208. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  209. TSCM_ADDR_BASE + TSCM_OFFSET_START_STREAMING,
  210. &reg, sizeof(reg), 0);
  211. if (err < 0)
  212. return err;
  213. reg = cpu_to_be32(0x00000001);
  214. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  215. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_RX_ON,
  216. &reg, sizeof(reg), 0);
  217. if (err < 0)
  218. return err;
  219. // Set an option for unknown purpose.
  220. reg = cpu_to_be32(0x00002000);
  221. err = snd_fw_transaction(tscm->unit, TCODE_WRITE_QUADLET_REQUEST,
  222. TSCM_ADDR_BASE + TSCM_OFFSET_SET_OPTION,
  223. &reg, sizeof(reg), 0);
  224. if (err < 0)
  225. return err;
  226. // Start multiplexing PCM samples on packets.
  227. reg = cpu_to_be32(0x00000001);
  228. return snd_fw_transaction(tscm->unit,
  229. TCODE_WRITE_QUADLET_REQUEST,
  230. TSCM_ADDR_BASE + TSCM_OFFSET_ISOC_TX_ON,
  231. &reg, sizeof(reg), 0);
  232. }
  233. static int keep_resources(struct snd_tscm *tscm, unsigned int rate,
  234. struct amdtp_stream *stream)
  235. {
  236. struct fw_iso_resources *resources;
  237. int err;
  238. if (stream == &tscm->tx_stream)
  239. resources = &tscm->tx_resources;
  240. else
  241. resources = &tscm->rx_resources;
  242. err = amdtp_tscm_set_parameters(stream, rate);
  243. if (err < 0)
  244. return err;
  245. return fw_iso_resources_allocate(resources,
  246. amdtp_stream_get_max_payload(stream),
  247. fw_parent_device(tscm->unit)->max_speed);
  248. }
  249. static int init_stream(struct snd_tscm *tscm, struct amdtp_stream *s)
  250. {
  251. struct fw_iso_resources *resources;
  252. enum amdtp_stream_direction dir;
  253. unsigned int pcm_channels;
  254. int err;
  255. if (s == &tscm->tx_stream) {
  256. resources = &tscm->tx_resources;
  257. dir = AMDTP_IN_STREAM;
  258. pcm_channels = tscm->spec->pcm_capture_analog_channels;
  259. } else {
  260. resources = &tscm->rx_resources;
  261. dir = AMDTP_OUT_STREAM;
  262. pcm_channels = tscm->spec->pcm_playback_analog_channels;
  263. }
  264. if (tscm->spec->has_adat)
  265. pcm_channels += 8;
  266. if (tscm->spec->has_spdif)
  267. pcm_channels += 2;
  268. err = fw_iso_resources_init(resources, tscm->unit);
  269. if (err < 0)
  270. return err;
  271. err = amdtp_tscm_init(s, tscm->unit, dir, pcm_channels);
  272. if (err < 0)
  273. fw_iso_resources_free(resources);
  274. return err;
  275. }
  276. static void destroy_stream(struct snd_tscm *tscm, struct amdtp_stream *s)
  277. {
  278. amdtp_stream_destroy(s);
  279. if (s == &tscm->tx_stream)
  280. fw_iso_resources_destroy(&tscm->tx_resources);
  281. else
  282. fw_iso_resources_destroy(&tscm->rx_resources);
  283. }
  284. int snd_tscm_stream_init_duplex(struct snd_tscm *tscm)
  285. {
  286. int err;
  287. err = init_stream(tscm, &tscm->tx_stream);
  288. if (err < 0)
  289. return err;
  290. err = init_stream(tscm, &tscm->rx_stream);
  291. if (err < 0) {
  292. destroy_stream(tscm, &tscm->tx_stream);
  293. return err;
  294. }
  295. err = amdtp_domain_init(&tscm->domain);
  296. if (err < 0) {
  297. destroy_stream(tscm, &tscm->tx_stream);
  298. destroy_stream(tscm, &tscm->rx_stream);
  299. }
  300. return err;
  301. }
  302. // At bus reset, streaming is stopped and some registers are clear.
  303. void snd_tscm_stream_update_duplex(struct snd_tscm *tscm)
  304. {
  305. amdtp_domain_stop(&tscm->domain);
  306. amdtp_stream_pcm_abort(&tscm->tx_stream);
  307. amdtp_stream_pcm_abort(&tscm->rx_stream);
  308. }
  309. // This function should be called before starting streams or after stopping
  310. // streams.
  311. void snd_tscm_stream_destroy_duplex(struct snd_tscm *tscm)
  312. {
  313. amdtp_domain_destroy(&tscm->domain);
  314. destroy_stream(tscm, &tscm->rx_stream);
  315. destroy_stream(tscm, &tscm->tx_stream);
  316. }
  317. int snd_tscm_stream_reserve_duplex(struct snd_tscm *tscm, unsigned int rate,
  318. unsigned int frames_per_period,
  319. unsigned int frames_per_buffer)
  320. {
  321. unsigned int curr_rate;
  322. int err;
  323. err = snd_tscm_stream_get_rate(tscm, &curr_rate);
  324. if (err < 0)
  325. return err;
  326. if (tscm->substreams_counter == 0 || rate != curr_rate) {
  327. amdtp_domain_stop(&tscm->domain);
  328. finish_session(tscm);
  329. fw_iso_resources_free(&tscm->tx_resources);
  330. fw_iso_resources_free(&tscm->rx_resources);
  331. err = set_clock(tscm, rate, INT_MAX);
  332. if (err < 0)
  333. return err;
  334. err = keep_resources(tscm, rate, &tscm->tx_stream);
  335. if (err < 0)
  336. return err;
  337. err = keep_resources(tscm, rate, &tscm->rx_stream);
  338. if (err < 0) {
  339. fw_iso_resources_free(&tscm->tx_resources);
  340. return err;
  341. }
  342. err = amdtp_domain_set_events_per_period(&tscm->domain,
  343. frames_per_period, frames_per_buffer);
  344. if (err < 0) {
  345. fw_iso_resources_free(&tscm->tx_resources);
  346. fw_iso_resources_free(&tscm->rx_resources);
  347. return err;
  348. }
  349. tscm->need_long_tx_init_skip = (rate != curr_rate);
  350. }
  351. return 0;
  352. }
  353. int snd_tscm_stream_start_duplex(struct snd_tscm *tscm, unsigned int rate)
  354. {
  355. unsigned int generation = tscm->rx_resources.generation;
  356. int err;
  357. if (tscm->substreams_counter == 0)
  358. return 0;
  359. if (amdtp_streaming_error(&tscm->rx_stream) ||
  360. amdtp_streaming_error(&tscm->tx_stream)) {
  361. amdtp_domain_stop(&tscm->domain);
  362. finish_session(tscm);
  363. }
  364. if (generation != fw_parent_device(tscm->unit)->card->generation) {
  365. err = fw_iso_resources_update(&tscm->tx_resources);
  366. if (err < 0)
  367. goto error;
  368. err = fw_iso_resources_update(&tscm->rx_resources);
  369. if (err < 0)
  370. goto error;
  371. }
  372. if (!amdtp_stream_running(&tscm->rx_stream)) {
  373. int spd = fw_parent_device(tscm->unit)->max_speed;
  374. unsigned int tx_init_skip_cycles;
  375. err = set_stream_formats(tscm, rate);
  376. if (err < 0)
  377. goto error;
  378. err = begin_session(tscm);
  379. if (err < 0)
  380. goto error;
  381. err = amdtp_domain_add_stream(&tscm->domain, &tscm->rx_stream,
  382. tscm->rx_resources.channel, spd);
  383. if (err < 0)
  384. goto error;
  385. err = amdtp_domain_add_stream(&tscm->domain, &tscm->tx_stream,
  386. tscm->tx_resources.channel, spd);
  387. if (err < 0)
  388. goto error;
  389. if (tscm->need_long_tx_init_skip)
  390. tx_init_skip_cycles = 16000;
  391. else
  392. tx_init_skip_cycles = 0;
  393. // MEMO: Just after starting packet streaming, it transfers packets without any
  394. // event. Enough after receiving the sequence of packets, it multiplexes events into
  395. // the packet. However, just after changing sampling transfer frequency, it stops
  396. // multiplexing during packet transmission. Enough after, it restarts multiplexing
  397. // again. The device ignores presentation time expressed by the value of syt field
  398. // of CIP header in received packets. The sequence of the number of data blocks per
  399. // packet is important for media clock recovery.
  400. err = amdtp_domain_start(&tscm->domain, tx_init_skip_cycles, true, true);
  401. if (err < 0)
  402. goto error;
  403. if (!amdtp_domain_wait_ready(&tscm->domain, READY_TIMEOUT_MS)) {
  404. err = -ETIMEDOUT;
  405. goto error;
  406. }
  407. }
  408. return 0;
  409. error:
  410. amdtp_domain_stop(&tscm->domain);
  411. finish_session(tscm);
  412. return err;
  413. }
  414. void snd_tscm_stream_stop_duplex(struct snd_tscm *tscm)
  415. {
  416. if (tscm->substreams_counter == 0) {
  417. amdtp_domain_stop(&tscm->domain);
  418. finish_session(tscm);
  419. fw_iso_resources_free(&tscm->tx_resources);
  420. fw_iso_resources_free(&tscm->rx_resources);
  421. tscm->need_long_tx_init_skip = false;
  422. }
  423. }
  424. void snd_tscm_stream_lock_changed(struct snd_tscm *tscm)
  425. {
  426. tscm->dev_lock_changed = true;
  427. wake_up(&tscm->hwdep_wait);
  428. }
  429. int snd_tscm_stream_lock_try(struct snd_tscm *tscm)
  430. {
  431. int err;
  432. spin_lock_irq(&tscm->lock);
  433. /* user land lock this */
  434. if (tscm->dev_lock_count < 0) {
  435. err = -EBUSY;
  436. goto end;
  437. }
  438. /* this is the first time */
  439. if (tscm->dev_lock_count++ == 0)
  440. snd_tscm_stream_lock_changed(tscm);
  441. err = 0;
  442. end:
  443. spin_unlock_irq(&tscm->lock);
  444. return err;
  445. }
  446. void snd_tscm_stream_lock_release(struct snd_tscm *tscm)
  447. {
  448. spin_lock_irq(&tscm->lock);
  449. if (WARN_ON(tscm->dev_lock_count <= 0))
  450. goto end;
  451. if (--tscm->dev_lock_count == 0)
  452. snd_tscm_stream_lock_changed(tscm);
  453. end:
  454. spin_unlock_irq(&tscm->lock);
  455. }