atiixp_modem.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
  4. *
  5. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  6. */
  7. #include <linux/io.h>
  8. #include <linux/delay.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/init.h>
  11. #include <linux/pci.h>
  12. #include <linux/slab.h>
  13. #include <linux/module.h>
  14. #include <linux/mutex.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/info.h>
  19. #include <sound/ac97_codec.h>
  20. #include <sound/initval.h>
  21. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  22. MODULE_DESCRIPTION("ATI IXP MC97 controller");
  23. MODULE_LICENSE("GPL");
  24. static int index = -2; /* Exclude the first card */
  25. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  26. static int ac97_clock = 48000;
  27. module_param(index, int, 0444);
  28. MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
  29. module_param(id, charp, 0444);
  30. MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
  31. module_param(ac97_clock, int, 0444);
  32. MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
  33. /* just for backward compatibility */
  34. static bool enable;
  35. module_param(enable, bool, 0444);
  36. /*
  37. */
  38. #define ATI_REG_ISR 0x00 /* interrupt source */
  39. #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
  40. #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
  41. #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
  42. #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
  43. #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
  44. #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
  45. #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
  46. #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
  47. #define ATI_REG_ISR_PHYS_INTR (1U<<8)
  48. #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
  49. #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
  50. #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
  51. #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
  52. #define ATI_REG_ISR_NEW_FRAME (1U<<13)
  53. #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
  54. #define ATI_REG_IER 0x04 /* interrupt enable */
  55. #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
  56. #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
  57. #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
  58. #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
  59. #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
  60. #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
  61. #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
  62. #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
  63. #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
  64. #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
  65. #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
  66. #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
  67. #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
  68. #define ATI_REG_CMD 0x08 /* command */
  69. #define ATI_REG_CMD_POWERDOWN (1U<<0)
  70. #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
  71. #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
  72. #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
  73. #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
  74. #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
  75. #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
  76. #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
  77. #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
  78. #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
  79. #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
  80. #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
  81. #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
  82. #define ATI_REG_CMD_PACKED_DIS (1U<<24)
  83. #define ATI_REG_CMD_BURST_EN (1U<<25)
  84. #define ATI_REG_CMD_PANIC_EN (1U<<26)
  85. #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
  86. #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
  87. #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
  88. #define ATI_REG_CMD_AC_SYNC (1U<<30)
  89. #define ATI_REG_CMD_AC_RESET (1U<<31)
  90. #define ATI_REG_PHYS_OUT_ADDR 0x0c
  91. #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
  92. #define ATI_REG_PHYS_OUT_RW (1U<<2)
  93. #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
  94. #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
  95. #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
  96. #define ATI_REG_PHYS_IN_ADDR 0x10
  97. #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
  98. #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
  99. #define ATI_REG_PHYS_IN_DATA_SHIFT 16
  100. #define ATI_REG_SLOTREQ 0x14
  101. #define ATI_REG_COUNTER 0x18
  102. #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
  103. #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
  104. #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
  105. #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
  106. #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
  107. #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
  108. #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
  109. #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
  110. #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
  111. #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
  112. #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
  113. #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
  114. #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
  115. #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
  116. #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
  117. #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
  118. #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
  119. #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
  120. #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
  121. #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
  122. #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
  123. #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
  124. #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
  125. #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
  126. #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
  127. #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
  128. #define ATI_REG_MODEM_OUT_GPIO 0x74
  129. #define ATI_REG_MODEM_OUT_GPIO_EN 1
  130. #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
  131. #define ATI_REG_MODEM_IN_GPIO 0x78
  132. #define ATI_REG_MODEM_MIRROR 0x7c
  133. #define ATI_REG_AUDIO_MIRROR 0x80
  134. #define ATI_REG_MODEM_FIFO_FLUSH 0x88
  135. #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
  136. #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
  137. #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
  138. #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
  139. /* LINKPTR */
  140. #define ATI_REG_LINKPTR_EN (1U<<0)
  141. #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
  142. struct atiixp_modem;
  143. /*
  144. * DMA packate descriptor
  145. */
  146. struct atiixp_dma_desc {
  147. __le32 addr; /* DMA buffer address */
  148. u16 status; /* status bits */
  149. u16 size; /* size of the packet in dwords */
  150. __le32 next; /* address of the next packet descriptor */
  151. };
  152. /*
  153. * stream enum
  154. */
  155. enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
  156. enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
  157. enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
  158. #define NUM_ATI_CODECS 3
  159. /*
  160. * constants and callbacks for each DMA type
  161. */
  162. struct atiixp_dma_ops {
  163. int type; /* ATI_DMA_XXX */
  164. unsigned int llp_offset; /* LINKPTR offset */
  165. unsigned int dt_cur; /* DT_CUR offset */
  166. /* called from open callback */
  167. void (*enable_dma)(struct atiixp_modem *chip, int on);
  168. /* called from trigger (START/STOP) */
  169. void (*enable_transfer)(struct atiixp_modem *chip, int on);
  170. /* called from trigger (STOP only) */
  171. void (*flush_dma)(struct atiixp_modem *chip);
  172. };
  173. /*
  174. * DMA stream
  175. */
  176. struct atiixp_dma {
  177. const struct atiixp_dma_ops *ops;
  178. struct snd_dma_buffer desc_buf;
  179. struct snd_pcm_substream *substream; /* assigned PCM substream */
  180. unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
  181. unsigned int period_bytes, periods;
  182. int opened;
  183. int running;
  184. int pcm_open_flag;
  185. int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
  186. };
  187. /*
  188. * ATI IXP chip
  189. */
  190. struct atiixp_modem {
  191. struct snd_card *card;
  192. struct pci_dev *pci;
  193. struct resource *res; /* memory i/o */
  194. unsigned long addr;
  195. void __iomem *remap_addr;
  196. int irq;
  197. struct snd_ac97_bus *ac97_bus;
  198. struct snd_ac97 *ac97[NUM_ATI_CODECS];
  199. spinlock_t reg_lock;
  200. struct atiixp_dma dmas[NUM_ATI_DMAS];
  201. struct ac97_pcm *pcms[NUM_ATI_PCMS];
  202. struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
  203. int max_channels; /* max. channels for PCM out */
  204. unsigned int codec_not_ready_bits; /* for codec detection */
  205. int spdif_over_aclink; /* passed from the module option */
  206. struct mutex open_mutex; /* playback open mutex */
  207. };
  208. /*
  209. */
  210. static const struct pci_device_id snd_atiixp_ids[] = {
  211. { PCI_VDEVICE(ATI, 0x434d), 0 }, /* SB200 */
  212. { PCI_VDEVICE(ATI, 0x4378), 0 }, /* SB400 */
  213. { 0, }
  214. };
  215. MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
  216. /*
  217. * lowlevel functions
  218. */
  219. /*
  220. * update the bits of the given register.
  221. * return 1 if the bits changed.
  222. */
  223. static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg,
  224. unsigned int mask, unsigned int value)
  225. {
  226. void __iomem *addr = chip->remap_addr + reg;
  227. unsigned int data, old_data;
  228. old_data = data = readl(addr);
  229. data &= ~mask;
  230. data |= value;
  231. if (old_data == data)
  232. return 0;
  233. writel(data, addr);
  234. return 1;
  235. }
  236. /*
  237. * macros for easy use
  238. */
  239. #define atiixp_write(chip,reg,value) \
  240. writel(value, chip->remap_addr + ATI_REG_##reg)
  241. #define atiixp_read(chip,reg) \
  242. readl(chip->remap_addr + ATI_REG_##reg)
  243. #define atiixp_update(chip,reg,mask,val) \
  244. snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
  245. /*
  246. * handling DMA packets
  247. *
  248. * we allocate a linear buffer for the DMA, and split it to each packet.
  249. * in a future version, a scatter-gather buffer should be implemented.
  250. */
  251. #define ATI_DESC_LIST_SIZE \
  252. PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
  253. /*
  254. * build packets ring for the given buffer size.
  255. *
  256. * IXP handles the buffer descriptors, which are connected as a linked
  257. * list. although we can change the list dynamically, in this version,
  258. * a static RING of buffer descriptors is used.
  259. *
  260. * the ring is built in this function, and is set up to the hardware.
  261. */
  262. static int atiixp_build_dma_packets(struct atiixp_modem *chip,
  263. struct atiixp_dma *dma,
  264. struct snd_pcm_substream *substream,
  265. unsigned int periods,
  266. unsigned int period_bytes)
  267. {
  268. unsigned int i;
  269. u32 addr, desc_addr;
  270. unsigned long flags;
  271. if (periods > ATI_MAX_DESCRIPTORS)
  272. return -ENOMEM;
  273. if (dma->desc_buf.area == NULL) {
  274. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
  275. ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
  276. return -ENOMEM;
  277. dma->period_bytes = dma->periods = 0; /* clear */
  278. }
  279. if (dma->periods == periods && dma->period_bytes == period_bytes)
  280. return 0;
  281. /* reset DMA before changing the descriptor table */
  282. spin_lock_irqsave(&chip->reg_lock, flags);
  283. writel(0, chip->remap_addr + dma->ops->llp_offset);
  284. dma->ops->enable_dma(chip, 0);
  285. dma->ops->enable_dma(chip, 1);
  286. spin_unlock_irqrestore(&chip->reg_lock, flags);
  287. /* fill the entries */
  288. addr = (u32)substream->runtime->dma_addr;
  289. desc_addr = (u32)dma->desc_buf.addr;
  290. for (i = 0; i < periods; i++) {
  291. struct atiixp_dma_desc *desc;
  292. desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
  293. desc->addr = cpu_to_le32(addr);
  294. desc->status = 0;
  295. desc->size = period_bytes >> 2; /* in dwords */
  296. desc_addr += sizeof(struct atiixp_dma_desc);
  297. if (i == periods - 1)
  298. desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
  299. else
  300. desc->next = cpu_to_le32(desc_addr);
  301. addr += period_bytes;
  302. }
  303. writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
  304. chip->remap_addr + dma->ops->llp_offset);
  305. dma->period_bytes = period_bytes;
  306. dma->periods = periods;
  307. return 0;
  308. }
  309. /*
  310. * remove the ring buffer and release it if assigned
  311. */
  312. static void atiixp_clear_dma_packets(struct atiixp_modem *chip,
  313. struct atiixp_dma *dma,
  314. struct snd_pcm_substream *substream)
  315. {
  316. if (dma->desc_buf.area) {
  317. writel(0, chip->remap_addr + dma->ops->llp_offset);
  318. snd_dma_free_pages(&dma->desc_buf);
  319. dma->desc_buf.area = NULL;
  320. }
  321. }
  322. /*
  323. * AC97 interface
  324. */
  325. static int snd_atiixp_acquire_codec(struct atiixp_modem *chip)
  326. {
  327. int timeout = 1000;
  328. while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
  329. if (! timeout--) {
  330. dev_warn(chip->card->dev, "codec acquire timeout\n");
  331. return -EBUSY;
  332. }
  333. udelay(1);
  334. }
  335. return 0;
  336. }
  337. static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip,
  338. unsigned short codec,
  339. unsigned short reg)
  340. {
  341. unsigned int data;
  342. int timeout;
  343. if (snd_atiixp_acquire_codec(chip) < 0)
  344. return 0xffff;
  345. data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  346. ATI_REG_PHYS_OUT_ADDR_EN |
  347. ATI_REG_PHYS_OUT_RW |
  348. codec;
  349. atiixp_write(chip, PHYS_OUT_ADDR, data);
  350. if (snd_atiixp_acquire_codec(chip) < 0)
  351. return 0xffff;
  352. timeout = 1000;
  353. do {
  354. data = atiixp_read(chip, PHYS_IN_ADDR);
  355. if (data & ATI_REG_PHYS_IN_READ_FLAG)
  356. return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
  357. udelay(1);
  358. } while (--timeout);
  359. /* time out may happen during reset */
  360. if (reg < 0x7c)
  361. dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg);
  362. return 0xffff;
  363. }
  364. static void snd_atiixp_codec_write(struct atiixp_modem *chip,
  365. unsigned short codec,
  366. unsigned short reg, unsigned short val)
  367. {
  368. unsigned int data;
  369. if (snd_atiixp_acquire_codec(chip) < 0)
  370. return;
  371. data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
  372. ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
  373. ATI_REG_PHYS_OUT_ADDR_EN | codec;
  374. atiixp_write(chip, PHYS_OUT_ADDR, data);
  375. }
  376. static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
  377. unsigned short reg)
  378. {
  379. struct atiixp_modem *chip = ac97->private_data;
  380. return snd_atiixp_codec_read(chip, ac97->num, reg);
  381. }
  382. static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  383. unsigned short val)
  384. {
  385. struct atiixp_modem *chip = ac97->private_data;
  386. if (reg == AC97_GPIO_STATUS) {
  387. atiixp_write(chip, MODEM_OUT_GPIO,
  388. (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
  389. return;
  390. }
  391. snd_atiixp_codec_write(chip, ac97->num, reg, val);
  392. }
  393. /*
  394. * reset AC link
  395. */
  396. static int snd_atiixp_aclink_reset(struct atiixp_modem *chip)
  397. {
  398. int timeout;
  399. /* reset powerdoewn */
  400. if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
  401. udelay(10);
  402. /* perform a software reset */
  403. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
  404. atiixp_read(chip, CMD);
  405. udelay(10);
  406. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
  407. timeout = 10;
  408. while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
  409. /* do a hard reset */
  410. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  411. ATI_REG_CMD_AC_SYNC);
  412. atiixp_read(chip, CMD);
  413. msleep(1);
  414. atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
  415. if (!--timeout) {
  416. dev_err(chip->card->dev, "codec reset timeout\n");
  417. break;
  418. }
  419. }
  420. /* deassert RESET and assert SYNC to make sure */
  421. atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
  422. ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
  423. return 0;
  424. }
  425. static int snd_atiixp_aclink_down(struct atiixp_modem *chip)
  426. {
  427. // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
  428. // return -EBUSY;
  429. atiixp_update(chip, CMD,
  430. ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
  431. ATI_REG_CMD_POWERDOWN);
  432. return 0;
  433. }
  434. /*
  435. * auto-detection of codecs
  436. *
  437. * the IXP chip can generate interrupts for the non-existing codecs.
  438. * NEW_FRAME interrupt is used to make sure that the interrupt is generated
  439. * even if all three codecs are connected.
  440. */
  441. #define ALL_CODEC_NOT_READY \
  442. (ATI_REG_ISR_CODEC0_NOT_READY |\
  443. ATI_REG_ISR_CODEC1_NOT_READY |\
  444. ATI_REG_ISR_CODEC2_NOT_READY)
  445. #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
  446. static int snd_atiixp_codec_detect(struct atiixp_modem *chip)
  447. {
  448. int timeout;
  449. chip->codec_not_ready_bits = 0;
  450. atiixp_write(chip, IER, CODEC_CHECK_BITS);
  451. /* wait for the interrupts */
  452. timeout = 50;
  453. while (timeout-- > 0) {
  454. msleep(1);
  455. if (chip->codec_not_ready_bits)
  456. break;
  457. }
  458. atiixp_write(chip, IER, 0); /* disable irqs */
  459. if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
  460. dev_err(chip->card->dev, "no codec detected!\n");
  461. return -ENXIO;
  462. }
  463. return 0;
  464. }
  465. /*
  466. * enable DMA and irqs
  467. */
  468. static int snd_atiixp_chip_start(struct atiixp_modem *chip)
  469. {
  470. unsigned int reg;
  471. /* set up spdif, enable burst mode */
  472. reg = atiixp_read(chip, CMD);
  473. reg |= ATI_REG_CMD_BURST_EN;
  474. if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
  475. reg |= ATI_REG_CMD_MODEM_PRESENT;
  476. atiixp_write(chip, CMD, reg);
  477. /* clear all interrupt source */
  478. atiixp_write(chip, ISR, 0xffffffff);
  479. /* enable irqs */
  480. atiixp_write(chip, IER,
  481. ATI_REG_IER_MODEM_STATUS_EN |
  482. ATI_REG_IER_MODEM_IN_XRUN_EN |
  483. ATI_REG_IER_MODEM_OUT1_XRUN_EN);
  484. return 0;
  485. }
  486. /*
  487. * disable DMA and IRQs
  488. */
  489. static int snd_atiixp_chip_stop(struct atiixp_modem *chip)
  490. {
  491. /* clear interrupt source */
  492. atiixp_write(chip, ISR, atiixp_read(chip, ISR));
  493. /* disable irqs */
  494. atiixp_write(chip, IER, 0);
  495. return 0;
  496. }
  497. /*
  498. * PCM section
  499. */
  500. /*
  501. * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
  502. * position. when SG-buffer is implemented, the offset must be calculated
  503. * correctly...
  504. */
  505. static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
  506. {
  507. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  508. struct snd_pcm_runtime *runtime = substream->runtime;
  509. struct atiixp_dma *dma = runtime->private_data;
  510. unsigned int curptr;
  511. int timeout = 1000;
  512. while (timeout--) {
  513. curptr = readl(chip->remap_addr + dma->ops->dt_cur);
  514. if (curptr < dma->buf_addr)
  515. continue;
  516. curptr -= dma->buf_addr;
  517. if (curptr >= dma->buf_bytes)
  518. continue;
  519. return bytes_to_frames(runtime, curptr);
  520. }
  521. dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n",
  522. readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
  523. return 0;
  524. }
  525. /*
  526. * XRUN detected, and stop the PCM substream
  527. */
  528. static void snd_atiixp_xrun_dma(struct atiixp_modem *chip,
  529. struct atiixp_dma *dma)
  530. {
  531. if (! dma->substream || ! dma->running)
  532. return;
  533. dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type);
  534. snd_pcm_stop_xrun(dma->substream);
  535. }
  536. /*
  537. * the period ack. update the substream.
  538. */
  539. static void snd_atiixp_update_dma(struct atiixp_modem *chip,
  540. struct atiixp_dma *dma)
  541. {
  542. if (! dma->substream || ! dma->running)
  543. return;
  544. snd_pcm_period_elapsed(dma->substream);
  545. }
  546. /* set BUS_BUSY interrupt bit if any DMA is running */
  547. /* call with spinlock held */
  548. static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip)
  549. {
  550. unsigned int bus_busy;
  551. if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
  552. ATI_REG_CMD_MODEM_RECEIVE_EN))
  553. bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
  554. else
  555. bus_busy = 0;
  556. atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
  557. }
  558. /* common trigger callback
  559. * calling the lowlevel callbacks in it
  560. */
  561. static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  562. {
  563. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  564. struct atiixp_dma *dma = substream->runtime->private_data;
  565. int err = 0;
  566. if (snd_BUG_ON(!dma->ops->enable_transfer ||
  567. !dma->ops->flush_dma))
  568. return -EINVAL;
  569. spin_lock(&chip->reg_lock);
  570. switch(cmd) {
  571. case SNDRV_PCM_TRIGGER_START:
  572. dma->ops->enable_transfer(chip, 1);
  573. dma->running = 1;
  574. break;
  575. case SNDRV_PCM_TRIGGER_STOP:
  576. dma->ops->enable_transfer(chip, 0);
  577. dma->running = 0;
  578. break;
  579. default:
  580. err = -EINVAL;
  581. break;
  582. }
  583. if (! err) {
  584. snd_atiixp_check_bus_busy(chip);
  585. if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  586. dma->ops->flush_dma(chip);
  587. snd_atiixp_check_bus_busy(chip);
  588. }
  589. }
  590. spin_unlock(&chip->reg_lock);
  591. return err;
  592. }
  593. /*
  594. * lowlevel callbacks for each DMA type
  595. *
  596. * every callback is supposed to be called in chip->reg_lock spinlock
  597. */
  598. /* flush FIFO of analog OUT DMA */
  599. static void atiixp_out_flush_dma(struct atiixp_modem *chip)
  600. {
  601. atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
  602. }
  603. /* enable/disable analog OUT DMA */
  604. static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on)
  605. {
  606. unsigned int data;
  607. data = atiixp_read(chip, CMD);
  608. if (on) {
  609. if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
  610. return;
  611. atiixp_out_flush_dma(chip);
  612. data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
  613. } else
  614. data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
  615. atiixp_write(chip, CMD, data);
  616. }
  617. /* start/stop transfer over OUT DMA */
  618. static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on)
  619. {
  620. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
  621. on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
  622. }
  623. /* enable/disable analog IN DMA */
  624. static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on)
  625. {
  626. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
  627. on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
  628. }
  629. /* start/stop analog IN DMA */
  630. static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on)
  631. {
  632. if (on) {
  633. unsigned int data = atiixp_read(chip, CMD);
  634. if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
  635. data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
  636. atiixp_write(chip, CMD, data);
  637. }
  638. } else
  639. atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
  640. }
  641. /* flush FIFO of analog IN DMA */
  642. static void atiixp_in_flush_dma(struct atiixp_modem *chip)
  643. {
  644. atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
  645. }
  646. /* set up slots and formats for analog OUT */
  647. static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
  648. {
  649. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  650. unsigned int data;
  651. spin_lock_irq(&chip->reg_lock);
  652. /* set output threshold */
  653. data = atiixp_read(chip, MODEM_OUT_FIFO);
  654. data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
  655. data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
  656. atiixp_write(chip, MODEM_OUT_FIFO, data);
  657. spin_unlock_irq(&chip->reg_lock);
  658. return 0;
  659. }
  660. /* set up slots and formats for analog IN */
  661. static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
  662. {
  663. return 0;
  664. }
  665. /*
  666. * hw_params - allocate the buffer and set up buffer descriptors
  667. */
  668. static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
  669. struct snd_pcm_hw_params *hw_params)
  670. {
  671. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  672. struct atiixp_dma *dma = substream->runtime->private_data;
  673. int err;
  674. int i;
  675. dma->buf_addr = substream->runtime->dma_addr;
  676. dma->buf_bytes = params_buffer_bytes(hw_params);
  677. err = atiixp_build_dma_packets(chip, dma, substream,
  678. params_periods(hw_params),
  679. params_period_bytes(hw_params));
  680. if (err < 0)
  681. return err;
  682. /* set up modem rate */
  683. for (i = 0; i < NUM_ATI_CODECS; i++) {
  684. if (! chip->ac97[i])
  685. continue;
  686. snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
  687. snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
  688. }
  689. return err;
  690. }
  691. static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
  692. {
  693. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  694. struct atiixp_dma *dma = substream->runtime->private_data;
  695. atiixp_clear_dma_packets(chip, dma, substream);
  696. return 0;
  697. }
  698. /*
  699. * pcm hardware definition, identical for all DMA types
  700. */
  701. static const struct snd_pcm_hardware snd_atiixp_pcm_hw =
  702. {
  703. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  704. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  705. SNDRV_PCM_INFO_MMAP_VALID),
  706. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  707. .rates = (SNDRV_PCM_RATE_8000 |
  708. SNDRV_PCM_RATE_16000 |
  709. SNDRV_PCM_RATE_KNOT),
  710. .rate_min = 8000,
  711. .rate_max = 16000,
  712. .channels_min = 2,
  713. .channels_max = 2,
  714. .buffer_bytes_max = 256 * 1024,
  715. .period_bytes_min = 32,
  716. .period_bytes_max = 128 * 1024,
  717. .periods_min = 2,
  718. .periods_max = ATI_MAX_DESCRIPTORS,
  719. };
  720. static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
  721. struct atiixp_dma *dma, int pcm_type)
  722. {
  723. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  724. struct snd_pcm_runtime *runtime = substream->runtime;
  725. int err;
  726. static const unsigned int rates[] = { 8000, 9600, 12000, 16000 };
  727. static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  728. .count = ARRAY_SIZE(rates),
  729. .list = rates,
  730. .mask = 0,
  731. };
  732. if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
  733. return -EINVAL;
  734. if (dma->opened)
  735. return -EBUSY;
  736. dma->substream = substream;
  737. runtime->hw = snd_atiixp_pcm_hw;
  738. dma->ac97_pcm_type = pcm_type;
  739. err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  740. &hw_constraints_rates);
  741. if (err < 0)
  742. return err;
  743. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  744. if (err < 0)
  745. return err;
  746. runtime->private_data = dma;
  747. /* enable DMA bits */
  748. spin_lock_irq(&chip->reg_lock);
  749. dma->ops->enable_dma(chip, 1);
  750. spin_unlock_irq(&chip->reg_lock);
  751. dma->opened = 1;
  752. return 0;
  753. }
  754. static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
  755. struct atiixp_dma *dma)
  756. {
  757. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  758. /* disable DMA bits */
  759. if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
  760. return -EINVAL;
  761. spin_lock_irq(&chip->reg_lock);
  762. dma->ops->enable_dma(chip, 0);
  763. spin_unlock_irq(&chip->reg_lock);
  764. dma->substream = NULL;
  765. dma->opened = 0;
  766. return 0;
  767. }
  768. /*
  769. */
  770. static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
  771. {
  772. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  773. int err;
  774. mutex_lock(&chip->open_mutex);
  775. err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
  776. mutex_unlock(&chip->open_mutex);
  777. if (err < 0)
  778. return err;
  779. return 0;
  780. }
  781. static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
  782. {
  783. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  784. int err;
  785. mutex_lock(&chip->open_mutex);
  786. err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
  787. mutex_unlock(&chip->open_mutex);
  788. return err;
  789. }
  790. static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
  791. {
  792. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  793. return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
  794. }
  795. static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
  796. {
  797. struct atiixp_modem *chip = snd_pcm_substream_chip(substream);
  798. return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
  799. }
  800. /* AC97 playback */
  801. static const struct snd_pcm_ops snd_atiixp_playback_ops = {
  802. .open = snd_atiixp_playback_open,
  803. .close = snd_atiixp_playback_close,
  804. .hw_params = snd_atiixp_pcm_hw_params,
  805. .hw_free = snd_atiixp_pcm_hw_free,
  806. .prepare = snd_atiixp_playback_prepare,
  807. .trigger = snd_atiixp_pcm_trigger,
  808. .pointer = snd_atiixp_pcm_pointer,
  809. };
  810. /* AC97 capture */
  811. static const struct snd_pcm_ops snd_atiixp_capture_ops = {
  812. .open = snd_atiixp_capture_open,
  813. .close = snd_atiixp_capture_close,
  814. .hw_params = snd_atiixp_pcm_hw_params,
  815. .hw_free = snd_atiixp_pcm_hw_free,
  816. .prepare = snd_atiixp_capture_prepare,
  817. .trigger = snd_atiixp_pcm_trigger,
  818. .pointer = snd_atiixp_pcm_pointer,
  819. };
  820. static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
  821. .type = ATI_DMA_PLAYBACK,
  822. .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
  823. .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
  824. .enable_dma = atiixp_out_enable_dma,
  825. .enable_transfer = atiixp_out_enable_transfer,
  826. .flush_dma = atiixp_out_flush_dma,
  827. };
  828. static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
  829. .type = ATI_DMA_CAPTURE,
  830. .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
  831. .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
  832. .enable_dma = atiixp_in_enable_dma,
  833. .enable_transfer = atiixp_in_enable_transfer,
  834. .flush_dma = atiixp_in_flush_dma,
  835. };
  836. static int snd_atiixp_pcm_new(struct atiixp_modem *chip)
  837. {
  838. struct snd_pcm *pcm;
  839. int err;
  840. /* initialize constants */
  841. chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
  842. chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
  843. /* PCM #0: analog I/O */
  844. err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
  845. if (err < 0)
  846. return err;
  847. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
  848. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
  849. pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
  850. pcm->private_data = chip;
  851. strcpy(pcm->name, "ATI IXP MC97");
  852. chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
  853. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
  854. &chip->pci->dev, 64*1024, 128*1024);
  855. return 0;
  856. }
  857. /*
  858. * interrupt handler
  859. */
  860. static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
  861. {
  862. struct atiixp_modem *chip = dev_id;
  863. unsigned int status;
  864. status = atiixp_read(chip, ISR);
  865. if (! status)
  866. return IRQ_NONE;
  867. /* process audio DMA */
  868. if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
  869. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  870. else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
  871. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
  872. if (status & ATI_REG_ISR_MODEM_IN_XRUN)
  873. snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  874. else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
  875. snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
  876. /* for codec detection */
  877. if (status & CODEC_CHECK_BITS) {
  878. unsigned int detected;
  879. detected = status & CODEC_CHECK_BITS;
  880. spin_lock(&chip->reg_lock);
  881. chip->codec_not_ready_bits |= detected;
  882. atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
  883. spin_unlock(&chip->reg_lock);
  884. }
  885. /* ack */
  886. atiixp_write(chip, ISR, status);
  887. return IRQ_HANDLED;
  888. }
  889. /*
  890. * ac97 mixer section
  891. */
  892. static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock)
  893. {
  894. struct snd_ac97_bus *pbus;
  895. struct snd_ac97_template ac97;
  896. int i, err;
  897. int codec_count;
  898. static const struct snd_ac97_bus_ops ops = {
  899. .write = snd_atiixp_ac97_write,
  900. .read = snd_atiixp_ac97_read,
  901. };
  902. static const unsigned int codec_skip[NUM_ATI_CODECS] = {
  903. ATI_REG_ISR_CODEC0_NOT_READY,
  904. ATI_REG_ISR_CODEC1_NOT_READY,
  905. ATI_REG_ISR_CODEC2_NOT_READY,
  906. };
  907. if (snd_atiixp_codec_detect(chip) < 0)
  908. return -ENXIO;
  909. err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus);
  910. if (err < 0)
  911. return err;
  912. pbus->clock = clock;
  913. chip->ac97_bus = pbus;
  914. codec_count = 0;
  915. for (i = 0; i < NUM_ATI_CODECS; i++) {
  916. if (chip->codec_not_ready_bits & codec_skip[i])
  917. continue;
  918. memset(&ac97, 0, sizeof(ac97));
  919. ac97.private_data = chip;
  920. ac97.pci = chip->pci;
  921. ac97.num = i;
  922. ac97.scaps = AC97_SCAP_SKIP_AUDIO | AC97_SCAP_POWER_SAVE;
  923. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i]);
  924. if (err < 0) {
  925. chip->ac97[i] = NULL; /* to be sure */
  926. dev_dbg(chip->card->dev,
  927. "codec %d not available for modem\n", i);
  928. continue;
  929. }
  930. codec_count++;
  931. }
  932. if (! codec_count) {
  933. dev_err(chip->card->dev, "no codec available\n");
  934. return -ENODEV;
  935. }
  936. /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
  937. return 0;
  938. }
  939. /*
  940. * power management
  941. */
  942. static int snd_atiixp_suspend(struct device *dev)
  943. {
  944. struct snd_card *card = dev_get_drvdata(dev);
  945. struct atiixp_modem *chip = card->private_data;
  946. int i;
  947. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  948. for (i = 0; i < NUM_ATI_CODECS; i++)
  949. snd_ac97_suspend(chip->ac97[i]);
  950. snd_atiixp_aclink_down(chip);
  951. snd_atiixp_chip_stop(chip);
  952. return 0;
  953. }
  954. static int snd_atiixp_resume(struct device *dev)
  955. {
  956. struct snd_card *card = dev_get_drvdata(dev);
  957. struct atiixp_modem *chip = card->private_data;
  958. int i;
  959. snd_atiixp_aclink_reset(chip);
  960. snd_atiixp_chip_start(chip);
  961. for (i = 0; i < NUM_ATI_CODECS; i++)
  962. snd_ac97_resume(chip->ac97[i]);
  963. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  964. return 0;
  965. }
  966. static DEFINE_SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume);
  967. /*
  968. * proc interface for register dump
  969. */
  970. static void snd_atiixp_proc_read(struct snd_info_entry *entry,
  971. struct snd_info_buffer *buffer)
  972. {
  973. struct atiixp_modem *chip = entry->private_data;
  974. int i;
  975. for (i = 0; i < 256; i += 4)
  976. snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
  977. }
  978. static void snd_atiixp_proc_init(struct atiixp_modem *chip)
  979. {
  980. snd_card_ro_proc_new(chip->card, "atiixp-modem", chip,
  981. snd_atiixp_proc_read);
  982. }
  983. /*
  984. * destructor
  985. */
  986. static void snd_atiixp_free(struct snd_card *card)
  987. {
  988. snd_atiixp_chip_stop(card->private_data);
  989. }
  990. /*
  991. * constructor for chip instance
  992. */
  993. static int snd_atiixp_init(struct snd_card *card, struct pci_dev *pci)
  994. {
  995. struct atiixp_modem *chip = card->private_data;
  996. int err;
  997. err = pcim_enable_device(pci);
  998. if (err < 0)
  999. return err;
  1000. spin_lock_init(&chip->reg_lock);
  1001. mutex_init(&chip->open_mutex);
  1002. chip->card = card;
  1003. chip->pci = pci;
  1004. chip->irq = -1;
  1005. err = pcim_iomap_regions(pci, 1 << 0, "ATI IXP MC97");
  1006. if (err < 0)
  1007. return err;
  1008. chip->addr = pci_resource_start(pci, 0);
  1009. chip->remap_addr = pcim_iomap_table(pci)[0];
  1010. if (devm_request_irq(&pci->dev, pci->irq, snd_atiixp_interrupt,
  1011. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1012. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  1013. return -EBUSY;
  1014. }
  1015. chip->irq = pci->irq;
  1016. card->sync_irq = chip->irq;
  1017. card->private_free = snd_atiixp_free;
  1018. pci_set_master(pci);
  1019. return 0;
  1020. }
  1021. static int __snd_atiixp_probe(struct pci_dev *pci,
  1022. const struct pci_device_id *pci_id)
  1023. {
  1024. struct snd_card *card;
  1025. struct atiixp_modem *chip;
  1026. int err;
  1027. err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
  1028. sizeof(*chip), &card);
  1029. if (err < 0)
  1030. return err;
  1031. chip = card->private_data;
  1032. strcpy(card->driver, "ATIIXP-MODEM");
  1033. strcpy(card->shortname, "ATI IXP Modem");
  1034. err = snd_atiixp_init(card, pci);
  1035. if (err < 0)
  1036. return err;
  1037. err = snd_atiixp_aclink_reset(chip);
  1038. if (err < 0)
  1039. return err;
  1040. err = snd_atiixp_mixer_new(chip, ac97_clock);
  1041. if (err < 0)
  1042. return err;
  1043. err = snd_atiixp_pcm_new(chip);
  1044. if (err < 0)
  1045. return err;
  1046. snd_atiixp_proc_init(chip);
  1047. snd_atiixp_chip_start(chip);
  1048. sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
  1049. card->shortname, pci->revision, chip->addr, chip->irq);
  1050. err = snd_card_register(card);
  1051. if (err < 0)
  1052. return err;
  1053. pci_set_drvdata(pci, card);
  1054. return 0;
  1055. }
  1056. static int snd_atiixp_probe(struct pci_dev *pci,
  1057. const struct pci_device_id *pci_id)
  1058. {
  1059. return snd_card_free_on_error(&pci->dev, __snd_atiixp_probe(pci, pci_id));
  1060. }
  1061. static struct pci_driver atiixp_modem_driver = {
  1062. .name = KBUILD_MODNAME,
  1063. .id_table = snd_atiixp_ids,
  1064. .probe = snd_atiixp_probe,
  1065. .driver = {
  1066. .pm = &snd_atiixp_pm,
  1067. },
  1068. };
  1069. module_pci_driver(atiixp_modem_driver);