es1938.c 52 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
  4. * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
  5. * Jaroslav Kysela <perex@perex.cz>,
  6. * Thomas Sailer <sailer@ife.ee.ethz.ch>,
  7. * Abramo Bagnara <abramo@alsa-project.org>,
  8. * Markus Gruber <gruber@eikon.tum.de>
  9. *
  10. * Rewritten from sonicvibes.c source.
  11. *
  12. * TODO:
  13. * Rewrite better spinlocks
  14. */
  15. /*
  16. NOTES:
  17. - Capture data is written unaligned starting from dma_base + 1 so I need to
  18. disable mmap and to add a copy callback.
  19. - After several cycle of the following:
  20. while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
  21. a "playback write error (DMA or IRQ trouble?)" may happen.
  22. This is due to playback interrupts not generated.
  23. I suspect a timing issue.
  24. - Sometimes the interrupt handler is invoked wrongly during playback.
  25. This generates some harmless "Unexpected hw_pointer: wrong interrupt
  26. acknowledge".
  27. I've seen that using small period sizes.
  28. Reproducible with:
  29. mpg123 test.mp3 &
  30. hdparm -t -T /dev/hda
  31. */
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/slab.h>
  36. #include <linux/gameport.h>
  37. #include <linux/module.h>
  38. #include <linux/delay.h>
  39. #include <linux/dma-mapping.h>
  40. #include <linux/io.h>
  41. #include <sound/core.h>
  42. #include <sound/control.h>
  43. #include <sound/pcm.h>
  44. #include <sound/opl3.h>
  45. #include <sound/mpu401.h>
  46. #include <sound/initval.h>
  47. #include <sound/tlv.h>
  48. MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
  49. MODULE_DESCRIPTION("ESS Solo-1");
  50. MODULE_LICENSE("GPL");
  51. #if IS_REACHABLE(CONFIG_GAMEPORT)
  52. #define SUPPORT_JOYSTICK 1
  53. #endif
  54. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  55. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  56. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  57. module_param_array(index, int, NULL, 0444);
  58. MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
  59. module_param_array(id, charp, NULL, 0444);
  60. MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
  61. module_param_array(enable, bool, NULL, 0444);
  62. MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
  63. #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
  64. #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
  65. #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
  66. #define SL_PCI_LEGACYCONTROL 0x40
  67. #define SL_PCI_CONFIG 0x50
  68. #define SL_PCI_DDMACONTROL 0x60
  69. #define ESSIO_REG_AUDIO2DMAADDR 0
  70. #define ESSIO_REG_AUDIO2DMACOUNT 4
  71. #define ESSIO_REG_AUDIO2MODE 6
  72. #define ESSIO_REG_IRQCONTROL 7
  73. #define ESSDM_REG_DMAADDR 0x00
  74. #define ESSDM_REG_DMACOUNT 0x04
  75. #define ESSDM_REG_DMACOMMAND 0x08
  76. #define ESSDM_REG_DMASTATUS 0x08
  77. #define ESSDM_REG_DMAMODE 0x0b
  78. #define ESSDM_REG_DMACLEAR 0x0d
  79. #define ESSDM_REG_DMAMASK 0x0f
  80. #define ESSSB_REG_FMLOWADDR 0x00
  81. #define ESSSB_REG_FMHIGHADDR 0x02
  82. #define ESSSB_REG_MIXERADDR 0x04
  83. #define ESSSB_REG_MIXERDATA 0x05
  84. #define ESSSB_IREG_AUDIO1 0x14
  85. #define ESSSB_IREG_MICMIX 0x1a
  86. #define ESSSB_IREG_RECSRC 0x1c
  87. #define ESSSB_IREG_MASTER 0x32
  88. #define ESSSB_IREG_FM 0x36
  89. #define ESSSB_IREG_AUXACD 0x38
  90. #define ESSSB_IREG_AUXB 0x3a
  91. #define ESSSB_IREG_PCSPEAKER 0x3c
  92. #define ESSSB_IREG_LINE 0x3e
  93. #define ESSSB_IREG_SPATCONTROL 0x50
  94. #define ESSSB_IREG_SPATLEVEL 0x52
  95. #define ESSSB_IREG_MASTER_LEFT 0x60
  96. #define ESSSB_IREG_MASTER_RIGHT 0x62
  97. #define ESSSB_IREG_MPU401CONTROL 0x64
  98. #define ESSSB_IREG_MICMIXRECORD 0x68
  99. #define ESSSB_IREG_AUDIO2RECORD 0x69
  100. #define ESSSB_IREG_AUXACDRECORD 0x6a
  101. #define ESSSB_IREG_FMRECORD 0x6b
  102. #define ESSSB_IREG_AUXBRECORD 0x6c
  103. #define ESSSB_IREG_MONO 0x6d
  104. #define ESSSB_IREG_LINERECORD 0x6e
  105. #define ESSSB_IREG_MONORECORD 0x6f
  106. #define ESSSB_IREG_AUDIO2SAMPLE 0x70
  107. #define ESSSB_IREG_AUDIO2MODE 0x71
  108. #define ESSSB_IREG_AUDIO2FILTER 0x72
  109. #define ESSSB_IREG_AUDIO2TCOUNTL 0x74
  110. #define ESSSB_IREG_AUDIO2TCOUNTH 0x76
  111. #define ESSSB_IREG_AUDIO2CONTROL1 0x78
  112. #define ESSSB_IREG_AUDIO2CONTROL2 0x7a
  113. #define ESSSB_IREG_AUDIO2 0x7c
  114. #define ESSSB_REG_RESET 0x06
  115. #define ESSSB_REG_READDATA 0x0a
  116. #define ESSSB_REG_WRITEDATA 0x0c
  117. #define ESSSB_REG_READSTATUS 0x0c
  118. #define ESSSB_REG_STATUS 0x0e
  119. #define ESS_CMD_EXTSAMPLERATE 0xa1
  120. #define ESS_CMD_FILTERDIV 0xa2
  121. #define ESS_CMD_DMACNTRELOADL 0xa4
  122. #define ESS_CMD_DMACNTRELOADH 0xa5
  123. #define ESS_CMD_ANALOGCONTROL 0xa8
  124. #define ESS_CMD_IRQCONTROL 0xb1
  125. #define ESS_CMD_DRQCONTROL 0xb2
  126. #define ESS_CMD_RECLEVEL 0xb4
  127. #define ESS_CMD_SETFORMAT 0xb6
  128. #define ESS_CMD_SETFORMAT2 0xb7
  129. #define ESS_CMD_DMACONTROL 0xb8
  130. #define ESS_CMD_DMATYPE 0xb9
  131. #define ESS_CMD_OFFSETLEFT 0xba
  132. #define ESS_CMD_OFFSETRIGHT 0xbb
  133. #define ESS_CMD_READREG 0xc0
  134. #define ESS_CMD_ENABLEEXT 0xc6
  135. #define ESS_CMD_PAUSEDMA 0xd0
  136. #define ESS_CMD_ENABLEAUDIO1 0xd1
  137. #define ESS_CMD_STOPAUDIO1 0xd3
  138. #define ESS_CMD_AUDIO1STATUS 0xd8
  139. #define ESS_CMD_CONTDMA 0xd4
  140. #define ESS_CMD_TESTIRQ 0xf2
  141. #define ESS_RECSRC_MIC 0
  142. #define ESS_RECSRC_AUXACD 2
  143. #define ESS_RECSRC_AUXB 5
  144. #define ESS_RECSRC_LINE 6
  145. #define ESS_RECSRC_NONE 7
  146. #define DAC1 0x01
  147. #define ADC1 0x02
  148. #define DAC2 0x04
  149. /*
  150. */
  151. #define SAVED_REG_SIZE 32 /* max. number of registers to save */
  152. struct es1938 {
  153. int irq;
  154. unsigned long io_port;
  155. unsigned long sb_port;
  156. unsigned long vc_port;
  157. unsigned long mpu_port;
  158. unsigned long game_port;
  159. unsigned long ddma_port;
  160. unsigned char irqmask;
  161. unsigned char revision;
  162. struct snd_kcontrol *hw_volume;
  163. struct snd_kcontrol *hw_switch;
  164. struct snd_kcontrol *master_volume;
  165. struct snd_kcontrol *master_switch;
  166. struct pci_dev *pci;
  167. struct snd_card *card;
  168. struct snd_pcm *pcm;
  169. struct snd_pcm_substream *capture_substream;
  170. struct snd_pcm_substream *playback1_substream;
  171. struct snd_pcm_substream *playback2_substream;
  172. struct snd_rawmidi *rmidi;
  173. unsigned int dma1_size;
  174. unsigned int dma2_size;
  175. unsigned int dma1_start;
  176. unsigned int dma2_start;
  177. unsigned int dma1_shift;
  178. unsigned int dma2_shift;
  179. unsigned int last_capture_dmaaddr;
  180. unsigned int active;
  181. spinlock_t reg_lock;
  182. spinlock_t mixer_lock;
  183. struct snd_info_entry *proc_entry;
  184. #ifdef SUPPORT_JOYSTICK
  185. struct gameport *gameport;
  186. #endif
  187. unsigned char saved_regs[SAVED_REG_SIZE];
  188. };
  189. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
  190. static const struct pci_device_id snd_es1938_ids[] = {
  191. { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
  192. { 0, }
  193. };
  194. MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
  195. #define RESET_LOOP_TIMEOUT 0x10000
  196. #define WRITE_LOOP_TIMEOUT 0x10000
  197. #define GET_LOOP_TIMEOUT 0x01000
  198. /* -----------------------------------------------------------------
  199. * Write to a mixer register
  200. * -----------------------------------------------------------------*/
  201. static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
  202. {
  203. unsigned long flags;
  204. spin_lock_irqsave(&chip->mixer_lock, flags);
  205. outb(reg, SLSB_REG(chip, MIXERADDR));
  206. outb(val, SLSB_REG(chip, MIXERDATA));
  207. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  208. dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
  209. }
  210. /* -----------------------------------------------------------------
  211. * Read from a mixer register
  212. * -----------------------------------------------------------------*/
  213. static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
  214. {
  215. int data;
  216. unsigned long flags;
  217. spin_lock_irqsave(&chip->mixer_lock, flags);
  218. outb(reg, SLSB_REG(chip, MIXERADDR));
  219. data = inb(SLSB_REG(chip, MIXERDATA));
  220. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  221. dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
  222. return data;
  223. }
  224. /* -----------------------------------------------------------------
  225. * Write to some bits of a mixer register (return old value)
  226. * -----------------------------------------------------------------*/
  227. static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
  228. unsigned char mask, unsigned char val)
  229. {
  230. unsigned long flags;
  231. unsigned char old, new, oval;
  232. spin_lock_irqsave(&chip->mixer_lock, flags);
  233. outb(reg, SLSB_REG(chip, MIXERADDR));
  234. old = inb(SLSB_REG(chip, MIXERDATA));
  235. oval = old & mask;
  236. if (val != oval) {
  237. new = (old & ~mask) | (val & mask);
  238. outb(new, SLSB_REG(chip, MIXERDATA));
  239. dev_dbg(chip->card->dev,
  240. "Mixer reg %02x was %02x, set to %02x\n",
  241. reg, old, new);
  242. }
  243. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  244. return oval;
  245. }
  246. /* -----------------------------------------------------------------
  247. * Write command to Controller Registers
  248. * -----------------------------------------------------------------*/
  249. static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
  250. {
  251. int i;
  252. unsigned char v;
  253. for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
  254. v = inb(SLSB_REG(chip, READSTATUS));
  255. if (!(v & 0x80)) {
  256. outb(cmd, SLSB_REG(chip, WRITEDATA));
  257. return;
  258. }
  259. }
  260. dev_err(chip->card->dev,
  261. "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
  262. }
  263. /* -----------------------------------------------------------------
  264. * Read the Read Data Buffer
  265. * -----------------------------------------------------------------*/
  266. static int snd_es1938_get_byte(struct es1938 *chip)
  267. {
  268. int i;
  269. unsigned char v;
  270. for (i = GET_LOOP_TIMEOUT; i; i--) {
  271. v = inb(SLSB_REG(chip, STATUS));
  272. if (v & 0x80)
  273. return inb(SLSB_REG(chip, READDATA));
  274. }
  275. dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
  276. return -ENODEV;
  277. }
  278. /* -----------------------------------------------------------------
  279. * Write value cmd register
  280. * -----------------------------------------------------------------*/
  281. static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
  282. {
  283. unsigned long flags;
  284. spin_lock_irqsave(&chip->reg_lock, flags);
  285. snd_es1938_write_cmd(chip, reg);
  286. snd_es1938_write_cmd(chip, val);
  287. spin_unlock_irqrestore(&chip->reg_lock, flags);
  288. dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
  289. }
  290. /* -----------------------------------------------------------------
  291. * Read data from cmd register and return it
  292. * -----------------------------------------------------------------*/
  293. static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
  294. {
  295. unsigned char val;
  296. unsigned long flags;
  297. spin_lock_irqsave(&chip->reg_lock, flags);
  298. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  299. snd_es1938_write_cmd(chip, reg);
  300. val = snd_es1938_get_byte(chip);
  301. spin_unlock_irqrestore(&chip->reg_lock, flags);
  302. dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
  303. return val;
  304. }
  305. /* -----------------------------------------------------------------
  306. * Write data to cmd register and return old value
  307. * -----------------------------------------------------------------*/
  308. static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
  309. unsigned char val)
  310. {
  311. unsigned long flags;
  312. unsigned char old, new, oval;
  313. spin_lock_irqsave(&chip->reg_lock, flags);
  314. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  315. snd_es1938_write_cmd(chip, reg);
  316. old = snd_es1938_get_byte(chip);
  317. oval = old & mask;
  318. if (val != oval) {
  319. snd_es1938_write_cmd(chip, reg);
  320. new = (old & ~mask) | (val & mask);
  321. snd_es1938_write_cmd(chip, new);
  322. dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
  323. reg, old, new);
  324. }
  325. spin_unlock_irqrestore(&chip->reg_lock, flags);
  326. return oval;
  327. }
  328. /* --------------------------------------------------------------------
  329. * Reset the chip
  330. * --------------------------------------------------------------------*/
  331. static void snd_es1938_reset(struct es1938 *chip)
  332. {
  333. int i;
  334. outb(3, SLSB_REG(chip, RESET));
  335. inb(SLSB_REG(chip, RESET));
  336. outb(0, SLSB_REG(chip, RESET));
  337. for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
  338. if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
  339. if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
  340. goto __next;
  341. }
  342. }
  343. dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
  344. __next:
  345. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
  346. /* Demand transfer DMA: 4 bytes per DMA request */
  347. snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
  348. /* Change behaviour of register A1
  349. 4x oversampling
  350. 2nd channel DAC asynchronous */
  351. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
  352. /* enable/select DMA channel and IRQ channel */
  353. snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
  354. snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
  355. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
  356. /* Set spatializer parameters to recommended values */
  357. snd_es1938_mixer_write(chip, 0x54, 0x8f);
  358. snd_es1938_mixer_write(chip, 0x56, 0x95);
  359. snd_es1938_mixer_write(chip, 0x58, 0x94);
  360. snd_es1938_mixer_write(chip, 0x5a, 0x80);
  361. }
  362. /* --------------------------------------------------------------------
  363. * Reset the FIFOs
  364. * --------------------------------------------------------------------*/
  365. static void snd_es1938_reset_fifo(struct es1938 *chip)
  366. {
  367. outb(2, SLSB_REG(chip, RESET));
  368. outb(0, SLSB_REG(chip, RESET));
  369. }
  370. static const struct snd_ratnum clocks[2] = {
  371. {
  372. .num = 793800,
  373. .den_min = 1,
  374. .den_max = 128,
  375. .den_step = 1,
  376. },
  377. {
  378. .num = 768000,
  379. .den_min = 1,
  380. .den_max = 128,
  381. .den_step = 1,
  382. }
  383. };
  384. static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
  385. .nrats = 2,
  386. .rats = clocks,
  387. };
  388. static void snd_es1938_rate_set(struct es1938 *chip,
  389. struct snd_pcm_substream *substream,
  390. int mode)
  391. {
  392. unsigned int bits, div0;
  393. struct snd_pcm_runtime *runtime = substream->runtime;
  394. if (runtime->rate_num == clocks[0].num)
  395. bits = 128 - runtime->rate_den;
  396. else
  397. bits = 256 - runtime->rate_den;
  398. /* set filter register */
  399. div0 = 256 - 7160000*20/(8*82*runtime->rate);
  400. if (mode == DAC2) {
  401. snd_es1938_mixer_write(chip, 0x70, bits);
  402. snd_es1938_mixer_write(chip, 0x72, div0);
  403. } else {
  404. snd_es1938_write(chip, 0xA1, bits);
  405. snd_es1938_write(chip, 0xA2, div0);
  406. }
  407. }
  408. /* --------------------------------------------------------------------
  409. * Configure Solo1 builtin DMA Controller
  410. * --------------------------------------------------------------------*/
  411. static void snd_es1938_playback1_setdma(struct es1938 *chip)
  412. {
  413. outb(0x00, SLIO_REG(chip, AUDIO2MODE));
  414. outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
  415. outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
  416. outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
  417. }
  418. static void snd_es1938_playback2_setdma(struct es1938 *chip)
  419. {
  420. /* Enable DMA controller */
  421. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  422. /* 1. Master reset */
  423. outb(0, SLDM_REG(chip, DMACLEAR));
  424. /* 2. Mask DMA */
  425. outb(1, SLDM_REG(chip, DMAMASK));
  426. outb(0x18, SLDM_REG(chip, DMAMODE));
  427. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  428. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  429. /* 3. Unmask DMA */
  430. outb(0, SLDM_REG(chip, DMAMASK));
  431. }
  432. static void snd_es1938_capture_setdma(struct es1938 *chip)
  433. {
  434. /* Enable DMA controller */
  435. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  436. /* 1. Master reset */
  437. outb(0, SLDM_REG(chip, DMACLEAR));
  438. /* 2. Mask DMA */
  439. outb(1, SLDM_REG(chip, DMAMASK));
  440. outb(0x14, SLDM_REG(chip, DMAMODE));
  441. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  442. chip->last_capture_dmaaddr = chip->dma1_start;
  443. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  444. /* 3. Unmask DMA */
  445. outb(0, SLDM_REG(chip, DMAMASK));
  446. }
  447. /* ----------------------------------------------------------------------
  448. *
  449. * *** PCM part ***
  450. */
  451. static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
  452. int cmd)
  453. {
  454. struct es1938 *chip = snd_pcm_substream_chip(substream);
  455. int val;
  456. switch (cmd) {
  457. case SNDRV_PCM_TRIGGER_START:
  458. case SNDRV_PCM_TRIGGER_RESUME:
  459. val = 0x0f;
  460. chip->active |= ADC1;
  461. break;
  462. case SNDRV_PCM_TRIGGER_STOP:
  463. case SNDRV_PCM_TRIGGER_SUSPEND:
  464. val = 0x00;
  465. chip->active &= ~ADC1;
  466. break;
  467. default:
  468. return -EINVAL;
  469. }
  470. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  471. return 0;
  472. }
  473. static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
  474. int cmd)
  475. {
  476. struct es1938 *chip = snd_pcm_substream_chip(substream);
  477. switch (cmd) {
  478. case SNDRV_PCM_TRIGGER_START:
  479. case SNDRV_PCM_TRIGGER_RESUME:
  480. /* According to the documentation this should be:
  481. 0x13 but that value may randomly swap stereo channels */
  482. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
  483. udelay(10);
  484. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
  485. /* This two stage init gives the FIFO -> DAC connection time to
  486. * settle before first data from DMA flows in. This should ensure
  487. * no swapping of stereo channels. Report a bug if otherwise :-) */
  488. outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
  489. chip->active |= DAC2;
  490. break;
  491. case SNDRV_PCM_TRIGGER_STOP:
  492. case SNDRV_PCM_TRIGGER_SUSPEND:
  493. outb(0, SLIO_REG(chip, AUDIO2MODE));
  494. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
  495. chip->active &= ~DAC2;
  496. break;
  497. default:
  498. return -EINVAL;
  499. }
  500. return 0;
  501. }
  502. static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
  503. int cmd)
  504. {
  505. struct es1938 *chip = snd_pcm_substream_chip(substream);
  506. int val;
  507. switch (cmd) {
  508. case SNDRV_PCM_TRIGGER_START:
  509. case SNDRV_PCM_TRIGGER_RESUME:
  510. val = 5;
  511. chip->active |= DAC1;
  512. break;
  513. case SNDRV_PCM_TRIGGER_STOP:
  514. case SNDRV_PCM_TRIGGER_SUSPEND:
  515. val = 0;
  516. chip->active &= ~DAC1;
  517. break;
  518. default:
  519. return -EINVAL;
  520. }
  521. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  522. return 0;
  523. }
  524. static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
  525. int cmd)
  526. {
  527. switch (substream->number) {
  528. case 0:
  529. return snd_es1938_playback1_trigger(substream, cmd);
  530. case 1:
  531. return snd_es1938_playback2_trigger(substream, cmd);
  532. }
  533. snd_BUG();
  534. return -EINVAL;
  535. }
  536. /* --------------------------------------------------------------------
  537. * First channel for Extended Mode Audio 1 ADC Operation
  538. * --------------------------------------------------------------------*/
  539. static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
  540. {
  541. struct es1938 *chip = snd_pcm_substream_chip(substream);
  542. struct snd_pcm_runtime *runtime = substream->runtime;
  543. int u, is8, mono;
  544. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  545. unsigned int count = snd_pcm_lib_period_bytes(substream);
  546. chip->dma1_size = size;
  547. chip->dma1_start = runtime->dma_addr;
  548. mono = (runtime->channels > 1) ? 0 : 1;
  549. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  550. u = snd_pcm_format_unsigned(runtime->format);
  551. chip->dma1_shift = 2 - mono - is8;
  552. snd_es1938_reset_fifo(chip);
  553. /* program type */
  554. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  555. /* set clock and counters */
  556. snd_es1938_rate_set(chip, substream, ADC1);
  557. count = 0x10000 - count;
  558. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  559. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  560. /* initialize and configure ADC */
  561. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
  562. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
  563. (u ? 0x00 : 0x20) |
  564. (is8 ? 0x00 : 0x04) |
  565. (mono ? 0x40 : 0x08));
  566. // snd_es1938_reset_fifo(chip);
  567. /* 11. configure system interrupt controller and DMA controller */
  568. snd_es1938_capture_setdma(chip);
  569. return 0;
  570. }
  571. /* ------------------------------------------------------------------------------
  572. * Second Audio channel DAC Operation
  573. * ------------------------------------------------------------------------------*/
  574. static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
  575. {
  576. struct es1938 *chip = snd_pcm_substream_chip(substream);
  577. struct snd_pcm_runtime *runtime = substream->runtime;
  578. int u, is8, mono;
  579. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  580. unsigned int count = snd_pcm_lib_period_bytes(substream);
  581. chip->dma2_size = size;
  582. chip->dma2_start = runtime->dma_addr;
  583. mono = (runtime->channels > 1) ? 0 : 1;
  584. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  585. u = snd_pcm_format_unsigned(runtime->format);
  586. chip->dma2_shift = 2 - mono - is8;
  587. snd_es1938_reset_fifo(chip);
  588. /* set clock and counters */
  589. snd_es1938_rate_set(chip, substream, DAC2);
  590. count >>= 1;
  591. count = 0x10000 - count;
  592. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
  593. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
  594. /* initialize and configure Audio 2 DAC */
  595. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
  596. (mono ? 0 : 2) | (is8 ? 0 : 1));
  597. /* program DMA */
  598. snd_es1938_playback1_setdma(chip);
  599. return 0;
  600. }
  601. static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
  602. {
  603. struct es1938 *chip = snd_pcm_substream_chip(substream);
  604. struct snd_pcm_runtime *runtime = substream->runtime;
  605. int u, is8, mono;
  606. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  607. unsigned int count = snd_pcm_lib_period_bytes(substream);
  608. chip->dma1_size = size;
  609. chip->dma1_start = runtime->dma_addr;
  610. mono = (runtime->channels > 1) ? 0 : 1;
  611. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  612. u = snd_pcm_format_unsigned(runtime->format);
  613. chip->dma1_shift = 2 - mono - is8;
  614. count = 0x10000 - count;
  615. /* reset */
  616. snd_es1938_reset_fifo(chip);
  617. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  618. /* set clock and counters */
  619. snd_es1938_rate_set(chip, substream, DAC1);
  620. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  621. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  622. /* initialized and configure DAC */
  623. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
  624. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
  625. snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
  626. 0x90 | (mono ? 0x40 : 0x08) |
  627. (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
  628. /* program DMA */
  629. snd_es1938_playback2_setdma(chip);
  630. return 0;
  631. }
  632. static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
  633. {
  634. switch (substream->number) {
  635. case 0:
  636. return snd_es1938_playback1_prepare(substream);
  637. case 1:
  638. return snd_es1938_playback2_prepare(substream);
  639. }
  640. snd_BUG();
  641. return -EINVAL;
  642. }
  643. /* during the incrementing of dma counters the DMA register reads sometimes
  644. returns garbage. To ensure a valid hw pointer, the following checks which
  645. should be very unlikely to fail are used:
  646. - is the current DMA address in the valid DMA range ?
  647. - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
  648. One can argue this could differ by one byte depending on which register is
  649. updated first, so the implementation below allows for that.
  650. */
  651. static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
  652. {
  653. struct es1938 *chip = snd_pcm_substream_chip(substream);
  654. size_t ptr;
  655. #if 0
  656. size_t old, new;
  657. /* This stuff is *needed*, don't ask why - AB */
  658. old = inw(SLDM_REG(chip, DMACOUNT));
  659. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  660. old = new;
  661. ptr = chip->dma1_size - 1 - new;
  662. #else
  663. size_t count;
  664. unsigned int diff;
  665. ptr = inl(SLDM_REG(chip, DMAADDR));
  666. count = inw(SLDM_REG(chip, DMACOUNT));
  667. diff = chip->dma1_start + chip->dma1_size - ptr - count;
  668. if (diff > 3 || ptr < chip->dma1_start
  669. || ptr >= chip->dma1_start+chip->dma1_size)
  670. ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
  671. else
  672. chip->last_capture_dmaaddr = ptr; /* good, remember it */
  673. ptr -= chip->dma1_start;
  674. #endif
  675. return ptr >> chip->dma1_shift;
  676. }
  677. static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
  678. {
  679. struct es1938 *chip = snd_pcm_substream_chip(substream);
  680. size_t ptr;
  681. #if 1
  682. ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
  683. #else
  684. ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
  685. #endif
  686. return ptr >> chip->dma2_shift;
  687. }
  688. static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
  689. {
  690. struct es1938 *chip = snd_pcm_substream_chip(substream);
  691. size_t ptr;
  692. size_t old, new;
  693. #if 1
  694. /* This stuff is *needed*, don't ask why - AB */
  695. old = inw(SLDM_REG(chip, DMACOUNT));
  696. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  697. old = new;
  698. ptr = chip->dma1_size - 1 - new;
  699. #else
  700. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  701. #endif
  702. return ptr >> chip->dma1_shift;
  703. }
  704. static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
  705. {
  706. switch (substream->number) {
  707. case 0:
  708. return snd_es1938_playback1_pointer(substream);
  709. case 1:
  710. return snd_es1938_playback2_pointer(substream);
  711. }
  712. snd_BUG();
  713. return -EINVAL;
  714. }
  715. static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
  716. int channel, unsigned long pos,
  717. struct iov_iter *dst, unsigned long count)
  718. {
  719. struct snd_pcm_runtime *runtime = substream->runtime;
  720. struct es1938 *chip = snd_pcm_substream_chip(substream);
  721. if (snd_BUG_ON(pos + count > chip->dma1_size))
  722. return -EINVAL;
  723. if (pos + count < chip->dma1_size) {
  724. if (copy_to_iter(runtime->dma_area + pos + 1, count, dst) != count)
  725. return -EFAULT;
  726. } else {
  727. if (copy_to_iter(runtime->dma_area + pos + 1, count - 1, dst) != count - 1)
  728. return -EFAULT;
  729. if (copy_to_iter(runtime->dma_area, 1, dst) != 1)
  730. return -EFAULT;
  731. }
  732. return 0;
  733. }
  734. /* ----------------------------------------------------------------------
  735. * Audio1 Capture (ADC)
  736. * ----------------------------------------------------------------------*/
  737. static const struct snd_pcm_hardware snd_es1938_capture =
  738. {
  739. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  740. SNDRV_PCM_INFO_BLOCK_TRANSFER),
  741. .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  742. SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
  743. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  744. .rate_min = 6000,
  745. .rate_max = 48000,
  746. .channels_min = 1,
  747. .channels_max = 2,
  748. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  749. .period_bytes_min = 64,
  750. .period_bytes_max = 0x8000,
  751. .periods_min = 1,
  752. .periods_max = 1024,
  753. .fifo_size = 256,
  754. };
  755. /* -----------------------------------------------------------------------
  756. * Audio2 Playback (DAC)
  757. * -----------------------------------------------------------------------*/
  758. static const struct snd_pcm_hardware snd_es1938_playback =
  759. {
  760. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  761. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  762. SNDRV_PCM_INFO_MMAP_VALID),
  763. .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  764. SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
  765. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  766. .rate_min = 6000,
  767. .rate_max = 48000,
  768. .channels_min = 1,
  769. .channels_max = 2,
  770. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  771. .period_bytes_min = 64,
  772. .period_bytes_max = 0x8000,
  773. .periods_min = 1,
  774. .periods_max = 1024,
  775. .fifo_size = 256,
  776. };
  777. static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
  778. {
  779. struct es1938 *chip = snd_pcm_substream_chip(substream);
  780. struct snd_pcm_runtime *runtime = substream->runtime;
  781. if (chip->playback2_substream)
  782. return -EAGAIN;
  783. chip->capture_substream = substream;
  784. runtime->hw = snd_es1938_capture;
  785. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  786. &hw_constraints_clocks);
  787. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  788. return 0;
  789. }
  790. static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
  791. {
  792. struct es1938 *chip = snd_pcm_substream_chip(substream);
  793. struct snd_pcm_runtime *runtime = substream->runtime;
  794. switch (substream->number) {
  795. case 0:
  796. chip->playback1_substream = substream;
  797. break;
  798. case 1:
  799. if (chip->capture_substream)
  800. return -EAGAIN;
  801. chip->playback2_substream = substream;
  802. break;
  803. default:
  804. snd_BUG();
  805. return -EINVAL;
  806. }
  807. runtime->hw = snd_es1938_playback;
  808. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  809. &hw_constraints_clocks);
  810. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  811. return 0;
  812. }
  813. static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
  814. {
  815. struct es1938 *chip = snd_pcm_substream_chip(substream);
  816. chip->capture_substream = NULL;
  817. return 0;
  818. }
  819. static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
  820. {
  821. struct es1938 *chip = snd_pcm_substream_chip(substream);
  822. switch (substream->number) {
  823. case 0:
  824. chip->playback1_substream = NULL;
  825. break;
  826. case 1:
  827. chip->playback2_substream = NULL;
  828. break;
  829. default:
  830. snd_BUG();
  831. return -EINVAL;
  832. }
  833. return 0;
  834. }
  835. static const struct snd_pcm_ops snd_es1938_playback_ops = {
  836. .open = snd_es1938_playback_open,
  837. .close = snd_es1938_playback_close,
  838. .prepare = snd_es1938_playback_prepare,
  839. .trigger = snd_es1938_playback_trigger,
  840. .pointer = snd_es1938_playback_pointer,
  841. };
  842. static const struct snd_pcm_ops snd_es1938_capture_ops = {
  843. .open = snd_es1938_capture_open,
  844. .close = snd_es1938_capture_close,
  845. .prepare = snd_es1938_capture_prepare,
  846. .trigger = snd_es1938_capture_trigger,
  847. .pointer = snd_es1938_capture_pointer,
  848. .copy = snd_es1938_capture_copy,
  849. };
  850. static int snd_es1938_new_pcm(struct es1938 *chip, int device)
  851. {
  852. struct snd_pcm *pcm;
  853. int err;
  854. err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
  855. if (err < 0)
  856. return err;
  857. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
  858. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
  859. pcm->private_data = chip;
  860. pcm->info_flags = 0;
  861. strcpy(pcm->name, "ESS Solo-1");
  862. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
  863. &chip->pci->dev, 64*1024, 64*1024);
  864. chip->pcm = pcm;
  865. return 0;
  866. }
  867. /* -------------------------------------------------------------------
  868. *
  869. * *** Mixer part ***
  870. */
  871. static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
  872. struct snd_ctl_elem_info *uinfo)
  873. {
  874. static const char * const texts[8] = {
  875. "Mic", "Mic Master", "CD", "AOUT",
  876. "Mic1", "Mix", "Line", "Master"
  877. };
  878. return snd_ctl_enum_info(uinfo, 1, 8, texts);
  879. }
  880. static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
  881. struct snd_ctl_elem_value *ucontrol)
  882. {
  883. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  884. ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
  885. return 0;
  886. }
  887. static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
  888. struct snd_ctl_elem_value *ucontrol)
  889. {
  890. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  891. unsigned char val = ucontrol->value.enumerated.item[0];
  892. if (val > 7)
  893. return -EINVAL;
  894. return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
  895. }
  896. #define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
  897. static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
  898. struct snd_ctl_elem_value *ucontrol)
  899. {
  900. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  901. unsigned char val = snd_es1938_mixer_read(chip, 0x50);
  902. ucontrol->value.integer.value[0] = !!(val & 8);
  903. return 0;
  904. }
  905. static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
  906. struct snd_ctl_elem_value *ucontrol)
  907. {
  908. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  909. unsigned char oval, nval;
  910. int change;
  911. nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
  912. oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
  913. change = nval != oval;
  914. if (change) {
  915. snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
  916. snd_es1938_mixer_write(chip, 0x50, nval);
  917. }
  918. return change;
  919. }
  920. static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
  921. struct snd_ctl_elem_info *uinfo)
  922. {
  923. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  924. uinfo->count = 2;
  925. uinfo->value.integer.min = 0;
  926. uinfo->value.integer.max = 63;
  927. return 0;
  928. }
  929. static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
  930. struct snd_ctl_elem_value *ucontrol)
  931. {
  932. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  933. ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
  934. ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
  935. return 0;
  936. }
  937. #define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
  938. static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
  939. struct snd_ctl_elem_value *ucontrol)
  940. {
  941. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  942. ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
  943. ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
  944. return 0;
  945. }
  946. static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
  947. {
  948. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  949. chip->master_volume = NULL;
  950. chip->master_switch = NULL;
  951. chip->hw_volume = NULL;
  952. chip->hw_switch = NULL;
  953. }
  954. static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
  955. unsigned char mask, unsigned char val)
  956. {
  957. if (reg < 0xa0)
  958. return snd_es1938_mixer_bits(chip, reg, mask, val);
  959. else
  960. return snd_es1938_bits(chip, reg, mask, val);
  961. }
  962. static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
  963. {
  964. if (reg < 0xa0)
  965. return snd_es1938_mixer_read(chip, reg);
  966. else
  967. return snd_es1938_read(chip, reg);
  968. }
  969. #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
  970. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  971. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
  972. .name = xname, .index = xindex, \
  973. .info = snd_es1938_info_single, \
  974. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  975. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  976. .tlv = { .p = xtlv } }
  977. #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
  978. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  979. .info = snd_es1938_info_single, \
  980. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  981. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  982. static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
  983. struct snd_ctl_elem_info *uinfo)
  984. {
  985. int mask = (kcontrol->private_value >> 16) & 0xff;
  986. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  987. uinfo->count = 1;
  988. uinfo->value.integer.min = 0;
  989. uinfo->value.integer.max = mask;
  990. return 0;
  991. }
  992. static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
  993. struct snd_ctl_elem_value *ucontrol)
  994. {
  995. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  996. int reg = kcontrol->private_value & 0xff;
  997. int shift = (kcontrol->private_value >> 8) & 0xff;
  998. int mask = (kcontrol->private_value >> 16) & 0xff;
  999. int invert = (kcontrol->private_value >> 24) & 0xff;
  1000. int val;
  1001. val = snd_es1938_reg_read(chip, reg);
  1002. ucontrol->value.integer.value[0] = (val >> shift) & mask;
  1003. if (invert)
  1004. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1005. return 0;
  1006. }
  1007. static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
  1008. struct snd_ctl_elem_value *ucontrol)
  1009. {
  1010. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1011. int reg = kcontrol->private_value & 0xff;
  1012. int shift = (kcontrol->private_value >> 8) & 0xff;
  1013. int mask = (kcontrol->private_value >> 16) & 0xff;
  1014. int invert = (kcontrol->private_value >> 24) & 0xff;
  1015. unsigned char val;
  1016. val = (ucontrol->value.integer.value[0] & mask);
  1017. if (invert)
  1018. val = mask - val;
  1019. mask <<= shift;
  1020. val <<= shift;
  1021. return snd_es1938_reg_bits(chip, reg, mask, val) != val;
  1022. }
  1023. #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
  1024. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1025. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
  1026. .name = xname, .index = xindex, \
  1027. .info = snd_es1938_info_double, \
  1028. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1029. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
  1030. .tlv = { .p = xtlv } }
  1031. #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  1032. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1033. .info = snd_es1938_info_double, \
  1034. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1035. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  1036. static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
  1037. struct snd_ctl_elem_info *uinfo)
  1038. {
  1039. int mask = (kcontrol->private_value >> 24) & 0xff;
  1040. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1041. uinfo->count = 2;
  1042. uinfo->value.integer.min = 0;
  1043. uinfo->value.integer.max = mask;
  1044. return 0;
  1045. }
  1046. static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
  1047. struct snd_ctl_elem_value *ucontrol)
  1048. {
  1049. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1050. int left_reg = kcontrol->private_value & 0xff;
  1051. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1052. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1053. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1054. int mask = (kcontrol->private_value >> 24) & 0xff;
  1055. int invert = (kcontrol->private_value >> 22) & 1;
  1056. unsigned char left, right;
  1057. left = snd_es1938_reg_read(chip, left_reg);
  1058. if (left_reg != right_reg)
  1059. right = snd_es1938_reg_read(chip, right_reg);
  1060. else
  1061. right = left;
  1062. ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
  1063. ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
  1064. if (invert) {
  1065. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1066. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  1067. }
  1068. return 0;
  1069. }
  1070. static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
  1071. struct snd_ctl_elem_value *ucontrol)
  1072. {
  1073. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1074. int left_reg = kcontrol->private_value & 0xff;
  1075. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1076. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1077. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1078. int mask = (kcontrol->private_value >> 24) & 0xff;
  1079. int invert = (kcontrol->private_value >> 22) & 1;
  1080. int change;
  1081. unsigned char val1, val2, mask1, mask2;
  1082. val1 = ucontrol->value.integer.value[0] & mask;
  1083. val2 = ucontrol->value.integer.value[1] & mask;
  1084. if (invert) {
  1085. val1 = mask - val1;
  1086. val2 = mask - val2;
  1087. }
  1088. val1 <<= shift_left;
  1089. val2 <<= shift_right;
  1090. mask1 = mask << shift_left;
  1091. mask2 = mask << shift_right;
  1092. if (left_reg != right_reg) {
  1093. change = 0;
  1094. if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
  1095. change = 1;
  1096. if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
  1097. change = 1;
  1098. } else {
  1099. change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
  1100. val1 | val2) != (val1 | val2));
  1101. }
  1102. return change;
  1103. }
  1104. static const DECLARE_TLV_DB_RANGE(db_scale_master,
  1105. 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
  1106. 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
  1107. );
  1108. static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
  1109. 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
  1110. 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
  1111. );
  1112. static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
  1113. 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
  1114. 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
  1115. );
  1116. static const DECLARE_TLV_DB_RANGE(db_scale_mic,
  1117. 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
  1118. 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
  1119. );
  1120. static const DECLARE_TLV_DB_RANGE(db_scale_line,
  1121. 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
  1122. 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
  1123. );
  1124. static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
  1125. static const struct snd_kcontrol_new snd_es1938_controls[] = {
  1126. ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
  1127. db_scale_master),
  1128. ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
  1129. {
  1130. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1131. .name = "Hardware Master Playback Volume",
  1132. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1133. .info = snd_es1938_info_hw_volume,
  1134. .get = snd_es1938_get_hw_volume,
  1135. },
  1136. {
  1137. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1138. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  1139. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1140. .name = "Hardware Master Playback Switch",
  1141. .info = snd_es1938_info_hw_switch,
  1142. .get = snd_es1938_get_hw_switch,
  1143. .tlv = { .p = db_scale_master },
  1144. },
  1145. ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
  1146. ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
  1147. db_scale_line),
  1148. ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
  1149. ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
  1150. db_scale_mic),
  1151. ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
  1152. db_scale_line),
  1153. ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
  1154. db_scale_mic),
  1155. ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
  1156. db_scale_line),
  1157. ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
  1158. db_scale_capture),
  1159. ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
  1160. ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
  1161. ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
  1162. {
  1163. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1164. .name = "Capture Source",
  1165. .info = snd_es1938_info_mux,
  1166. .get = snd_es1938_get_mux,
  1167. .put = snd_es1938_put_mux,
  1168. },
  1169. ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
  1170. db_scale_line),
  1171. ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
  1172. db_scale_audio2),
  1173. ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
  1174. db_scale_mic),
  1175. ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
  1176. db_scale_line),
  1177. ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
  1178. db_scale_mic),
  1179. ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
  1180. db_scale_line),
  1181. ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
  1182. db_scale_line),
  1183. ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
  1184. db_scale_line),
  1185. ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
  1186. db_scale_audio2),
  1187. ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
  1188. db_scale_audio1),
  1189. ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
  1190. {
  1191. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1192. .name = "3D Control - Switch",
  1193. .info = snd_es1938_info_spatializer_enable,
  1194. .get = snd_es1938_get_spatializer_enable,
  1195. .put = snd_es1938_put_spatializer_enable,
  1196. },
  1197. ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
  1198. };
  1199. /* ---------------------------------------------------------------------------- */
  1200. /* ---------------------------------------------------------------------------- */
  1201. /*
  1202. * initialize the chip - used by resume callback, too
  1203. */
  1204. static void snd_es1938_chip_init(struct es1938 *chip)
  1205. {
  1206. /* reset chip */
  1207. snd_es1938_reset(chip);
  1208. /* configure native mode */
  1209. /* enable bus master */
  1210. pci_set_master(chip->pci);
  1211. /* disable legacy audio */
  1212. pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
  1213. /* set DDMA base */
  1214. pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
  1215. /* set DMA/IRQ policy */
  1216. pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
  1217. /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
  1218. outb(0xf0, SLIO_REG(chip, IRQCONTROL));
  1219. /* reset DMA */
  1220. outb(0, SLDM_REG(chip, DMACLEAR));
  1221. }
  1222. /*
  1223. * PM support
  1224. */
  1225. static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
  1226. 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
  1227. 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
  1228. 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
  1229. 0xa8, 0xb4,
  1230. };
  1231. static int es1938_suspend(struct device *dev)
  1232. {
  1233. struct snd_card *card = dev_get_drvdata(dev);
  1234. struct es1938 *chip = card->private_data;
  1235. const unsigned char *s;
  1236. unsigned char *d;
  1237. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1238. /* save mixer-related registers */
  1239. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
  1240. *d = snd_es1938_reg_read(chip, *s);
  1241. outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
  1242. if (chip->irq >= 0) {
  1243. free_irq(chip->irq, chip);
  1244. chip->irq = -1;
  1245. card->sync_irq = -1;
  1246. }
  1247. return 0;
  1248. }
  1249. static int es1938_resume(struct device *dev)
  1250. {
  1251. struct pci_dev *pci = to_pci_dev(dev);
  1252. struct snd_card *card = dev_get_drvdata(dev);
  1253. struct es1938 *chip = card->private_data;
  1254. const unsigned char *s;
  1255. unsigned char *d;
  1256. if (request_irq(pci->irq, snd_es1938_interrupt,
  1257. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1258. dev_err(dev, "unable to grab IRQ %d, disabling device\n",
  1259. pci->irq);
  1260. snd_card_disconnect(card);
  1261. return -EIO;
  1262. }
  1263. chip->irq = pci->irq;
  1264. card->sync_irq = chip->irq;
  1265. snd_es1938_chip_init(chip);
  1266. /* restore mixer-related registers */
  1267. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
  1268. if (*s < 0xa0)
  1269. snd_es1938_mixer_write(chip, *s, *d);
  1270. else
  1271. snd_es1938_write(chip, *s, *d);
  1272. }
  1273. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1274. return 0;
  1275. }
  1276. static DEFINE_SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
  1277. #ifdef SUPPORT_JOYSTICK
  1278. static int snd_es1938_create_gameport(struct es1938 *chip)
  1279. {
  1280. struct gameport *gp;
  1281. chip->gameport = gp = gameport_allocate_port();
  1282. if (!gp) {
  1283. dev_err(chip->card->dev,
  1284. "cannot allocate memory for gameport\n");
  1285. return -ENOMEM;
  1286. }
  1287. gameport_set_name(gp, "ES1938");
  1288. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1289. gameport_set_dev_parent(gp, &chip->pci->dev);
  1290. gp->io = chip->game_port;
  1291. gameport_register_port(gp);
  1292. return 0;
  1293. }
  1294. static void snd_es1938_free_gameport(struct es1938 *chip)
  1295. {
  1296. if (chip->gameport) {
  1297. gameport_unregister_port(chip->gameport);
  1298. chip->gameport = NULL;
  1299. }
  1300. }
  1301. #else
  1302. static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
  1303. static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
  1304. #endif /* SUPPORT_JOYSTICK */
  1305. static void snd_es1938_free(struct snd_card *card)
  1306. {
  1307. struct es1938 *chip = card->private_data;
  1308. /* disable irqs */
  1309. outb(0x00, SLIO_REG(chip, IRQCONTROL));
  1310. if (chip->rmidi)
  1311. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
  1312. snd_es1938_free_gameport(chip);
  1313. if (chip->irq >= 0)
  1314. free_irq(chip->irq, chip);
  1315. }
  1316. static int snd_es1938_create(struct snd_card *card,
  1317. struct pci_dev *pci)
  1318. {
  1319. struct es1938 *chip = card->private_data;
  1320. int err;
  1321. /* enable PCI device */
  1322. err = pcim_enable_device(pci);
  1323. if (err < 0)
  1324. return err;
  1325. /* check, if we can restrict PCI DMA transfers to 24 bits */
  1326. if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
  1327. dev_err(card->dev,
  1328. "architecture does not support 24bit PCI busmaster DMA\n");
  1329. return -ENXIO;
  1330. }
  1331. spin_lock_init(&chip->reg_lock);
  1332. spin_lock_init(&chip->mixer_lock);
  1333. chip->card = card;
  1334. chip->pci = pci;
  1335. chip->irq = -1;
  1336. err = pci_request_regions(pci, "ESS Solo-1");
  1337. if (err < 0)
  1338. return err;
  1339. chip->io_port = pci_resource_start(pci, 0);
  1340. chip->sb_port = pci_resource_start(pci, 1);
  1341. chip->vc_port = pci_resource_start(pci, 2);
  1342. chip->mpu_port = pci_resource_start(pci, 3);
  1343. chip->game_port = pci_resource_start(pci, 4);
  1344. /* still use non-managed irq handler as it's re-acquired at PM resume */
  1345. if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
  1346. KBUILD_MODNAME, chip)) {
  1347. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  1348. return -EBUSY;
  1349. }
  1350. chip->irq = pci->irq;
  1351. card->sync_irq = chip->irq;
  1352. card->private_free = snd_es1938_free;
  1353. dev_dbg(card->dev,
  1354. "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
  1355. chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
  1356. chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
  1357. snd_es1938_chip_init(chip);
  1358. return 0;
  1359. }
  1360. /* --------------------------------------------------------------------
  1361. * Interrupt handler
  1362. * -------------------------------------------------------------------- */
  1363. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
  1364. {
  1365. struct es1938 *chip = dev_id;
  1366. unsigned char status;
  1367. __always_unused unsigned char audiostatus;
  1368. int handled = 0;
  1369. status = inb(SLIO_REG(chip, IRQCONTROL));
  1370. #if 0
  1371. dev_dbg(chip->card->dev,
  1372. "Es1938debug - interrupt status: =0x%x\n", status);
  1373. #endif
  1374. /* AUDIO 1 */
  1375. if (status & 0x10) {
  1376. #if 0
  1377. dev_dbg(chip->card->dev,
  1378. "Es1938debug - AUDIO channel 1 interrupt\n");
  1379. dev_dbg(chip->card->dev,
  1380. "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
  1381. inw(SLDM_REG(chip, DMACOUNT)));
  1382. dev_dbg(chip->card->dev,
  1383. "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
  1384. inl(SLDM_REG(chip, DMAADDR)));
  1385. dev_dbg(chip->card->dev,
  1386. "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
  1387. inl(SLDM_REG(chip, DMASTATUS)));
  1388. #endif
  1389. /* clear irq */
  1390. handled = 1;
  1391. audiostatus = inb(SLSB_REG(chip, STATUS));
  1392. if (chip->active & ADC1)
  1393. snd_pcm_period_elapsed(chip->capture_substream);
  1394. else if (chip->active & DAC1)
  1395. snd_pcm_period_elapsed(chip->playback2_substream);
  1396. }
  1397. /* AUDIO 2 */
  1398. if (status & 0x20) {
  1399. #if 0
  1400. dev_dbg(chip->card->dev,
  1401. "Es1938debug - AUDIO channel 2 interrupt\n");
  1402. dev_dbg(chip->card->dev,
  1403. "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
  1404. inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
  1405. dev_dbg(chip->card->dev,
  1406. "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
  1407. inl(SLIO_REG(chip, AUDIO2DMAADDR)));
  1408. #endif
  1409. /* clear irq */
  1410. handled = 1;
  1411. snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
  1412. if (chip->active & DAC2)
  1413. snd_pcm_period_elapsed(chip->playback1_substream);
  1414. }
  1415. /* Hardware volume */
  1416. if (status & 0x40) {
  1417. int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
  1418. handled = 1;
  1419. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
  1420. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
  1421. if (!split) {
  1422. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  1423. &chip->master_switch->id);
  1424. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  1425. &chip->master_volume->id);
  1426. }
  1427. /* ack interrupt */
  1428. snd_es1938_mixer_write(chip, 0x66, 0x00);
  1429. }
  1430. /* MPU401 */
  1431. if (status & 0x80) {
  1432. // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
  1433. // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
  1434. // andreas@flying-snail.de
  1435. // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
  1436. if (chip->rmidi) {
  1437. handled = 1;
  1438. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  1439. }
  1440. }
  1441. return IRQ_RETVAL(handled);
  1442. }
  1443. #define ES1938_DMA_SIZE 64
  1444. static int snd_es1938_mixer(struct es1938 *chip)
  1445. {
  1446. struct snd_card *card;
  1447. unsigned int idx;
  1448. int err;
  1449. card = chip->card;
  1450. strcpy(card->mixername, "ESS Solo-1");
  1451. for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
  1452. struct snd_kcontrol *kctl;
  1453. kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
  1454. switch (idx) {
  1455. case 0:
  1456. chip->master_volume = kctl;
  1457. kctl->private_free = snd_es1938_hwv_free;
  1458. break;
  1459. case 1:
  1460. chip->master_switch = kctl;
  1461. kctl->private_free = snd_es1938_hwv_free;
  1462. break;
  1463. case 2:
  1464. chip->hw_volume = kctl;
  1465. kctl->private_free = snd_es1938_hwv_free;
  1466. break;
  1467. case 3:
  1468. chip->hw_switch = kctl;
  1469. kctl->private_free = snd_es1938_hwv_free;
  1470. break;
  1471. }
  1472. err = snd_ctl_add(card, kctl);
  1473. if (err < 0)
  1474. return err;
  1475. }
  1476. return 0;
  1477. }
  1478. static int __snd_es1938_probe(struct pci_dev *pci,
  1479. const struct pci_device_id *pci_id)
  1480. {
  1481. static int dev;
  1482. struct snd_card *card;
  1483. struct es1938 *chip;
  1484. struct snd_opl3 *opl3;
  1485. int idx, err;
  1486. if (dev >= SNDRV_CARDS)
  1487. return -ENODEV;
  1488. if (!enable[dev]) {
  1489. dev++;
  1490. return -ENOENT;
  1491. }
  1492. err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1493. sizeof(*chip), &card);
  1494. if (err < 0)
  1495. return err;
  1496. chip = card->private_data;
  1497. for (idx = 0; idx < 5; idx++)
  1498. if (pci_resource_start(pci, idx) == 0 ||
  1499. !(pci_resource_flags(pci, idx) & IORESOURCE_IO))
  1500. return -ENODEV;
  1501. err = snd_es1938_create(card, pci);
  1502. if (err < 0)
  1503. return err;
  1504. strcpy(card->driver, "ES1938");
  1505. strcpy(card->shortname, "ESS ES1938 (Solo-1)");
  1506. sprintf(card->longname, "%s rev %i, irq %i",
  1507. card->shortname,
  1508. chip->revision,
  1509. chip->irq);
  1510. err = snd_es1938_new_pcm(chip, 0);
  1511. if (err < 0)
  1512. return err;
  1513. err = snd_es1938_mixer(chip);
  1514. if (err < 0)
  1515. return err;
  1516. if (snd_opl3_create(card,
  1517. SLSB_REG(chip, FMLOWADDR),
  1518. SLSB_REG(chip, FMHIGHADDR),
  1519. OPL3_HW_OPL3, 1, &opl3) < 0) {
  1520. dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
  1521. SLSB_REG(chip, FMLOWADDR));
  1522. } else {
  1523. err = snd_opl3_timer_new(opl3, 0, 1);
  1524. if (err < 0)
  1525. return err;
  1526. err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
  1527. if (err < 0)
  1528. return err;
  1529. }
  1530. if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
  1531. chip->mpu_port,
  1532. MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
  1533. -1, &chip->rmidi) < 0) {
  1534. dev_err(card->dev, "unable to initialize MPU-401\n");
  1535. } else {
  1536. // this line is vital for MIDI interrupt handling on ess-solo1
  1537. // andreas@flying-snail.de
  1538. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
  1539. }
  1540. snd_es1938_create_gameport(chip);
  1541. err = snd_card_register(card);
  1542. if (err < 0)
  1543. return err;
  1544. pci_set_drvdata(pci, card);
  1545. dev++;
  1546. return 0;
  1547. }
  1548. static int snd_es1938_probe(struct pci_dev *pci,
  1549. const struct pci_device_id *pci_id)
  1550. {
  1551. return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
  1552. }
  1553. static struct pci_driver es1938_driver = {
  1554. .name = KBUILD_MODNAME,
  1555. .id_table = snd_es1938_ids,
  1556. .probe = snd_es1938_probe,
  1557. .driver = {
  1558. .pm = &es1938_pm,
  1559. },
  1560. };
  1561. module_pci_driver(es1938_driver);