lx_core.h 5.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /* -*- linux-c -*- *
  3. *
  4. * ALSA driver for the digigram lx6464es interface
  5. * low-level interface
  6. *
  7. * Copyright (c) 2009 Tim Blechmann <tim@klingt.org>
  8. */
  9. #ifndef LX_CORE_H
  10. #define LX_CORE_H
  11. #include <linux/interrupt.h>
  12. #include "lx_defs.h"
  13. #define REG_CRM_NUMBER 12
  14. struct lx6464es;
  15. /* low-level register access */
  16. /* dsp register access */
  17. enum {
  18. eReg_BASE,
  19. eReg_CSM,
  20. eReg_CRM1,
  21. eReg_CRM2,
  22. eReg_CRM3,
  23. eReg_CRM4,
  24. eReg_CRM5,
  25. eReg_CRM6,
  26. eReg_CRM7,
  27. eReg_CRM8,
  28. eReg_CRM9,
  29. eReg_CRM10,
  30. eReg_CRM11,
  31. eReg_CRM12,
  32. eReg_ICR,
  33. eReg_CVR,
  34. eReg_ISR,
  35. eReg_RXHTXH,
  36. eReg_RXMTXM,
  37. eReg_RHLTXL,
  38. eReg_RESETDSP,
  39. eReg_CSUF,
  40. eReg_CSES,
  41. eReg_CRESMSB,
  42. eReg_CRESLSB,
  43. eReg_ADMACESMSB,
  44. eReg_ADMACESLSB,
  45. eReg_CONFES,
  46. eMaxPortLx
  47. };
  48. unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port);
  49. void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data);
  50. /* plx register access */
  51. enum {
  52. ePLX_PCICR,
  53. ePLX_MBOX0,
  54. ePLX_MBOX1,
  55. ePLX_MBOX2,
  56. ePLX_MBOX3,
  57. ePLX_MBOX4,
  58. ePLX_MBOX5,
  59. ePLX_MBOX6,
  60. ePLX_MBOX7,
  61. ePLX_L2PCIDB,
  62. ePLX_IRQCS,
  63. ePLX_CHIPSC,
  64. eMaxPort
  65. };
  66. unsigned long lx_plx_reg_read(struct lx6464es *chip, int port);
  67. void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data);
  68. /* rhm */
  69. struct lx_rmh {
  70. u16 cmd_len; /* length of the command to send (WORDs) */
  71. u16 stat_len; /* length of the status received (WORDs) */
  72. u16 dsp_stat; /* status type, RMP_SSIZE_XXX */
  73. u16 cmd_idx; /* index of the command */
  74. u32 cmd[REG_CRM_NUMBER];
  75. u32 stat[REG_CRM_NUMBER];
  76. };
  77. /* low-level dsp access */
  78. int lx_dsp_get_version(struct lx6464es *chip, u32 *rdsp_version);
  79. int lx_dsp_get_clock_frequency(struct lx6464es *chip, u32 *rfreq);
  80. int lx_dsp_set_granularity(struct lx6464es *chip, u32 gran);
  81. int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data);
  82. int lx_dsp_get_mac(struct lx6464es *chip);
  83. /* low-level pipe handling */
  84. int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture,
  85. int channels);
  86. int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture);
  87. int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture,
  88. u64 *rsample_count);
  89. int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate);
  90. int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture);
  91. int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture);
  92. int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture);
  93. int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture);
  94. int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture);
  95. /* low-level stream handling */
  96. int lx_stream_set_format(struct lx6464es *chip, struct snd_pcm_runtime *runtime,
  97. u32 pipe, int is_capture);
  98. int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture,
  99. int *rstate);
  100. int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture,
  101. u64 *r_bytepos);
  102. int lx_stream_set_state(struct lx6464es *chip, u32 pipe,
  103. int is_capture, enum stream_state_t state);
  104. static inline int lx_stream_start(struct lx6464es *chip, u32 pipe,
  105. int is_capture)
  106. {
  107. return lx_stream_set_state(chip, pipe, is_capture, SSTATE_RUN);
  108. }
  109. static inline int lx_stream_pause(struct lx6464es *chip, u32 pipe,
  110. int is_capture)
  111. {
  112. return lx_stream_set_state(chip, pipe, is_capture, SSTATE_PAUSE);
  113. }
  114. static inline int lx_stream_stop(struct lx6464es *chip, u32 pipe,
  115. int is_capture)
  116. {
  117. return lx_stream_set_state(chip, pipe, is_capture, SSTATE_STOP);
  118. }
  119. /* low-level buffer handling */
  120. int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture,
  121. u32 *r_needed, u32 *r_freed, u32 *size_array);
  122. int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture,
  123. u32 buffer_size, u32 buf_address_lo, u32 buf_address_hi,
  124. u32 *r_buffer_index);
  125. int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture,
  126. u32 *r_buffer_size);
  127. int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture,
  128. u32 buffer_index);
  129. /* low-level gain/peak handling */
  130. int lx_level_unmute(struct lx6464es *chip, int is_capture, int unmute);
  131. int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels,
  132. u32 *r_levels);
  133. /* interrupt handling */
  134. irqreturn_t lx_interrupt(int irq, void *dev_id);
  135. irqreturn_t lx_threaded_irq(int irq, void *dev_id);
  136. void lx_irq_enable(struct lx6464es *chip);
  137. void lx_irq_disable(struct lx6464es *chip);
  138. /* Stream Format Header Defines (for LIN and IEEE754) */
  139. #define HEADER_FMT_BASE HEADER_FMT_BASE_LIN
  140. #define HEADER_FMT_BASE_LIN 0xFED00000
  141. #define HEADER_FMT_BASE_FLOAT 0xFAD00000
  142. #define HEADER_FMT_MONO 0x00000080 /* bit 23 in header_lo. WARNING: old
  143. * bit 22 is ignored in float
  144. * format */
  145. #define HEADER_FMT_INTEL 0x00008000
  146. #define HEADER_FMT_16BITS 0x00002000
  147. #define HEADER_FMT_24BITS 0x00004000
  148. #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.
  149. * */
  150. #define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less
  151. * then 32k.*/
  152. #define BIT_FMP_HEADER 23
  153. #define BIT_FMP_SD 22
  154. #define BIT_FMP_MULTICHANNEL 19
  155. #define START_STATE 1
  156. #define PAUSE_STATE 0
  157. /* from PcxAll_e.h */
  158. /* Start/Pause condition for pipes (PCXStartPipe, PCXPausePipe) */
  159. #define START_PAUSE_IMMEDIATE 0
  160. #define START_PAUSE_ON_SYNCHRO 1
  161. #define START_PAUSE_ON_TIME_CODE 2
  162. /* Pipe / Stream state */
  163. #define START_STATE 1
  164. #define PAUSE_STATE 0
  165. static inline void unpack_pointer(dma_addr_t ptr, u32 *r_low, u32 *r_high)
  166. {
  167. *r_low = (u32)(ptr & 0xffffffff);
  168. #if BITS_PER_LONG == 32
  169. *r_high = 0;
  170. #else
  171. *r_high = (u32)((u64)ptr>>32);
  172. #endif
  173. }
  174. #endif /* LX_CORE_H */