riptide.c 61 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for the Conexant Riptide Soundchip
  4. *
  5. * Copyright (c) 2004 Peter Gruber <nokos@gmx.net>
  6. */
  7. /*
  8. History:
  9. - 02/15/2004 first release
  10. This Driver is based on the OSS Driver version from Linuxant (riptide-0.6lnxtbeta03111100)
  11. credits from the original files:
  12. MODULE NAME: cnxt_rt.h
  13. AUTHOR: K. Lazarev (Transcribed by KNL)
  14. HISTORY: Major Revision Date By
  15. ----------------------------- -------- -----
  16. Created 02/1/2000 KNL
  17. MODULE NAME: int_mdl.c
  18. AUTHOR: Konstantin Lazarev (Transcribed by KNL)
  19. HISTORY: Major Revision Date By
  20. ----------------------------- -------- -----
  21. Created 10/01/99 KNL
  22. MODULE NAME: riptide.h
  23. AUTHOR: O. Druzhinin (Transcribed by OLD)
  24. HISTORY: Major Revision Date By
  25. ----------------------------- -------- -----
  26. Created 10/16/97 OLD
  27. MODULE NAME: Rp_Cmdif.cpp
  28. AUTHOR: O. Druzhinin (Transcribed by OLD)
  29. K. Lazarev (Transcribed by KNL)
  30. HISTORY: Major Revision Date By
  31. ----------------------------- -------- -----
  32. Adopted from NT4 driver 6/22/99 OLD
  33. Ported to Linux 9/01/99 KNL
  34. MODULE NAME: rt_hw.c
  35. AUTHOR: O. Druzhinin (Transcribed by OLD)
  36. C. Lazarev (Transcribed by CNL)
  37. HISTORY: Major Revision Date By
  38. ----------------------------- -------- -----
  39. Created 11/18/97 OLD
  40. Hardware functions for RipTide 11/24/97 CNL
  41. (ES1) are coded
  42. Hardware functions for RipTide 12/24/97 CNL
  43. (A0) are coded
  44. Hardware functions for RipTide 03/20/98 CNL
  45. (A1) are coded
  46. Boot loader is included 05/07/98 CNL
  47. Redesigned for WDM 07/27/98 CNL
  48. Redesigned for Linux 09/01/99 CNL
  49. MODULE NAME: rt_hw.h
  50. AUTHOR: C. Lazarev (Transcribed by CNL)
  51. HISTORY: Major Revision Date By
  52. ----------------------------- -------- -----
  53. Created 11/18/97 CNL
  54. MODULE NAME: rt_mdl.c
  55. AUTHOR: Konstantin Lazarev (Transcribed by KNL)
  56. HISTORY: Major Revision Date By
  57. ----------------------------- -------- -----
  58. Created 10/01/99 KNL
  59. MODULE NAME: mixer.h
  60. AUTHOR: K. Kenney
  61. HISTORY: Major Revision Date By
  62. ----------------------------- -------- -----
  63. Created from MS W95 Sample 11/28/95 KRS
  64. RipTide 10/15/97 KRS
  65. Adopted for Windows NT driver 01/20/98 CNL
  66. */
  67. #include <linux/delay.h>
  68. #include <linux/init.h>
  69. #include <linux/interrupt.h>
  70. #include <linux/pci.h>
  71. #include <linux/slab.h>
  72. #include <linux/wait.h>
  73. #include <linux/gameport.h>
  74. #include <linux/device.h>
  75. #include <linux/firmware.h>
  76. #include <linux/kernel.h>
  77. #include <linux/module.h>
  78. #include <linux/io.h>
  79. #include <sound/core.h>
  80. #include <sound/info.h>
  81. #include <sound/control.h>
  82. #include <sound/pcm.h>
  83. #include <sound/pcm_params.h>
  84. #include <sound/ac97_codec.h>
  85. #include <sound/mpu401.h>
  86. #include <sound/opl3.h>
  87. #include <sound/initval.h>
  88. #if IS_REACHABLE(CONFIG_GAMEPORT)
  89. #define SUPPORT_JOYSTICK 1
  90. #endif
  91. MODULE_AUTHOR("Peter Gruber <nokos@gmx.net>");
  92. MODULE_DESCRIPTION("riptide");
  93. MODULE_LICENSE("GPL");
  94. MODULE_FIRMWARE("riptide.hex");
  95. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  96. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  97. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE;
  98. #ifdef SUPPORT_JOYSTICK
  99. static int joystick_port[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS - 1)] = 0x200 };
  100. #endif
  101. static int mpu_port[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS - 1)] = 0x330 };
  102. static int opl3_port[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS - 1)] = 0x388 };
  103. module_param_array(index, int, NULL, 0444);
  104. MODULE_PARM_DESC(index, "Index value for Riptide soundcard.");
  105. module_param_array(id, charp, NULL, 0444);
  106. MODULE_PARM_DESC(id, "ID string for Riptide soundcard.");
  107. module_param_array(enable, bool, NULL, 0444);
  108. MODULE_PARM_DESC(enable, "Enable Riptide soundcard.");
  109. #ifdef SUPPORT_JOYSTICK
  110. module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
  111. MODULE_PARM_DESC(joystick_port, "Joystick port # for Riptide soundcard.");
  112. #endif
  113. module_param_hw_array(mpu_port, int, ioport, NULL, 0444);
  114. MODULE_PARM_DESC(mpu_port, "MPU401 port # for Riptide driver.");
  115. module_param_hw_array(opl3_port, int, ioport, NULL, 0444);
  116. MODULE_PARM_DESC(opl3_port, "OPL3 port # for Riptide driver.");
  117. /*
  118. */
  119. #define MPU401_HW_RIPTIDE MPU401_HW_MPU401
  120. #define OPL3_HW_RIPTIDE OPL3_HW_OPL3
  121. #define PCI_EXT_CapId 0x40
  122. #define PCI_EXT_NextCapPrt 0x41
  123. #define PCI_EXT_PWMC 0x42
  124. #define PCI_EXT_PWSCR 0x44
  125. #define PCI_EXT_Data00 0x46
  126. #define PCI_EXT_PMSCR_BSE 0x47
  127. #define PCI_EXT_SB_Base 0x48
  128. #define PCI_EXT_FM_Base 0x4a
  129. #define PCI_EXT_MPU_Base 0x4C
  130. #define PCI_EXT_Game_Base 0x4E
  131. #define PCI_EXT_Legacy_Mask 0x50
  132. #define PCI_EXT_AsicRev 0x52
  133. #define PCI_EXT_Reserved3 0x53
  134. #define LEGACY_ENABLE_ALL 0x8000 /* legacy device options */
  135. #define LEGACY_ENABLE_SB 0x4000
  136. #define LEGACY_ENABLE_FM 0x2000
  137. #define LEGACY_ENABLE_MPU_INT 0x1000
  138. #define LEGACY_ENABLE_MPU 0x0800
  139. #define LEGACY_ENABLE_GAMEPORT 0x0400
  140. #define MAX_WRITE_RETRY 10 /* cmd interface limits */
  141. #define MAX_ERROR_COUNT 10
  142. #define CMDIF_TIMEOUT 50000
  143. #define RESET_TRIES 5
  144. #define READ_PORT_ULONG(p) inl((unsigned long)&(p))
  145. #define WRITE_PORT_ULONG(p,x) outl(x,(unsigned long)&(p))
  146. #define READ_AUDIO_CONTROL(p) READ_PORT_ULONG(p->audio_control)
  147. #define WRITE_AUDIO_CONTROL(p,x) WRITE_PORT_ULONG(p->audio_control,x)
  148. #define UMASK_AUDIO_CONTROL(p,x) WRITE_PORT_ULONG(p->audio_control,READ_PORT_ULONG(p->audio_control)|x)
  149. #define MASK_AUDIO_CONTROL(p,x) WRITE_PORT_ULONG(p->audio_control,READ_PORT_ULONG(p->audio_control)&x)
  150. #define READ_AUDIO_STATUS(p) READ_PORT_ULONG(p->audio_status)
  151. #define SET_GRESET(p) UMASK_AUDIO_CONTROL(p,0x0001) /* global reset switch */
  152. #define UNSET_GRESET(p) MASK_AUDIO_CONTROL(p,~0x0001)
  153. #define SET_AIE(p) UMASK_AUDIO_CONTROL(p,0x0004) /* interrupt enable */
  154. #define UNSET_AIE(p) MASK_AUDIO_CONTROL(p,~0x0004)
  155. #define SET_AIACK(p) UMASK_AUDIO_CONTROL(p,0x0008) /* interrupt acknowledge */
  156. #define UNSET_AIACKT(p) MASKAUDIO_CONTROL(p,~0x0008)
  157. #define SET_ECMDAE(p) UMASK_AUDIO_CONTROL(p,0x0010)
  158. #define UNSET_ECMDAE(p) MASK_AUDIO_CONTROL(p,~0x0010)
  159. #define SET_ECMDBE(p) UMASK_AUDIO_CONTROL(p,0x0020)
  160. #define UNSET_ECMDBE(p) MASK_AUDIO_CONTROL(p,~0x0020)
  161. #define SET_EDATAF(p) UMASK_AUDIO_CONTROL(p,0x0040)
  162. #define UNSET_EDATAF(p) MASK_AUDIO_CONTROL(p,~0x0040)
  163. #define SET_EDATBF(p) UMASK_AUDIO_CONTROL(p,0x0080)
  164. #define UNSET_EDATBF(p) MASK_AUDIO_CONTROL(p,~0x0080)
  165. #define SET_ESBIRQON(p) UMASK_AUDIO_CONTROL(p,0x0100)
  166. #define UNSET_ESBIRQON(p) MASK_AUDIO_CONTROL(p,~0x0100)
  167. #define SET_EMPUIRQ(p) UMASK_AUDIO_CONTROL(p,0x0200)
  168. #define UNSET_EMPUIRQ(p) MASK_AUDIO_CONTROL(p,~0x0200)
  169. #define IS_CMDE(a) (READ_PORT_ULONG(a->stat)&0x1) /* cmd empty */
  170. #define IS_DATF(a) (READ_PORT_ULONG(a->stat)&0x2) /* data filled */
  171. #define IS_READY(p) (READ_AUDIO_STATUS(p)&0x0001)
  172. #define IS_DLREADY(p) (READ_AUDIO_STATUS(p)&0x0002)
  173. #define IS_DLERR(p) (READ_AUDIO_STATUS(p)&0x0004)
  174. #define IS_GERR(p) (READ_AUDIO_STATUS(p)&0x0008) /* error ! */
  175. #define IS_CMDAEIRQ(p) (READ_AUDIO_STATUS(p)&0x0010)
  176. #define IS_CMDBEIRQ(p) (READ_AUDIO_STATUS(p)&0x0020)
  177. #define IS_DATAFIRQ(p) (READ_AUDIO_STATUS(p)&0x0040)
  178. #define IS_DATBFIRQ(p) (READ_AUDIO_STATUS(p)&0x0080)
  179. #define IS_EOBIRQ(p) (READ_AUDIO_STATUS(p)&0x0100) /* interrupt status */
  180. #define IS_EOSIRQ(p) (READ_AUDIO_STATUS(p)&0x0200)
  181. #define IS_EOCIRQ(p) (READ_AUDIO_STATUS(p)&0x0400)
  182. #define IS_UNSLIRQ(p) (READ_AUDIO_STATUS(p)&0x0800)
  183. #define IS_SBIRQ(p) (READ_AUDIO_STATUS(p)&0x1000)
  184. #define IS_MPUIRQ(p) (READ_AUDIO_STATUS(p)&0x2000)
  185. #define RESP 0x00000001 /* command flags */
  186. #define PARM 0x00000002
  187. #define CMDA 0x00000004
  188. #define CMDB 0x00000008
  189. #define NILL 0x00000000
  190. #define LONG0(a) ((u32)a) /* shifts and masks */
  191. #define BYTE0(a) (LONG0(a)&0xff)
  192. #define BYTE1(a) (BYTE0(a)<<8)
  193. #define BYTE2(a) (BYTE0(a)<<16)
  194. #define BYTE3(a) (BYTE0(a)<<24)
  195. #define WORD0(a) (LONG0(a)&0xffff)
  196. #define WORD1(a) (WORD0(a)<<8)
  197. #define WORD2(a) (WORD0(a)<<16)
  198. #define TRINIB0(a) (LONG0(a)&0xffffff)
  199. #define TRINIB1(a) (TRINIB0(a)<<8)
  200. #define RET(a) ((union cmdret *)(a))
  201. #define SEND_GETV(p,b) sendcmd(p,RESP,GETV,0,RET(b)) /* get version */
  202. #define SEND_GETC(p,b,c) sendcmd(p,PARM|RESP,GETC,c,RET(b))
  203. #define SEND_GUNS(p,b) sendcmd(p,RESP,GUNS,0,RET(b))
  204. #define SEND_SCID(p,b) sendcmd(p,RESP,SCID,0,RET(b))
  205. #define SEND_RMEM(p,b,c,d) sendcmd(p,PARM|RESP,RMEM|BYTE1(b),LONG0(c),RET(d)) /* memory access for firmware write */
  206. #define SEND_SMEM(p,b,c) sendcmd(p,PARM,SMEM|BYTE1(b),LONG0(c),RET(0)) /* memory access for firmware write */
  207. #define SEND_WMEM(p,b,c) sendcmd(p,PARM,WMEM|BYTE1(b),LONG0(c),RET(0)) /* memory access for firmware write */
  208. #define SEND_SDTM(p,b,c) sendcmd(p,PARM|RESP,SDTM|TRINIB1(b),0,RET(c)) /* memory access for firmware write */
  209. #define SEND_GOTO(p,b) sendcmd(p,PARM,GOTO,LONG0(b),RET(0)) /* memory access for firmware write */
  210. #define SEND_SETDPLL(p) sendcmd(p,0,ARM_SETDPLL,0,RET(0))
  211. #define SEND_SSTR(p,b,c) sendcmd(p,PARM,SSTR|BYTE3(b),LONG0(c),RET(0)) /* start stream */
  212. #define SEND_PSTR(p,b) sendcmd(p,PARM,PSTR,BYTE3(b),RET(0)) /* pause stream */
  213. #define SEND_KSTR(p,b) sendcmd(p,PARM,KSTR,BYTE3(b),RET(0)) /* stop stream */
  214. #define SEND_KDMA(p) sendcmd(p,0,KDMA,0,RET(0)) /* stop all dma */
  215. #define SEND_GPOS(p,b,c,d) sendcmd(p,PARM|RESP,GPOS,BYTE3(c)|BYTE2(b),RET(d)) /* get position in dma */
  216. #define SEND_SETF(p,b,c,d,e,f,g) sendcmd(p,PARM,SETF|WORD1(b)|BYTE3(c),d|BYTE1(e)|BYTE2(f)|BYTE3(g),RET(0)) /* set sample format at mixer */
  217. #define SEND_GSTS(p,b,c,d) sendcmd(p,PARM|RESP,GSTS,BYTE3(c)|BYTE2(b),RET(d))
  218. #define SEND_NGPOS(p,b,c,d) sendcmd(p,PARM|RESP,NGPOS,BYTE3(c)|BYTE2(b),RET(d))
  219. #define SEND_PSEL(p,b,c) sendcmd(p,PARM,PSEL,BYTE2(b)|BYTE3(c),RET(0)) /* activate lbus path */
  220. #define SEND_PCLR(p,b,c) sendcmd(p,PARM,PCLR,BYTE2(b)|BYTE3(c),RET(0)) /* deactivate lbus path */
  221. #define SEND_PLST(p,b) sendcmd(p,PARM,PLST,BYTE3(b),RET(0))
  222. #define SEND_RSSV(p,b,c,d) sendcmd(p,PARM|RESP,RSSV,BYTE2(b)|BYTE3(c),RET(d))
  223. #define SEND_LSEL(p,b,c,d,e,f,g,h) sendcmd(p,PARM,LSEL|BYTE1(b)|BYTE2(c)|BYTE3(d),BYTE0(e)|BYTE1(f)|BYTE2(g)|BYTE3(h),RET(0)) /* select paths for internal connections */
  224. #define SEND_SSRC(p,b,c,d,e) sendcmd(p,PARM,SSRC|BYTE1(b)|WORD2(c),WORD0(d)|WORD2(e),RET(0)) /* configure source */
  225. #define SEND_SLST(p,b) sendcmd(p,PARM,SLST,BYTE3(b),RET(0))
  226. #define SEND_RSRC(p,b,c) sendcmd(p,RESP,RSRC|BYTE1(b),0,RET(c)) /* read source config */
  227. #define SEND_SSRB(p,b,c) sendcmd(p,PARM,SSRB|BYTE1(b),WORD2(c),RET(0))
  228. #define SEND_SDGV(p,b,c,d,e) sendcmd(p,PARM,SDGV|BYTE2(b)|BYTE3(c),WORD0(d)|WORD2(e),RET(0)) /* set digital mixer */
  229. #define SEND_RDGV(p,b,c,d) sendcmd(p,PARM|RESP,RDGV|BYTE2(b)|BYTE3(c),0,RET(d)) /* read digital mixer */
  230. #define SEND_DLST(p,b) sendcmd(p,PARM,DLST,BYTE3(b),RET(0))
  231. #define SEND_SACR(p,b,c) sendcmd(p,PARM,SACR,WORD0(b)|WORD2(c),RET(0)) /* set AC97 register */
  232. #define SEND_RACR(p,b,c) sendcmd(p,PARM|RESP,RACR,WORD2(b),RET(c)) /* get AC97 register */
  233. #define SEND_ALST(p,b) sendcmd(p,PARM,ALST,BYTE3(b),RET(0))
  234. #define SEND_TXAC(p,b,c,d,e,f) sendcmd(p,PARM,TXAC|BYTE1(b)|WORD2(c),WORD0(d)|BYTE2(e)|BYTE3(f),RET(0))
  235. #define SEND_RXAC(p,b,c,d) sendcmd(p,PARM|RESP,RXAC,BYTE2(b)|BYTE3(c),RET(d))
  236. #define SEND_SI2S(p,b) sendcmd(p,PARM,SI2S,WORD2(b),RET(0))
  237. #define EOB_STATUS 0x80000000 /* status flags : block boundary */
  238. #define EOS_STATUS 0x40000000 /* : stoppped */
  239. #define EOC_STATUS 0x20000000 /* : stream end */
  240. #define ERR_STATUS 0x10000000
  241. #define EMPTY_STATUS 0x08000000
  242. #define IEOB_ENABLE 0x1 /* enable interrupts for status notification above */
  243. #define IEOS_ENABLE 0x2
  244. #define IEOC_ENABLE 0x4
  245. #define RDONCE 0x8
  246. #define DESC_MAX_MASK 0xff
  247. #define ST_PLAY 0x1 /* stream states */
  248. #define ST_STOP 0x2
  249. #define ST_PAUSE 0x4
  250. #define I2S_INTDEC 3 /* config for I2S link */
  251. #define I2S_MERGER 0
  252. #define I2S_SPLITTER 0
  253. #define I2S_MIXER 7
  254. #define I2S_RATE 44100
  255. #define MODEM_INTDEC 4 /* config for modem link */
  256. #define MODEM_MERGER 3
  257. #define MODEM_SPLITTER 0
  258. #define MODEM_MIXER 11
  259. #define FM_INTDEC 3 /* config for FM/OPL3 link */
  260. #define FM_MERGER 0
  261. #define FM_SPLITTER 0
  262. #define FM_MIXER 9
  263. #define SPLIT_PATH 0x80 /* path splitting flag */
  264. enum FIRMWARE {
  265. DATA_REC = 0, EXT_END_OF_FILE, EXT_SEG_ADDR_REC, EXT_GOTO_CMD_REC,
  266. EXT_LIN_ADDR_REC,
  267. };
  268. enum CMDS {
  269. GETV = 0x00, GETC, GUNS, SCID, RMEM =
  270. 0x10, SMEM, WMEM, SDTM, GOTO, SSTR =
  271. 0x20, PSTR, KSTR, KDMA, GPOS, SETF, GSTS, NGPOS, PSEL =
  272. 0x30, PCLR, PLST, RSSV, LSEL, SSRC = 0x40, SLST, RSRC, SSRB, SDGV =
  273. 0x50, RDGV, DLST, SACR = 0x60, RACR, ALST, TXAC, RXAC, SI2S =
  274. 0x70, ARM_SETDPLL = 0x72,
  275. };
  276. enum E1SOURCE {
  277. ARM2LBUS_FIFO0 = 0, ARM2LBUS_FIFO1, ARM2LBUS_FIFO2, ARM2LBUS_FIFO3,
  278. ARM2LBUS_FIFO4, ARM2LBUS_FIFO5, ARM2LBUS_FIFO6, ARM2LBUS_FIFO7,
  279. ARM2LBUS_FIFO8, ARM2LBUS_FIFO9, ARM2LBUS_FIFO10, ARM2LBUS_FIFO11,
  280. ARM2LBUS_FIFO12, ARM2LBUS_FIFO13, ARM2LBUS_FIFO14, ARM2LBUS_FIFO15,
  281. INTER0_OUT, INTER1_OUT, INTER2_OUT, INTER3_OUT, INTER4_OUT,
  282. INTERM0_OUT, INTERM1_OUT, INTERM2_OUT, INTERM3_OUT, INTERM4_OUT,
  283. INTERM5_OUT, INTERM6_OUT, DECIMM0_OUT, DECIMM1_OUT, DECIMM2_OUT,
  284. DECIMM3_OUT, DECIM0_OUT, SR3_4_OUT, OPL3_SAMPLE, ASRC0, ASRC1,
  285. ACLNK2PADC, ACLNK2MODEM0RX, ACLNK2MIC, ACLNK2MODEM1RX, ACLNK2HNDMIC,
  286. DIGITAL_MIXER_OUT0, GAINFUNC0_OUT, GAINFUNC1_OUT, GAINFUNC2_OUT,
  287. GAINFUNC3_OUT, GAINFUNC4_OUT, SOFTMODEMTX, SPLITTER0_OUTL,
  288. SPLITTER0_OUTR, SPLITTER1_OUTL, SPLITTER1_OUTR, SPLITTER2_OUTL,
  289. SPLITTER2_OUTR, SPLITTER3_OUTL, SPLITTER3_OUTR, MERGER0_OUT,
  290. MERGER1_OUT, MERGER2_OUT, MERGER3_OUT, ARM2LBUS_FIFO_DIRECT, NO_OUT
  291. };
  292. enum E2SINK {
  293. LBUS2ARM_FIFO0 = 0, LBUS2ARM_FIFO1, LBUS2ARM_FIFO2, LBUS2ARM_FIFO3,
  294. LBUS2ARM_FIFO4, LBUS2ARM_FIFO5, LBUS2ARM_FIFO6, LBUS2ARM_FIFO7,
  295. INTER0_IN, INTER1_IN, INTER2_IN, INTER3_IN, INTER4_IN, INTERM0_IN,
  296. INTERM1_IN, INTERM2_IN, INTERM3_IN, INTERM4_IN, INTERM5_IN, INTERM6_IN,
  297. DECIMM0_IN, DECIMM1_IN, DECIMM2_IN, DECIMM3_IN, DECIM0_IN, SR3_4_IN,
  298. PDAC2ACLNK, MODEM0TX2ACLNK, MODEM1TX2ACLNK, HNDSPK2ACLNK,
  299. DIGITAL_MIXER_IN0, DIGITAL_MIXER_IN1, DIGITAL_MIXER_IN2,
  300. DIGITAL_MIXER_IN3, DIGITAL_MIXER_IN4, DIGITAL_MIXER_IN5,
  301. DIGITAL_MIXER_IN6, DIGITAL_MIXER_IN7, DIGITAL_MIXER_IN8,
  302. DIGITAL_MIXER_IN9, DIGITAL_MIXER_IN10, DIGITAL_MIXER_IN11,
  303. GAINFUNC0_IN, GAINFUNC1_IN, GAINFUNC2_IN, GAINFUNC3_IN, GAINFUNC4_IN,
  304. SOFTMODEMRX, SPLITTER0_IN, SPLITTER1_IN, SPLITTER2_IN, SPLITTER3_IN,
  305. MERGER0_INL, MERGER0_INR, MERGER1_INL, MERGER1_INR, MERGER2_INL,
  306. MERGER2_INR, MERGER3_INL, MERGER3_INR, E2SINK_MAX
  307. };
  308. enum LBUS_SINK {
  309. LS_SRC_INTERPOLATOR = 0, LS_SRC_INTERPOLATORM, LS_SRC_DECIMATOR,
  310. LS_SRC_DECIMATORM, LS_MIXER_IN, LS_MIXER_GAIN_FUNCTION,
  311. LS_SRC_SPLITTER, LS_SRC_MERGER, LS_NONE1, LS_NONE2,
  312. };
  313. enum RT_CHANNEL_IDS {
  314. M0TX = 0, M1TX, TAMTX, HSSPKR, PDAC, DSNDTX0, DSNDTX1, DSNDTX2,
  315. DSNDTX3, DSNDTX4, DSNDTX5, DSNDTX6, DSNDTX7, WVSTRTX, COP3DTX, SPARE,
  316. M0RX, HSMIC, M1RX, CLEANRX, MICADC, PADC, COPRX1, COPRX2,
  317. CHANNEL_ID_COUNTER
  318. };
  319. enum { SB_CMD = 0, MODEM_CMD, I2S_CMD0, I2S_CMD1, FM_CMD, MAX_CMD };
  320. struct lbuspath {
  321. const unsigned char *noconv;
  322. const unsigned char *stereo;
  323. const unsigned char *mono;
  324. };
  325. struct cmdport {
  326. u32 data1; /* cmd,param */
  327. u32 data2; /* param */
  328. u32 stat; /* status */
  329. u32 pad[5];
  330. };
  331. struct riptideport {
  332. u32 audio_control; /* status registers */
  333. u32 audio_status;
  334. u32 pad[2];
  335. struct cmdport port[2]; /* command ports */
  336. };
  337. struct cmdif {
  338. struct device *dev;
  339. struct riptideport *hwport;
  340. spinlock_t lock;
  341. unsigned int cmdcnt; /* cmd statistics */
  342. unsigned int cmdtime;
  343. unsigned int cmdtimemax;
  344. unsigned int cmdtimemin;
  345. unsigned int errcnt;
  346. int is_reset;
  347. };
  348. struct riptide_firmware {
  349. u16 ASIC;
  350. u16 CODEC;
  351. u16 AUXDSP;
  352. u16 PROG;
  353. };
  354. union cmdret {
  355. u8 retbytes[8];
  356. u16 retwords[4];
  357. u32 retlongs[2];
  358. };
  359. union firmware_version {
  360. union cmdret ret;
  361. struct riptide_firmware firmware;
  362. };
  363. #define get_pcmhwdev(substream) (struct pcmhw *)(substream->runtime->private_data)
  364. #define PLAYBACK_SUBSTREAMS 3
  365. struct snd_riptide {
  366. struct snd_card *card;
  367. struct pci_dev *pci;
  368. const struct firmware *fw_entry;
  369. struct cmdif *cif;
  370. struct snd_pcm *pcm;
  371. struct snd_pcm *pcm_i2s;
  372. struct snd_rawmidi *rmidi;
  373. struct snd_opl3 *opl3;
  374. struct snd_ac97 *ac97;
  375. struct snd_ac97_bus *ac97_bus;
  376. struct snd_pcm_substream *playback_substream[PLAYBACK_SUBSTREAMS];
  377. struct snd_pcm_substream *capture_substream;
  378. int openstreams;
  379. int irq;
  380. unsigned long port;
  381. unsigned short mpuaddr;
  382. unsigned short opladdr;
  383. #ifdef SUPPORT_JOYSTICK
  384. unsigned short gameaddr;
  385. #endif
  386. struct resource *res_port;
  387. unsigned short device_id;
  388. union firmware_version firmware;
  389. spinlock_t lock;
  390. struct snd_info_entry *proc_entry;
  391. unsigned long received_irqs;
  392. unsigned long handled_irqs;
  393. int in_suspend;
  394. };
  395. struct sgd { /* scatter gather desriptor */
  396. __le32 dwNextLink;
  397. __le32 dwSegPtrPhys;
  398. __le32 dwSegLen;
  399. __le32 dwStat_Ctl;
  400. };
  401. struct pcmhw { /* pcm descriptor */
  402. struct lbuspath paths;
  403. const unsigned char *lbuspath;
  404. unsigned char source;
  405. unsigned char intdec[2];
  406. unsigned char mixer;
  407. unsigned char id;
  408. unsigned char state;
  409. unsigned int rate;
  410. unsigned int channels;
  411. snd_pcm_format_t format;
  412. struct snd_dma_buffer sgdlist;
  413. struct sgd *sgdbuf;
  414. unsigned int size;
  415. unsigned int pages;
  416. unsigned int oldpos;
  417. unsigned int pointer;
  418. };
  419. #define CMDRET_ZERO (union cmdret){{(u32)0, (u32) 0}}
  420. static int sendcmd(struct cmdif *cif, u32 flags, u32 cmd, u32 parm,
  421. union cmdret *ret);
  422. static int getsourcesink(struct cmdif *cif, unsigned char source,
  423. unsigned char sink, unsigned char *a,
  424. unsigned char *b);
  425. static int snd_riptide_initialize(struct snd_riptide *chip);
  426. static int riptide_reset(struct cmdif *cif, struct snd_riptide *chip);
  427. /*
  428. */
  429. static const struct pci_device_id snd_riptide_ids[] = {
  430. { PCI_DEVICE(0x127a, 0x4310) },
  431. { PCI_DEVICE(0x127a, 0x4320) },
  432. { PCI_DEVICE(0x127a, 0x4330) },
  433. { PCI_DEVICE(0x127a, 0x4340) },
  434. {0,},
  435. };
  436. #ifdef SUPPORT_JOYSTICK
  437. static const struct pci_device_id snd_riptide_joystick_ids[] = {
  438. { PCI_DEVICE(0x127a, 0x4312) },
  439. { PCI_DEVICE(0x127a, 0x4322) },
  440. { PCI_DEVICE(0x127a, 0x4332) },
  441. { PCI_DEVICE(0x127a, 0x4342) },
  442. {0,},
  443. };
  444. #endif
  445. MODULE_DEVICE_TABLE(pci, snd_riptide_ids);
  446. /*
  447. */
  448. static const unsigned char lbusin2out[E2SINK_MAX + 1][2] = {
  449. {NO_OUT, LS_NONE1}, {NO_OUT, LS_NONE2}, {NO_OUT, LS_NONE1}, {NO_OUT,
  450. LS_NONE2},
  451. {NO_OUT, LS_NONE1}, {NO_OUT, LS_NONE2}, {NO_OUT, LS_NONE1}, {NO_OUT,
  452. LS_NONE2},
  453. {INTER0_OUT, LS_SRC_INTERPOLATOR}, {INTER1_OUT, LS_SRC_INTERPOLATOR},
  454. {INTER2_OUT, LS_SRC_INTERPOLATOR}, {INTER3_OUT, LS_SRC_INTERPOLATOR},
  455. {INTER4_OUT, LS_SRC_INTERPOLATOR}, {INTERM0_OUT, LS_SRC_INTERPOLATORM},
  456. {INTERM1_OUT, LS_SRC_INTERPOLATORM}, {INTERM2_OUT,
  457. LS_SRC_INTERPOLATORM},
  458. {INTERM3_OUT, LS_SRC_INTERPOLATORM}, {INTERM4_OUT,
  459. LS_SRC_INTERPOLATORM},
  460. {INTERM5_OUT, LS_SRC_INTERPOLATORM}, {INTERM6_OUT,
  461. LS_SRC_INTERPOLATORM},
  462. {DECIMM0_OUT, LS_SRC_DECIMATORM}, {DECIMM1_OUT, LS_SRC_DECIMATORM},
  463. {DECIMM2_OUT, LS_SRC_DECIMATORM}, {DECIMM3_OUT, LS_SRC_DECIMATORM},
  464. {DECIM0_OUT, LS_SRC_DECIMATOR}, {SR3_4_OUT, LS_NONE1}, {NO_OUT,
  465. LS_NONE2},
  466. {NO_OUT, LS_NONE1}, {NO_OUT, LS_NONE2}, {NO_OUT, LS_NONE1},
  467. {DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
  468. {DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
  469. {DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
  470. {DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
  471. {DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
  472. {DIGITAL_MIXER_OUT0, LS_MIXER_IN}, {DIGITAL_MIXER_OUT0, LS_MIXER_IN},
  473. {GAINFUNC0_OUT, LS_MIXER_GAIN_FUNCTION}, {GAINFUNC1_OUT,
  474. LS_MIXER_GAIN_FUNCTION},
  475. {GAINFUNC2_OUT, LS_MIXER_GAIN_FUNCTION}, {GAINFUNC3_OUT,
  476. LS_MIXER_GAIN_FUNCTION},
  477. {GAINFUNC4_OUT, LS_MIXER_GAIN_FUNCTION}, {SOFTMODEMTX, LS_NONE1},
  478. {SPLITTER0_OUTL, LS_SRC_SPLITTER}, {SPLITTER1_OUTL, LS_SRC_SPLITTER},
  479. {SPLITTER2_OUTL, LS_SRC_SPLITTER}, {SPLITTER3_OUTL, LS_SRC_SPLITTER},
  480. {MERGER0_OUT, LS_SRC_MERGER}, {MERGER0_OUT, LS_SRC_MERGER},
  481. {MERGER1_OUT, LS_SRC_MERGER},
  482. {MERGER1_OUT, LS_SRC_MERGER}, {MERGER2_OUT, LS_SRC_MERGER},
  483. {MERGER2_OUT, LS_SRC_MERGER},
  484. {MERGER3_OUT, LS_SRC_MERGER}, {MERGER3_OUT, LS_SRC_MERGER}, {NO_OUT,
  485. LS_NONE2},
  486. };
  487. static const unsigned char lbus_play_opl3[] = {
  488. DIGITAL_MIXER_IN0 + FM_MIXER, 0xff
  489. };
  490. static const unsigned char lbus_play_modem[] = {
  491. DIGITAL_MIXER_IN0 + MODEM_MIXER, 0xff
  492. };
  493. static const unsigned char lbus_play_i2s[] = {
  494. INTER0_IN + I2S_INTDEC, DIGITAL_MIXER_IN0 + I2S_MIXER, 0xff
  495. };
  496. static const unsigned char lbus_play_out[] = {
  497. PDAC2ACLNK, 0xff
  498. };
  499. static const unsigned char lbus_play_outhp[] = {
  500. HNDSPK2ACLNK, 0xff
  501. };
  502. static const unsigned char lbus_play_noconv1[] = {
  503. DIGITAL_MIXER_IN0, 0xff
  504. };
  505. static const unsigned char lbus_play_stereo1[] = {
  506. INTER0_IN, DIGITAL_MIXER_IN0, 0xff
  507. };
  508. static const unsigned char lbus_play_mono1[] = {
  509. INTERM0_IN, DIGITAL_MIXER_IN0, 0xff
  510. };
  511. static const unsigned char lbus_play_noconv2[] = {
  512. DIGITAL_MIXER_IN1, 0xff
  513. };
  514. static const unsigned char lbus_play_stereo2[] = {
  515. INTER1_IN, DIGITAL_MIXER_IN1, 0xff
  516. };
  517. static const unsigned char lbus_play_mono2[] = {
  518. INTERM1_IN, DIGITAL_MIXER_IN1, 0xff
  519. };
  520. static const unsigned char lbus_play_noconv3[] = {
  521. DIGITAL_MIXER_IN2, 0xff
  522. };
  523. static const unsigned char lbus_play_stereo3[] = {
  524. INTER2_IN, DIGITAL_MIXER_IN2, 0xff
  525. };
  526. static const unsigned char lbus_play_mono3[] = {
  527. INTERM2_IN, DIGITAL_MIXER_IN2, 0xff
  528. };
  529. static const unsigned char lbus_rec_noconv1[] = {
  530. LBUS2ARM_FIFO5, 0xff
  531. };
  532. static const unsigned char lbus_rec_stereo1[] = {
  533. DECIM0_IN, LBUS2ARM_FIFO5, 0xff
  534. };
  535. static const unsigned char lbus_rec_mono1[] = {
  536. DECIMM3_IN, LBUS2ARM_FIFO5, 0xff
  537. };
  538. static const unsigned char play_ids[] = { 4, 1, 2, };
  539. static const unsigned char play_sources[] = {
  540. ARM2LBUS_FIFO4, ARM2LBUS_FIFO1, ARM2LBUS_FIFO2,
  541. };
  542. static const struct lbuspath lbus_play_paths[] = {
  543. {
  544. .noconv = lbus_play_noconv1,
  545. .stereo = lbus_play_stereo1,
  546. .mono = lbus_play_mono1,
  547. },
  548. {
  549. .noconv = lbus_play_noconv2,
  550. .stereo = lbus_play_stereo2,
  551. .mono = lbus_play_mono2,
  552. },
  553. {
  554. .noconv = lbus_play_noconv3,
  555. .stereo = lbus_play_stereo3,
  556. .mono = lbus_play_mono3,
  557. },
  558. };
  559. static const struct lbuspath lbus_rec_path = {
  560. .noconv = lbus_rec_noconv1,
  561. .stereo = lbus_rec_stereo1,
  562. .mono = lbus_rec_mono1,
  563. };
  564. #define FIRMWARE_VERSIONS 1
  565. static union firmware_version firmware_versions[] = {
  566. {
  567. .firmware = {
  568. .ASIC = 3,
  569. .CODEC = 2,
  570. .AUXDSP = 3,
  571. .PROG = 773,
  572. },
  573. },
  574. };
  575. static u32 atoh(const unsigned char *in, unsigned int len)
  576. {
  577. u32 sum = 0;
  578. unsigned int mult = 1;
  579. unsigned char c;
  580. while (len) {
  581. int value;
  582. c = in[len - 1];
  583. value = hex_to_bin(c);
  584. if (value >= 0)
  585. sum += mult * value;
  586. mult *= 16;
  587. --len;
  588. }
  589. return sum;
  590. }
  591. static int senddata(struct cmdif *cif, const unsigned char *in, u32 offset)
  592. {
  593. u32 addr;
  594. u32 data;
  595. u32 i;
  596. const unsigned char *p;
  597. i = atoh(&in[1], 2);
  598. addr = offset + atoh(&in[3], 4);
  599. if (SEND_SMEM(cif, 0, addr) != 0)
  600. return -EACCES;
  601. p = in + 9;
  602. while (i) {
  603. data = atoh(p, 8);
  604. if (SEND_WMEM(cif, 2,
  605. ((data & 0x0f0f0f0f) << 4) | ((data & 0xf0f0f0f0)
  606. >> 4)))
  607. return -EACCES;
  608. i -= 4;
  609. p += 8;
  610. }
  611. return 0;
  612. }
  613. static int loadfirmware(struct cmdif *cif, const unsigned char *img,
  614. unsigned int size)
  615. {
  616. const unsigned char *in;
  617. u32 laddr, saddr, t, val;
  618. int err = 0;
  619. laddr = saddr = 0;
  620. while (size > 0 && err == 0) {
  621. in = img;
  622. if (in[0] == ':') {
  623. t = atoh(&in[7], 2);
  624. switch (t) {
  625. case DATA_REC:
  626. err = senddata(cif, in, laddr + saddr);
  627. break;
  628. case EXT_SEG_ADDR_REC:
  629. saddr = atoh(&in[9], 4) << 4;
  630. break;
  631. case EXT_LIN_ADDR_REC:
  632. laddr = atoh(&in[9], 4) << 16;
  633. break;
  634. case EXT_GOTO_CMD_REC:
  635. val = atoh(&in[9], 8);
  636. if (SEND_GOTO(cif, val) != 0)
  637. err = -EACCES;
  638. break;
  639. case EXT_END_OF_FILE:
  640. size = 0;
  641. break;
  642. default:
  643. break;
  644. }
  645. while (size > 0) {
  646. size--;
  647. if (*img++ == '\n')
  648. break;
  649. }
  650. }
  651. }
  652. dev_dbg(cif->dev, "load firmware return %d\n", err);
  653. return err;
  654. }
  655. static void
  656. alloclbuspath(struct cmdif *cif, unsigned char source,
  657. const unsigned char *path, unsigned char *mixer, unsigned char *s)
  658. {
  659. while (*path != 0xff) {
  660. unsigned char sink, type;
  661. sink = *path & (~SPLIT_PATH);
  662. if (sink != E2SINK_MAX) {
  663. dev_dbg(cif->dev, "alloc path 0x%x->0x%x\n", source, sink);
  664. SEND_PSEL(cif, source, sink);
  665. source = lbusin2out[sink][0];
  666. type = lbusin2out[sink][1];
  667. if (type == LS_MIXER_IN) {
  668. if (mixer)
  669. *mixer = sink - DIGITAL_MIXER_IN0;
  670. }
  671. if (type == LS_SRC_DECIMATORM ||
  672. type == LS_SRC_DECIMATOR ||
  673. type == LS_SRC_INTERPOLATORM ||
  674. type == LS_SRC_INTERPOLATOR) {
  675. if (s) {
  676. if (s[0] != 0xff)
  677. s[1] = sink;
  678. else
  679. s[0] = sink;
  680. }
  681. }
  682. }
  683. if (*path++ & SPLIT_PATH) {
  684. const unsigned char *npath = path;
  685. while (*npath != 0xff)
  686. npath++;
  687. alloclbuspath(cif, source + 1, ++npath, mixer, s);
  688. }
  689. }
  690. }
  691. static void
  692. freelbuspath(struct cmdif *cif, unsigned char source, const unsigned char *path)
  693. {
  694. while (*path != 0xff) {
  695. unsigned char sink;
  696. sink = *path & (~SPLIT_PATH);
  697. if (sink != E2SINK_MAX) {
  698. dev_dbg(cif->dev, "free path 0x%x->0x%x\n", source, sink);
  699. SEND_PCLR(cif, source, sink);
  700. source = lbusin2out[sink][0];
  701. }
  702. if (*path++ & SPLIT_PATH) {
  703. const unsigned char *npath = path;
  704. while (*npath != 0xff)
  705. npath++;
  706. freelbuspath(cif, source + 1, ++npath);
  707. }
  708. }
  709. }
  710. static int writearm(struct cmdif *cif, u32 addr, u32 data, u32 mask)
  711. {
  712. union cmdret rptr = CMDRET_ZERO;
  713. unsigned int i = MAX_WRITE_RETRY;
  714. int flag = 1;
  715. SEND_RMEM(cif, 0x02, addr, &rptr);
  716. rptr.retlongs[0] &= (~mask);
  717. while (--i) {
  718. SEND_SMEM(cif, 0x01, addr);
  719. SEND_WMEM(cif, 0x02, (rptr.retlongs[0] | data));
  720. SEND_RMEM(cif, 0x02, addr, &rptr);
  721. if ((rptr.retlongs[0] & data) == data) {
  722. flag = 0;
  723. break;
  724. } else
  725. rptr.retlongs[0] &= ~mask;
  726. }
  727. dev_dbg(cif->dev, "send arm 0x%x 0x%x 0x%x return %d\n", addr, data, mask,
  728. flag);
  729. return flag;
  730. }
  731. static int sendcmd(struct cmdif *cif, u32 flags, u32 cmd, u32 parm,
  732. union cmdret *ret)
  733. {
  734. int i, j;
  735. int err;
  736. unsigned int time = 0;
  737. unsigned long irqflags;
  738. struct riptideport *hwport;
  739. struct cmdport *cmdport = NULL;
  740. if (snd_BUG_ON(!cif))
  741. return -EINVAL;
  742. hwport = cif->hwport;
  743. if (cif->errcnt > MAX_ERROR_COUNT) {
  744. if (cif->is_reset) {
  745. dev_err(cif->dev,
  746. "Riptide: Too many failed cmds, reinitializing\n");
  747. if (riptide_reset(cif, NULL) == 0) {
  748. cif->errcnt = 0;
  749. return -EIO;
  750. }
  751. }
  752. dev_err(cif->dev, "Riptide: Initialization failed.\n");
  753. return -EINVAL;
  754. }
  755. if (ret) {
  756. ret->retlongs[0] = 0;
  757. ret->retlongs[1] = 0;
  758. }
  759. i = 0;
  760. spin_lock_irqsave(&cif->lock, irqflags);
  761. while (i++ < CMDIF_TIMEOUT && !IS_READY(cif->hwport))
  762. udelay(10);
  763. if (i > CMDIF_TIMEOUT) {
  764. err = -EBUSY;
  765. goto errout;
  766. }
  767. err = 0;
  768. for (j = 0, time = 0; time < CMDIF_TIMEOUT; j++, time += 2) {
  769. cmdport = &(hwport->port[j % 2]);
  770. if (IS_DATF(cmdport)) { /* free pending data */
  771. READ_PORT_ULONG(cmdport->data1);
  772. READ_PORT_ULONG(cmdport->data2);
  773. }
  774. if (IS_CMDE(cmdport)) {
  775. if (flags & PARM) /* put data */
  776. WRITE_PORT_ULONG(cmdport->data2, parm);
  777. WRITE_PORT_ULONG(cmdport->data1, cmd); /* write cmd */
  778. if ((flags & RESP) && ret) {
  779. while (!IS_DATF(cmdport) &&
  780. time < CMDIF_TIMEOUT) {
  781. udelay(10);
  782. time++;
  783. }
  784. if (time < CMDIF_TIMEOUT) { /* read response */
  785. ret->retlongs[0] =
  786. READ_PORT_ULONG(cmdport->data1);
  787. ret->retlongs[1] =
  788. READ_PORT_ULONG(cmdport->data2);
  789. } else {
  790. err = -ENOSYS;
  791. goto errout;
  792. }
  793. }
  794. break;
  795. }
  796. udelay(20);
  797. }
  798. if (time == CMDIF_TIMEOUT) {
  799. err = -ENODATA;
  800. goto errout;
  801. }
  802. spin_unlock_irqrestore(&cif->lock, irqflags);
  803. cif->cmdcnt++; /* update command statistics */
  804. cif->cmdtime += time;
  805. if (time > cif->cmdtimemax)
  806. cif->cmdtimemax = time;
  807. if (time < cif->cmdtimemin)
  808. cif->cmdtimemin = time;
  809. if ((cif->cmdcnt) % 1000 == 0)
  810. dev_dbg(cif->dev,
  811. "send cmd %d time: %d mintime: %d maxtime %d err: %d\n",
  812. cif->cmdcnt, cif->cmdtime, cif->cmdtimemin,
  813. cif->cmdtimemax, cif->errcnt);
  814. return 0;
  815. errout:
  816. cif->errcnt++;
  817. spin_unlock_irqrestore(&cif->lock, irqflags);
  818. dev_dbg(cif->dev,
  819. "send cmd %d hw: 0x%x flag: 0x%x cmd: 0x%x parm: 0x%x ret: 0x%x 0x%x CMDE: %d DATF: %d failed %d\n",
  820. cif->cmdcnt, (int)((void *)&(cmdport->stat) - (void *)hwport),
  821. flags, cmd, parm, ret ? ret->retlongs[0] : 0,
  822. ret ? ret->retlongs[1] : 0, IS_CMDE(cmdport), IS_DATF(cmdport),
  823. err);
  824. return err;
  825. }
  826. static int
  827. setmixer(struct cmdif *cif, short num, unsigned short rval, unsigned short lval)
  828. {
  829. union cmdret rptr = CMDRET_ZERO;
  830. int i = 0;
  831. dev_dbg(cif->dev, "sent mixer %d: 0x%x 0x%x\n", num, rval, lval);
  832. do {
  833. SEND_SDGV(cif, num, num, rval, lval);
  834. SEND_RDGV(cif, num, num, &rptr);
  835. if (rptr.retwords[0] == lval && rptr.retwords[1] == rval)
  836. return 0;
  837. } while (i++ < MAX_WRITE_RETRY);
  838. dev_dbg(cif->dev, "sent mixer failed\n");
  839. return -EIO;
  840. }
  841. static int getpaths(struct cmdif *cif, unsigned char *o)
  842. {
  843. unsigned char src[E2SINK_MAX];
  844. unsigned char sink[E2SINK_MAX];
  845. int i, j = 0;
  846. for (i = 0; i < E2SINK_MAX; i++) {
  847. getsourcesink(cif, i, i, &src[i], &sink[i]);
  848. if (sink[i] < E2SINK_MAX) {
  849. o[j++] = sink[i];
  850. o[j++] = i;
  851. }
  852. }
  853. return j;
  854. }
  855. static int
  856. getsourcesink(struct cmdif *cif, unsigned char source, unsigned char sink,
  857. unsigned char *a, unsigned char *b)
  858. {
  859. union cmdret rptr = CMDRET_ZERO;
  860. if (SEND_RSSV(cif, source, sink, &rptr) &&
  861. SEND_RSSV(cif, source, sink, &rptr))
  862. return -EIO;
  863. *a = rptr.retbytes[0];
  864. *b = rptr.retbytes[1];
  865. dev_dbg(cif->dev, "%s 0x%x 0x%x\n", __func__, *a, *b);
  866. return 0;
  867. }
  868. static int
  869. getsamplerate(struct cmdif *cif, unsigned char *intdec, unsigned int *rate)
  870. {
  871. unsigned char *s;
  872. unsigned int p[2] = { 0, 0 };
  873. int i;
  874. union cmdret rptr = CMDRET_ZERO;
  875. s = intdec;
  876. for (i = 0; i < 2; i++) {
  877. if (*s != 0xff) {
  878. if (SEND_RSRC(cif, *s, &rptr) &&
  879. SEND_RSRC(cif, *s, &rptr))
  880. return -EIO;
  881. p[i] += rptr.retwords[1];
  882. p[i] *= rptr.retwords[2];
  883. p[i] += rptr.retwords[3];
  884. p[i] /= 65536;
  885. }
  886. s++;
  887. }
  888. if (p[0]) {
  889. if (p[1] != p[0])
  890. dev_dbg(cif->dev, "rates differ %d %d\n", p[0], p[1]);
  891. *rate = (unsigned int)p[0];
  892. } else
  893. *rate = (unsigned int)p[1];
  894. dev_dbg(cif->dev, "getsampleformat %d %d %d\n", intdec[0], intdec[1], *rate);
  895. return 0;
  896. }
  897. static int
  898. setsampleformat(struct cmdif *cif,
  899. unsigned char mixer, unsigned char id,
  900. unsigned char channels, snd_pcm_format_t format)
  901. {
  902. unsigned char w, ch, sig, order;
  903. dev_dbg(cif->dev,
  904. "%s mixer: %d id: %d channels: %d format: %d\n",
  905. __func__, mixer, id, channels, format);
  906. ch = channels == 1;
  907. w = snd_pcm_format_width(format) == 8;
  908. sig = snd_pcm_format_unsigned(format) != 0;
  909. order = snd_pcm_format_big_endian(format) != 0;
  910. if (SEND_SETF(cif, mixer, w, ch, order, sig, id) &&
  911. SEND_SETF(cif, mixer, w, ch, order, sig, id)) {
  912. dev_dbg(cif->dev, "%s failed\n", __func__);
  913. return -EIO;
  914. }
  915. return 0;
  916. }
  917. static int
  918. setsamplerate(struct cmdif *cif, unsigned char *intdec, unsigned int rate)
  919. {
  920. u32 D, M, N;
  921. union cmdret rptr = CMDRET_ZERO;
  922. int i;
  923. dev_dbg(cif->dev, "%s intdec: %d,%d rate: %d\n", __func__,
  924. intdec[0], intdec[1], rate);
  925. D = 48000;
  926. M = ((rate == 48000) ? 47999 : rate) * 65536;
  927. N = M % D;
  928. M /= D;
  929. for (i = 0; i < 2; i++) {
  930. if (*intdec != 0xff) {
  931. do {
  932. SEND_SSRC(cif, *intdec, D, M, N);
  933. SEND_RSRC(cif, *intdec, &rptr);
  934. } while (rptr.retwords[1] != D &&
  935. rptr.retwords[2] != M &&
  936. rptr.retwords[3] != N &&
  937. i++ < MAX_WRITE_RETRY);
  938. if (i > MAX_WRITE_RETRY) {
  939. dev_dbg(cif->dev, "sent samplerate %d: %d failed\n",
  940. *intdec, rate);
  941. return -EIO;
  942. }
  943. }
  944. intdec++;
  945. }
  946. return 0;
  947. }
  948. static int
  949. getmixer(struct cmdif *cif, short num, unsigned short *rval,
  950. unsigned short *lval)
  951. {
  952. union cmdret rptr = CMDRET_ZERO;
  953. if (SEND_RDGV(cif, num, num, &rptr) && SEND_RDGV(cif, num, num, &rptr))
  954. return -EIO;
  955. *rval = rptr.retwords[0];
  956. *lval = rptr.retwords[1];
  957. dev_dbg(cif->dev, "got mixer %d: 0x%x 0x%x\n", num, *rval, *lval);
  958. return 0;
  959. }
  960. static irqreturn_t riptide_handleirq(int irq, void *dev_id)
  961. {
  962. struct snd_riptide *chip = dev_id;
  963. struct cmdif *cif = chip->cif;
  964. struct snd_pcm_substream *substream[PLAYBACK_SUBSTREAMS + 1];
  965. struct snd_pcm_runtime *runtime;
  966. struct pcmhw *data = NULL;
  967. unsigned int pos, period_bytes;
  968. struct sgd *c;
  969. int i, j;
  970. unsigned int flag;
  971. if (!cif)
  972. return IRQ_HANDLED;
  973. for (i = 0; i < PLAYBACK_SUBSTREAMS; i++)
  974. substream[i] = chip->playback_substream[i];
  975. substream[i] = chip->capture_substream;
  976. for (i = 0; i < PLAYBACK_SUBSTREAMS + 1; i++) {
  977. if (!substream[i])
  978. continue;
  979. runtime = substream[i]->runtime;
  980. if (!runtime)
  981. continue;
  982. data = runtime->private_data;
  983. if (!data)
  984. continue;
  985. if (data->state != ST_STOP) {
  986. pos = 0;
  987. for (j = 0; j < data->pages; j++) {
  988. c = &data->sgdbuf[j];
  989. flag = le32_to_cpu(c->dwStat_Ctl);
  990. if (flag & EOB_STATUS)
  991. pos += le32_to_cpu(c->dwSegLen);
  992. if (flag & EOC_STATUS)
  993. pos += le32_to_cpu(c->dwSegLen);
  994. if ((flag & EOS_STATUS)
  995. && (data->state == ST_PLAY)) {
  996. data->state = ST_STOP;
  997. dev_err(cif->dev,
  998. "Riptide: DMA stopped unexpectedly\n");
  999. }
  1000. c->dwStat_Ctl =
  1001. cpu_to_le32(flag &
  1002. ~(EOS_STATUS | EOB_STATUS |
  1003. EOC_STATUS));
  1004. }
  1005. data->pointer += pos;
  1006. pos += data->oldpos;
  1007. if (data->state != ST_STOP) {
  1008. period_bytes =
  1009. frames_to_bytes(runtime,
  1010. runtime->period_size);
  1011. dev_dbg(cif->dev,
  1012. "interrupt 0x%x after 0x%lx of 0x%lx frames in period\n",
  1013. READ_AUDIO_STATUS(cif->hwport),
  1014. bytes_to_frames(runtime, pos),
  1015. runtime->period_size);
  1016. j = 0;
  1017. if (pos >= period_bytes) {
  1018. j++;
  1019. while (pos >= period_bytes)
  1020. pos -= period_bytes;
  1021. }
  1022. data->oldpos = pos;
  1023. if (j > 0)
  1024. snd_pcm_period_elapsed(substream[i]);
  1025. }
  1026. }
  1027. }
  1028. return IRQ_HANDLED;
  1029. }
  1030. static int riptide_suspend(struct device *dev)
  1031. {
  1032. struct snd_card *card = dev_get_drvdata(dev);
  1033. struct snd_riptide *chip = card->private_data;
  1034. chip->in_suspend = 1;
  1035. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1036. snd_ac97_suspend(chip->ac97);
  1037. return 0;
  1038. }
  1039. static int riptide_resume(struct device *dev)
  1040. {
  1041. struct snd_card *card = dev_get_drvdata(dev);
  1042. struct snd_riptide *chip = card->private_data;
  1043. snd_riptide_initialize(chip);
  1044. snd_ac97_resume(chip->ac97);
  1045. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1046. chip->in_suspend = 0;
  1047. return 0;
  1048. }
  1049. static DEFINE_SIMPLE_DEV_PM_OPS(riptide_pm, riptide_suspend, riptide_resume);
  1050. static int try_to_load_firmware(struct cmdif *cif, struct snd_riptide *chip)
  1051. {
  1052. union firmware_version firmware = { .ret = CMDRET_ZERO };
  1053. int i, timeout, err;
  1054. for (i = 0; i < 2; i++) {
  1055. WRITE_PORT_ULONG(cif->hwport->port[i].data1, 0);
  1056. WRITE_PORT_ULONG(cif->hwport->port[i].data2, 0);
  1057. }
  1058. SET_GRESET(cif->hwport);
  1059. udelay(100);
  1060. UNSET_GRESET(cif->hwport);
  1061. udelay(100);
  1062. for (timeout = 100000; --timeout; udelay(10)) {
  1063. if (IS_READY(cif->hwport) && !IS_GERR(cif->hwport))
  1064. break;
  1065. }
  1066. if (!timeout) {
  1067. dev_err(cif->dev,
  1068. "Riptide: device not ready, audio status: 0x%x ready: %d gerr: %d\n",
  1069. READ_AUDIO_STATUS(cif->hwport),
  1070. IS_READY(cif->hwport), IS_GERR(cif->hwport));
  1071. return -EIO;
  1072. } else {
  1073. dev_dbg(cif->dev,
  1074. "Riptide: audio status: 0x%x ready: %d gerr: %d\n",
  1075. READ_AUDIO_STATUS(cif->hwport),
  1076. IS_READY(cif->hwport), IS_GERR(cif->hwport));
  1077. }
  1078. SEND_GETV(cif, &firmware.ret);
  1079. dev_dbg(cif->dev,
  1080. "Firmware version: ASIC: %d CODEC %d AUXDSP %d PROG %d\n",
  1081. firmware.firmware.ASIC, firmware.firmware.CODEC,
  1082. firmware.firmware.AUXDSP, firmware.firmware.PROG);
  1083. if (!chip)
  1084. return 1;
  1085. for (i = 0; i < FIRMWARE_VERSIONS; i++) {
  1086. if (!memcmp(&firmware_versions[i], &firmware, sizeof(firmware)))
  1087. return 1; /* OK */
  1088. }
  1089. dev_dbg(cif->dev, "Writing Firmware\n");
  1090. if (!chip->fw_entry) {
  1091. err = request_firmware(&chip->fw_entry, "riptide.hex",
  1092. &chip->pci->dev);
  1093. if (err) {
  1094. dev_err(cif->dev,
  1095. "Riptide: Firmware not available %d\n", err);
  1096. return -EIO;
  1097. }
  1098. }
  1099. err = loadfirmware(cif, chip->fw_entry->data, chip->fw_entry->size);
  1100. if (err) {
  1101. dev_err(cif->dev,
  1102. "Riptide: Could not load firmware %d\n", err);
  1103. return err;
  1104. }
  1105. chip->firmware = firmware;
  1106. return 1; /* OK */
  1107. }
  1108. static int riptide_reset(struct cmdif *cif, struct snd_riptide *chip)
  1109. {
  1110. union cmdret rptr = CMDRET_ZERO;
  1111. int err, tries;
  1112. if (!cif)
  1113. return -EINVAL;
  1114. cif->cmdcnt = 0;
  1115. cif->cmdtime = 0;
  1116. cif->cmdtimemax = 0;
  1117. cif->cmdtimemin = 0xffffffff;
  1118. cif->errcnt = 0;
  1119. cif->is_reset = 0;
  1120. tries = RESET_TRIES;
  1121. do {
  1122. err = try_to_load_firmware(cif, chip);
  1123. if (err < 0)
  1124. return err;
  1125. } while (!err && --tries);
  1126. SEND_SACR(cif, 0, AC97_RESET);
  1127. SEND_RACR(cif, AC97_RESET, &rptr);
  1128. dev_dbg(cif->dev, "AC97: 0x%x 0x%x\n", rptr.retlongs[0], rptr.retlongs[1]);
  1129. SEND_PLST(cif, 0);
  1130. SEND_SLST(cif, 0);
  1131. SEND_DLST(cif, 0);
  1132. SEND_ALST(cif, 0);
  1133. SEND_KDMA(cif);
  1134. writearm(cif, 0x301F8, 1, 1);
  1135. writearm(cif, 0x301F4, 1, 1);
  1136. SEND_LSEL(cif, MODEM_CMD, 0, 0, MODEM_INTDEC, MODEM_MERGER,
  1137. MODEM_SPLITTER, MODEM_MIXER);
  1138. setmixer(cif, MODEM_MIXER, 0x7fff, 0x7fff);
  1139. alloclbuspath(cif, ARM2LBUS_FIFO13, lbus_play_modem, NULL, NULL);
  1140. SEND_LSEL(cif, FM_CMD, 0, 0, FM_INTDEC, FM_MERGER, FM_SPLITTER,
  1141. FM_MIXER);
  1142. setmixer(cif, FM_MIXER, 0x7fff, 0x7fff);
  1143. writearm(cif, 0x30648 + FM_MIXER * 4, 0x01, 0x00000005);
  1144. writearm(cif, 0x301A8, 0x02, 0x00000002);
  1145. writearm(cif, 0x30264, 0x08, 0xffffffff);
  1146. alloclbuspath(cif, OPL3_SAMPLE, lbus_play_opl3, NULL, NULL);
  1147. SEND_SSRC(cif, I2S_INTDEC, 48000,
  1148. ((u32) I2S_RATE * 65536) / 48000,
  1149. ((u32) I2S_RATE * 65536) % 48000);
  1150. SEND_LSEL(cif, I2S_CMD0, 0, 0, I2S_INTDEC, I2S_MERGER, I2S_SPLITTER,
  1151. I2S_MIXER);
  1152. SEND_SI2S(cif, 1);
  1153. alloclbuspath(cif, ARM2LBUS_FIFO0, lbus_play_i2s, NULL, NULL);
  1154. alloclbuspath(cif, DIGITAL_MIXER_OUT0, lbus_play_out, NULL, NULL);
  1155. alloclbuspath(cif, DIGITAL_MIXER_OUT0, lbus_play_outhp, NULL, NULL);
  1156. SET_AIACK(cif->hwport);
  1157. SET_AIE(cif->hwport);
  1158. SET_AIACK(cif->hwport);
  1159. cif->is_reset = 1;
  1160. return 0;
  1161. }
  1162. static const struct snd_pcm_hardware snd_riptide_playback = {
  1163. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1164. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1165. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP_VALID),
  1166. .formats =
  1167. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8
  1168. | SNDRV_PCM_FMTBIT_U16_LE,
  1169. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  1170. .rate_min = 5500,
  1171. .rate_max = 48000,
  1172. .channels_min = 1,
  1173. .channels_max = 2,
  1174. .buffer_bytes_max = (64 * 1024),
  1175. .period_bytes_min = PAGE_SIZE >> 1,
  1176. .period_bytes_max = PAGE_SIZE << 8,
  1177. .periods_min = 2,
  1178. .periods_max = 64,
  1179. .fifo_size = 0,
  1180. };
  1181. static const struct snd_pcm_hardware snd_riptide_capture = {
  1182. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1183. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1184. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_MMAP_VALID),
  1185. .formats =
  1186. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8
  1187. | SNDRV_PCM_FMTBIT_U16_LE,
  1188. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  1189. .rate_min = 5500,
  1190. .rate_max = 48000,
  1191. .channels_min = 1,
  1192. .channels_max = 2,
  1193. .buffer_bytes_max = (64 * 1024),
  1194. .period_bytes_min = PAGE_SIZE >> 1,
  1195. .period_bytes_max = PAGE_SIZE << 3,
  1196. .periods_min = 2,
  1197. .periods_max = 64,
  1198. .fifo_size = 0,
  1199. };
  1200. static snd_pcm_uframes_t snd_riptide_pointer(struct snd_pcm_substream
  1201. *substream)
  1202. {
  1203. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1204. struct snd_pcm_runtime *runtime = substream->runtime;
  1205. struct pcmhw *data = get_pcmhwdev(substream);
  1206. struct cmdif *cif = chip->cif;
  1207. union cmdret rptr = CMDRET_ZERO;
  1208. snd_pcm_uframes_t ret;
  1209. SEND_GPOS(cif, 0, data->id, &rptr);
  1210. if (data->size && runtime->period_size) {
  1211. dev_dbg(cif->dev,
  1212. "pointer stream %d position 0x%x(0x%x in buffer) bytes 0x%lx(0x%lx in period) frames\n",
  1213. data->id, rptr.retlongs[1], rptr.retlongs[1] % data->size,
  1214. bytes_to_frames(runtime, rptr.retlongs[1]),
  1215. bytes_to_frames(runtime,
  1216. rptr.retlongs[1]) % runtime->period_size);
  1217. if (rptr.retlongs[1] > data->pointer)
  1218. ret =
  1219. bytes_to_frames(runtime,
  1220. rptr.retlongs[1] % data->size);
  1221. else
  1222. ret =
  1223. bytes_to_frames(runtime,
  1224. data->pointer % data->size);
  1225. } else {
  1226. dev_dbg(cif->dev,
  1227. "stream not started or strange parms (%d %ld)\n",
  1228. data->size, runtime->period_size);
  1229. ret = bytes_to_frames(runtime, 0);
  1230. }
  1231. return ret;
  1232. }
  1233. static int snd_riptide_trigger(struct snd_pcm_substream *substream, int cmd)
  1234. {
  1235. int i, j;
  1236. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1237. struct pcmhw *data = get_pcmhwdev(substream);
  1238. struct cmdif *cif = chip->cif;
  1239. union cmdret rptr = CMDRET_ZERO;
  1240. spin_lock(&chip->lock);
  1241. switch (cmd) {
  1242. case SNDRV_PCM_TRIGGER_START:
  1243. case SNDRV_PCM_TRIGGER_RESUME:
  1244. if (!(data->state & ST_PLAY)) {
  1245. SEND_SSTR(cif, data->id, data->sgdlist.addr);
  1246. SET_AIE(cif->hwport);
  1247. data->state = ST_PLAY;
  1248. if (data->mixer != 0xff)
  1249. setmixer(cif, data->mixer, 0x7fff, 0x7fff);
  1250. chip->openstreams++;
  1251. data->oldpos = 0;
  1252. data->pointer = 0;
  1253. }
  1254. break;
  1255. case SNDRV_PCM_TRIGGER_STOP:
  1256. case SNDRV_PCM_TRIGGER_SUSPEND:
  1257. if (data->mixer != 0xff)
  1258. setmixer(cif, data->mixer, 0, 0);
  1259. setmixer(cif, data->mixer, 0, 0);
  1260. SEND_KSTR(cif, data->id);
  1261. data->state = ST_STOP;
  1262. chip->openstreams--;
  1263. j = 0;
  1264. do {
  1265. i = rptr.retlongs[1];
  1266. SEND_GPOS(cif, 0, data->id, &rptr);
  1267. udelay(1);
  1268. } while (i != rptr.retlongs[1] && j++ < MAX_WRITE_RETRY);
  1269. if (j > MAX_WRITE_RETRY)
  1270. dev_err(cif->dev, "Riptide: Could not stop stream!");
  1271. break;
  1272. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  1273. if (!(data->state & ST_PAUSE)) {
  1274. SEND_PSTR(cif, data->id);
  1275. data->state |= ST_PAUSE;
  1276. chip->openstreams--;
  1277. }
  1278. break;
  1279. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  1280. if (data->state & ST_PAUSE) {
  1281. SEND_SSTR(cif, data->id, data->sgdlist.addr);
  1282. data->state &= ~ST_PAUSE;
  1283. chip->openstreams++;
  1284. }
  1285. break;
  1286. default:
  1287. spin_unlock(&chip->lock);
  1288. return -EINVAL;
  1289. }
  1290. spin_unlock(&chip->lock);
  1291. return 0;
  1292. }
  1293. static int snd_riptide_prepare(struct snd_pcm_substream *substream)
  1294. {
  1295. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1296. struct snd_pcm_runtime *runtime = substream->runtime;
  1297. struct pcmhw *data = get_pcmhwdev(substream);
  1298. struct cmdif *cif = chip->cif;
  1299. const unsigned char *lbuspath = NULL;
  1300. unsigned int rate, channels;
  1301. int err = 0;
  1302. snd_pcm_format_t format;
  1303. if (snd_BUG_ON(!cif || !data))
  1304. return -EINVAL;
  1305. dev_dbg(cif->dev, "prepare id %d ch: %d f:0x%x r:%d\n", data->id,
  1306. runtime->channels, runtime->format, runtime->rate);
  1307. spin_lock_irq(&chip->lock);
  1308. channels = runtime->channels;
  1309. format = runtime->format;
  1310. rate = runtime->rate;
  1311. switch (channels) {
  1312. case 1:
  1313. if (rate == 48000 && format == SNDRV_PCM_FORMAT_S16_LE)
  1314. lbuspath = data->paths.noconv;
  1315. else
  1316. lbuspath = data->paths.mono;
  1317. break;
  1318. case 2:
  1319. if (rate == 48000 && format == SNDRV_PCM_FORMAT_S16_LE)
  1320. lbuspath = data->paths.noconv;
  1321. else
  1322. lbuspath = data->paths.stereo;
  1323. break;
  1324. }
  1325. dev_dbg(cif->dev, "use sgdlist at 0x%p\n", data->sgdlist.area);
  1326. if (data->sgdlist.area) {
  1327. unsigned int i, j, size, pages, f, pt, period;
  1328. struct sgd *c, *p = NULL;
  1329. size = frames_to_bytes(runtime, runtime->buffer_size);
  1330. period = frames_to_bytes(runtime, runtime->period_size);
  1331. f = PAGE_SIZE;
  1332. while ((size + (f >> 1) - 1) <= (f << 7) && (f << 1) > period)
  1333. f = f >> 1;
  1334. pages = DIV_ROUND_UP(size, f);
  1335. data->size = size;
  1336. data->pages = pages;
  1337. dev_dbg(cif->dev,
  1338. "create sgd size: 0x%x pages %d of size 0x%x for period 0x%x\n",
  1339. size, pages, f, period);
  1340. pt = 0;
  1341. j = 0;
  1342. for (i = 0; i < pages; i++) {
  1343. unsigned int ofs, addr;
  1344. c = &data->sgdbuf[i];
  1345. if (p)
  1346. p->dwNextLink = cpu_to_le32(data->sgdlist.addr +
  1347. (i *
  1348. sizeof(struct
  1349. sgd)));
  1350. c->dwNextLink = cpu_to_le32(data->sgdlist.addr);
  1351. ofs = j << PAGE_SHIFT;
  1352. addr = snd_pcm_sgbuf_get_addr(substream, ofs) + pt;
  1353. c->dwSegPtrPhys = cpu_to_le32(addr);
  1354. pt = (pt + f) % PAGE_SIZE;
  1355. if (pt == 0)
  1356. j++;
  1357. c->dwSegLen = cpu_to_le32(f);
  1358. c->dwStat_Ctl =
  1359. cpu_to_le32(IEOB_ENABLE | IEOS_ENABLE |
  1360. IEOC_ENABLE);
  1361. p = c;
  1362. size -= f;
  1363. }
  1364. data->sgdbuf[i].dwSegLen = cpu_to_le32(size);
  1365. }
  1366. if (lbuspath && lbuspath != data->lbuspath) {
  1367. if (data->lbuspath)
  1368. freelbuspath(cif, data->source, data->lbuspath);
  1369. alloclbuspath(cif, data->source, lbuspath,
  1370. &data->mixer, data->intdec);
  1371. data->lbuspath = lbuspath;
  1372. data->rate = 0;
  1373. }
  1374. if (data->rate != rate || data->format != format ||
  1375. data->channels != channels) {
  1376. data->rate = rate;
  1377. data->format = format;
  1378. data->channels = channels;
  1379. if (setsampleformat
  1380. (cif, data->mixer, data->id, channels, format)
  1381. || setsamplerate(cif, data->intdec, rate))
  1382. err = -EIO;
  1383. }
  1384. spin_unlock_irq(&chip->lock);
  1385. return err;
  1386. }
  1387. static int
  1388. snd_riptide_hw_params(struct snd_pcm_substream *substream,
  1389. struct snd_pcm_hw_params *hw_params)
  1390. {
  1391. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1392. struct pcmhw *data = get_pcmhwdev(substream);
  1393. struct snd_dma_buffer *sgdlist = &data->sgdlist;
  1394. int err;
  1395. dev_dbg(chip->card->dev, "hw params id %d (sgdlist: 0x%p 0x%lx %d)\n",
  1396. data->id, sgdlist->area, (unsigned long)sgdlist->addr,
  1397. (int)sgdlist->bytes);
  1398. if (sgdlist->area)
  1399. snd_dma_free_pages(sgdlist);
  1400. err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
  1401. sizeof(struct sgd) * (DESC_MAX_MASK + 1),
  1402. sgdlist);
  1403. if (err < 0) {
  1404. dev_err(chip->card->dev,
  1405. "Riptide: failed to alloc %d dma bytes\n",
  1406. (int)sizeof(struct sgd) * (DESC_MAX_MASK + 1));
  1407. return err;
  1408. }
  1409. data->sgdbuf = (struct sgd *)sgdlist->area;
  1410. return 0;
  1411. }
  1412. static int snd_riptide_hw_free(struct snd_pcm_substream *substream)
  1413. {
  1414. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1415. struct pcmhw *data = get_pcmhwdev(substream);
  1416. struct cmdif *cif = chip->cif;
  1417. if (cif && data) {
  1418. if (data->lbuspath)
  1419. freelbuspath(cif, data->source, data->lbuspath);
  1420. data->lbuspath = NULL;
  1421. data->source = 0xff;
  1422. data->intdec[0] = 0xff;
  1423. data->intdec[1] = 0xff;
  1424. if (data->sgdlist.area) {
  1425. snd_dma_free_pages(&data->sgdlist);
  1426. data->sgdlist.area = NULL;
  1427. }
  1428. }
  1429. return 0;
  1430. }
  1431. static int snd_riptide_playback_open(struct snd_pcm_substream *substream)
  1432. {
  1433. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1434. struct snd_pcm_runtime *runtime = substream->runtime;
  1435. struct pcmhw *data;
  1436. int sub_num = substream->number;
  1437. chip->playback_substream[sub_num] = substream;
  1438. runtime->hw = snd_riptide_playback;
  1439. data = kzalloc(sizeof(struct pcmhw), GFP_KERNEL);
  1440. if (data == NULL)
  1441. return -ENOMEM;
  1442. data->paths = lbus_play_paths[sub_num];
  1443. data->id = play_ids[sub_num];
  1444. data->source = play_sources[sub_num];
  1445. data->intdec[0] = 0xff;
  1446. data->intdec[1] = 0xff;
  1447. data->state = ST_STOP;
  1448. runtime->private_data = data;
  1449. return snd_pcm_hw_constraint_integer(runtime,
  1450. SNDRV_PCM_HW_PARAM_PERIODS);
  1451. }
  1452. static int snd_riptide_capture_open(struct snd_pcm_substream *substream)
  1453. {
  1454. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1455. struct snd_pcm_runtime *runtime = substream->runtime;
  1456. struct pcmhw *data;
  1457. chip->capture_substream = substream;
  1458. runtime->hw = snd_riptide_capture;
  1459. data = kzalloc(sizeof(struct pcmhw), GFP_KERNEL);
  1460. if (data == NULL)
  1461. return -ENOMEM;
  1462. data->paths = lbus_rec_path;
  1463. data->id = PADC;
  1464. data->source = ACLNK2PADC;
  1465. data->intdec[0] = 0xff;
  1466. data->intdec[1] = 0xff;
  1467. data->state = ST_STOP;
  1468. runtime->private_data = data;
  1469. return snd_pcm_hw_constraint_integer(runtime,
  1470. SNDRV_PCM_HW_PARAM_PERIODS);
  1471. }
  1472. static int snd_riptide_playback_close(struct snd_pcm_substream *substream)
  1473. {
  1474. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1475. struct pcmhw *data = get_pcmhwdev(substream);
  1476. int sub_num = substream->number;
  1477. substream->runtime->private_data = NULL;
  1478. chip->playback_substream[sub_num] = NULL;
  1479. kfree(data);
  1480. return 0;
  1481. }
  1482. static int snd_riptide_capture_close(struct snd_pcm_substream *substream)
  1483. {
  1484. struct snd_riptide *chip = snd_pcm_substream_chip(substream);
  1485. struct pcmhw *data = get_pcmhwdev(substream);
  1486. substream->runtime->private_data = NULL;
  1487. chip->capture_substream = NULL;
  1488. kfree(data);
  1489. return 0;
  1490. }
  1491. static const struct snd_pcm_ops snd_riptide_playback_ops = {
  1492. .open = snd_riptide_playback_open,
  1493. .close = snd_riptide_playback_close,
  1494. .hw_params = snd_riptide_hw_params,
  1495. .hw_free = snd_riptide_hw_free,
  1496. .prepare = snd_riptide_prepare,
  1497. .trigger = snd_riptide_trigger,
  1498. .pointer = snd_riptide_pointer,
  1499. };
  1500. static const struct snd_pcm_ops snd_riptide_capture_ops = {
  1501. .open = snd_riptide_capture_open,
  1502. .close = snd_riptide_capture_close,
  1503. .hw_params = snd_riptide_hw_params,
  1504. .hw_free = snd_riptide_hw_free,
  1505. .prepare = snd_riptide_prepare,
  1506. .trigger = snd_riptide_trigger,
  1507. .pointer = snd_riptide_pointer,
  1508. };
  1509. static int snd_riptide_pcm(struct snd_riptide *chip, int device)
  1510. {
  1511. struct snd_pcm *pcm;
  1512. int err;
  1513. err = snd_pcm_new(chip->card, "RIPTIDE", device, PLAYBACK_SUBSTREAMS, 1,
  1514. &pcm);
  1515. if (err < 0)
  1516. return err;
  1517. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1518. &snd_riptide_playback_ops);
  1519. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1520. &snd_riptide_capture_ops);
  1521. pcm->private_data = chip;
  1522. pcm->info_flags = 0;
  1523. strcpy(pcm->name, "RIPTIDE");
  1524. chip->pcm = pcm;
  1525. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1526. &chip->pci->dev, 64 * 1024, 128 * 1024);
  1527. return 0;
  1528. }
  1529. static irqreturn_t
  1530. snd_riptide_interrupt(int irq, void *dev_id)
  1531. {
  1532. struct snd_riptide *chip = dev_id;
  1533. struct cmdif *cif = chip->cif;
  1534. irqreturn_t ret = IRQ_HANDLED;
  1535. if (cif) {
  1536. chip->received_irqs++;
  1537. if (IS_EOBIRQ(cif->hwport) || IS_EOSIRQ(cif->hwport) ||
  1538. IS_EOCIRQ(cif->hwport)) {
  1539. chip->handled_irqs++;
  1540. ret = IRQ_WAKE_THREAD;
  1541. }
  1542. if (chip->rmidi && IS_MPUIRQ(cif->hwport)) {
  1543. chip->handled_irqs++;
  1544. snd_mpu401_uart_interrupt(irq,
  1545. chip->rmidi->private_data);
  1546. }
  1547. SET_AIACK(cif->hwport);
  1548. }
  1549. return ret;
  1550. }
  1551. static void
  1552. snd_riptide_codec_write(struct snd_ac97 *ac97, unsigned short reg,
  1553. unsigned short val)
  1554. {
  1555. struct snd_riptide *chip = ac97->private_data;
  1556. struct cmdif *cif = chip->cif;
  1557. union cmdret rptr = CMDRET_ZERO;
  1558. int i = 0;
  1559. if (snd_BUG_ON(!cif))
  1560. return;
  1561. dev_dbg(cif->dev, "Write AC97 reg 0x%x 0x%x\n", reg, val);
  1562. do {
  1563. SEND_SACR(cif, val, reg);
  1564. SEND_RACR(cif, reg, &rptr);
  1565. } while (rptr.retwords[1] != val && i++ < MAX_WRITE_RETRY);
  1566. if (i > MAX_WRITE_RETRY)
  1567. dev_dbg(cif->dev, "Write AC97 reg failed\n");
  1568. }
  1569. static unsigned short snd_riptide_codec_read(struct snd_ac97 *ac97,
  1570. unsigned short reg)
  1571. {
  1572. struct snd_riptide *chip = ac97->private_data;
  1573. struct cmdif *cif = chip->cif;
  1574. union cmdret rptr = CMDRET_ZERO;
  1575. if (snd_BUG_ON(!cif))
  1576. return 0;
  1577. if (SEND_RACR(cif, reg, &rptr) != 0)
  1578. SEND_RACR(cif, reg, &rptr);
  1579. dev_dbg(cif->dev, "Read AC97 reg 0x%x got 0x%x\n", reg, rptr.retwords[1]);
  1580. return rptr.retwords[1];
  1581. }
  1582. static int snd_riptide_initialize(struct snd_riptide *chip)
  1583. {
  1584. struct cmdif *cif;
  1585. unsigned int device_id;
  1586. int err;
  1587. if (snd_BUG_ON(!chip))
  1588. return -EINVAL;
  1589. cif = chip->cif;
  1590. if (!cif) {
  1591. cif = kzalloc(sizeof(struct cmdif), GFP_KERNEL);
  1592. if (!cif)
  1593. return -ENOMEM;
  1594. cif->dev = chip->card->dev;
  1595. cif->hwport = (struct riptideport *)chip->port;
  1596. spin_lock_init(&cif->lock);
  1597. chip->cif = cif;
  1598. }
  1599. cif->is_reset = 0;
  1600. err = riptide_reset(cif, chip);
  1601. if (err)
  1602. return err;
  1603. device_id = chip->device_id;
  1604. switch (device_id) {
  1605. case 0x4310:
  1606. case 0x4320:
  1607. case 0x4330:
  1608. dev_dbg(cif->dev, "Modem enable?\n");
  1609. SEND_SETDPLL(cif);
  1610. break;
  1611. }
  1612. dev_dbg(cif->dev, "Enabling MPU IRQs\n");
  1613. if (chip->rmidi)
  1614. SET_EMPUIRQ(cif->hwport);
  1615. return err;
  1616. }
  1617. static void snd_riptide_free(struct snd_card *card)
  1618. {
  1619. struct snd_riptide *chip = card->private_data;
  1620. struct cmdif *cif;
  1621. cif = chip->cif;
  1622. if (cif) {
  1623. SET_GRESET(cif->hwport);
  1624. udelay(100);
  1625. UNSET_GRESET(cif->hwport);
  1626. kfree(chip->cif);
  1627. }
  1628. release_firmware(chip->fw_entry);
  1629. }
  1630. static int
  1631. snd_riptide_create(struct snd_card *card, struct pci_dev *pci)
  1632. {
  1633. struct snd_riptide *chip = card->private_data;
  1634. struct riptideport *hwport;
  1635. int err;
  1636. err = pcim_enable_device(pci);
  1637. if (err < 0)
  1638. return err;
  1639. spin_lock_init(&chip->lock);
  1640. chip->card = card;
  1641. chip->pci = pci;
  1642. chip->irq = -1;
  1643. chip->openstreams = 0;
  1644. chip->port = pci_resource_start(pci, 0);
  1645. chip->received_irqs = 0;
  1646. chip->handled_irqs = 0;
  1647. chip->cif = NULL;
  1648. card->private_free = snd_riptide_free;
  1649. err = pci_request_regions(pci, "RIPTIDE");
  1650. if (err < 0)
  1651. return err;
  1652. hwport = (struct riptideport *)chip->port;
  1653. UNSET_AIE(hwport);
  1654. if (devm_request_threaded_irq(&pci->dev, pci->irq,
  1655. snd_riptide_interrupt,
  1656. riptide_handleirq, IRQF_SHARED,
  1657. KBUILD_MODNAME, chip)) {
  1658. dev_err(&pci->dev, "Riptide: unable to grab IRQ %d\n",
  1659. pci->irq);
  1660. return -EBUSY;
  1661. }
  1662. chip->irq = pci->irq;
  1663. card->sync_irq = chip->irq;
  1664. chip->device_id = pci->device;
  1665. pci_set_master(pci);
  1666. err = snd_riptide_initialize(chip);
  1667. if (err < 0)
  1668. return err;
  1669. return 0;
  1670. }
  1671. static void
  1672. snd_riptide_proc_read(struct snd_info_entry *entry,
  1673. struct snd_info_buffer *buffer)
  1674. {
  1675. struct snd_riptide *chip = entry->private_data;
  1676. struct pcmhw *data;
  1677. int i;
  1678. struct cmdif *cif = NULL;
  1679. unsigned char p[256];
  1680. unsigned short rval = 0, lval = 0;
  1681. unsigned int rate;
  1682. if (!chip)
  1683. return;
  1684. snd_iprintf(buffer, "%s\n\n", chip->card->longname);
  1685. snd_iprintf(buffer, "Device ID: 0x%x\nReceived IRQs: (%ld)%ld\nPorts:",
  1686. chip->device_id, chip->handled_irqs, chip->received_irqs);
  1687. for (i = 0; i < 64; i += 4)
  1688. snd_iprintf(buffer, "%c%02x: %08x",
  1689. (i % 16) ? ' ' : '\n', i, inl(chip->port + i));
  1690. cif = chip->cif;
  1691. if (cif) {
  1692. snd_iprintf(buffer,
  1693. "\nVersion: ASIC: %d CODEC: %d AUXDSP: %d PROG: %d",
  1694. chip->firmware.firmware.ASIC,
  1695. chip->firmware.firmware.CODEC,
  1696. chip->firmware.firmware.AUXDSP,
  1697. chip->firmware.firmware.PROG);
  1698. snd_iprintf(buffer, "\nDigital mixer:");
  1699. for (i = 0; i < 12; i++) {
  1700. getmixer(cif, i, &rval, &lval);
  1701. snd_iprintf(buffer, "\n %d: %d %d", i, rval, lval);
  1702. }
  1703. snd_iprintf(buffer,
  1704. "\nARM Commands num: %d failed: %d time: %d max: %d min: %d",
  1705. cif->cmdcnt, cif->errcnt,
  1706. cif->cmdtime, cif->cmdtimemax, cif->cmdtimemin);
  1707. }
  1708. snd_iprintf(buffer, "\nOpen streams %d:\n", chip->openstreams);
  1709. for (i = 0; i < PLAYBACK_SUBSTREAMS; i++) {
  1710. if (!chip->playback_substream[i] ||
  1711. !chip->playback_substream[i]->runtime)
  1712. continue;
  1713. data = chip->playback_substream[i]->runtime->private_data;
  1714. if (data) {
  1715. snd_iprintf(buffer,
  1716. "stream: %d mixer: %d source: %d (%d,%d)\n",
  1717. data->id, data->mixer, data->source,
  1718. data->intdec[0], data->intdec[1]);
  1719. if (!(getsamplerate(cif, data->intdec, &rate)))
  1720. snd_iprintf(buffer, "rate: %d\n", rate);
  1721. }
  1722. }
  1723. if (chip->capture_substream && chip->capture_substream->runtime) {
  1724. data = chip->capture_substream->runtime->private_data;
  1725. if (data) {
  1726. snd_iprintf(buffer,
  1727. "stream: %d mixer: %d source: %d (%d,%d)\n",
  1728. data->id, data->mixer,
  1729. data->source, data->intdec[0], data->intdec[1]);
  1730. if (!(getsamplerate(cif, data->intdec, &rate)))
  1731. snd_iprintf(buffer, "rate: %d\n", rate);
  1732. }
  1733. }
  1734. snd_iprintf(buffer, "Paths:\n");
  1735. i = getpaths(cif, p);
  1736. while (i >= 2) {
  1737. i -= 2;
  1738. snd_iprintf(buffer, "%x->%x ", p[i], p[i + 1]);
  1739. }
  1740. snd_iprintf(buffer, "\n");
  1741. }
  1742. static void snd_riptide_proc_init(struct snd_riptide *chip)
  1743. {
  1744. snd_card_ro_proc_new(chip->card, "riptide", chip,
  1745. snd_riptide_proc_read);
  1746. }
  1747. static int snd_riptide_mixer(struct snd_riptide *chip)
  1748. {
  1749. struct snd_ac97_bus *pbus;
  1750. struct snd_ac97_template ac97;
  1751. int err = 0;
  1752. static const struct snd_ac97_bus_ops ops = {
  1753. .write = snd_riptide_codec_write,
  1754. .read = snd_riptide_codec_read,
  1755. };
  1756. memset(&ac97, 0, sizeof(ac97));
  1757. ac97.private_data = chip;
  1758. ac97.scaps = AC97_SCAP_SKIP_MODEM;
  1759. err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus);
  1760. if (err < 0)
  1761. return err;
  1762. chip->ac97_bus = pbus;
  1763. ac97.pci = chip->pci;
  1764. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1765. if (err < 0)
  1766. return err;
  1767. return err;
  1768. }
  1769. #ifdef SUPPORT_JOYSTICK
  1770. static int
  1771. snd_riptide_joystick_probe(struct pci_dev *pci, const struct pci_device_id *id)
  1772. {
  1773. static int dev;
  1774. struct gameport *gameport;
  1775. int ret;
  1776. if (dev >= SNDRV_CARDS)
  1777. return -ENODEV;
  1778. if (!enable[dev]) {
  1779. ret = -ENOENT;
  1780. goto inc_dev;
  1781. }
  1782. if (!joystick_port[dev]) {
  1783. ret = 0;
  1784. goto inc_dev;
  1785. }
  1786. gameport = gameport_allocate_port();
  1787. if (!gameport) {
  1788. ret = -ENOMEM;
  1789. goto inc_dev;
  1790. }
  1791. if (!request_region(joystick_port[dev], 8, "Riptide gameport")) {
  1792. dev_err(&pci->dev,
  1793. "Riptide: cannot grab gameport 0x%x\n",
  1794. joystick_port[dev]);
  1795. gameport_free_port(gameport);
  1796. ret = -EBUSY;
  1797. goto inc_dev;
  1798. }
  1799. gameport->io = joystick_port[dev];
  1800. gameport_register_port(gameport);
  1801. pci_set_drvdata(pci, gameport);
  1802. ret = 0;
  1803. inc_dev:
  1804. dev++;
  1805. return ret;
  1806. }
  1807. static void snd_riptide_joystick_remove(struct pci_dev *pci)
  1808. {
  1809. struct gameport *gameport = pci_get_drvdata(pci);
  1810. if (gameport) {
  1811. release_region(gameport->io, 8);
  1812. gameport_unregister_port(gameport);
  1813. }
  1814. }
  1815. #endif
  1816. static int
  1817. __snd_card_riptide_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
  1818. {
  1819. static int dev;
  1820. struct snd_card *card;
  1821. struct snd_riptide *chip;
  1822. unsigned short val;
  1823. int err;
  1824. if (dev >= SNDRV_CARDS)
  1825. return -ENODEV;
  1826. if (!enable[dev]) {
  1827. dev++;
  1828. return -ENOENT;
  1829. }
  1830. err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1831. sizeof(*chip), &card);
  1832. if (err < 0)
  1833. return err;
  1834. chip = card->private_data;
  1835. err = snd_riptide_create(card, pci);
  1836. if (err < 0)
  1837. return err;
  1838. err = snd_riptide_pcm(chip, 0);
  1839. if (err < 0)
  1840. return err;
  1841. err = snd_riptide_mixer(chip);
  1842. if (err < 0)
  1843. return err;
  1844. val = LEGACY_ENABLE_ALL;
  1845. if (opl3_port[dev])
  1846. val |= LEGACY_ENABLE_FM;
  1847. #ifdef SUPPORT_JOYSTICK
  1848. if (joystick_port[dev])
  1849. val |= LEGACY_ENABLE_GAMEPORT;
  1850. #endif
  1851. if (mpu_port[dev])
  1852. val |= LEGACY_ENABLE_MPU_INT | LEGACY_ENABLE_MPU;
  1853. val |= (chip->irq << 4) & 0xf0;
  1854. pci_write_config_word(chip->pci, PCI_EXT_Legacy_Mask, val);
  1855. if (mpu_port[dev]) {
  1856. val = mpu_port[dev];
  1857. pci_write_config_word(chip->pci, PCI_EXT_MPU_Base, val);
  1858. err = snd_mpu401_uart_new(card, 0, MPU401_HW_RIPTIDE,
  1859. val, MPU401_INFO_IRQ_HOOK, -1,
  1860. &chip->rmidi);
  1861. if (err < 0)
  1862. dev_warn(&pci->dev,
  1863. "Riptide: Can't Allocate MPU at 0x%x\n",
  1864. val);
  1865. else
  1866. chip->mpuaddr = val;
  1867. }
  1868. if (opl3_port[dev]) {
  1869. val = opl3_port[dev];
  1870. pci_write_config_word(chip->pci, PCI_EXT_FM_Base, val);
  1871. err = snd_opl3_create(card, val, val + 2,
  1872. OPL3_HW_RIPTIDE, 0, &chip->opl3);
  1873. if (err < 0)
  1874. dev_warn(&pci->dev,
  1875. "Riptide: Can't Allocate OPL3 at 0x%x\n",
  1876. val);
  1877. else {
  1878. chip->opladdr = val;
  1879. err = snd_opl3_hwdep_new(chip->opl3, 0, 1, NULL);
  1880. if (err < 0)
  1881. dev_warn(&pci->dev,
  1882. "Riptide: Can't Allocate OPL3-HWDEP\n");
  1883. }
  1884. }
  1885. #ifdef SUPPORT_JOYSTICK
  1886. if (joystick_port[dev]) {
  1887. val = joystick_port[dev];
  1888. pci_write_config_word(chip->pci, PCI_EXT_Game_Base, val);
  1889. chip->gameaddr = val;
  1890. }
  1891. #endif
  1892. strcpy(card->driver, "RIPTIDE");
  1893. strcpy(card->shortname, "Riptide");
  1894. #ifdef SUPPORT_JOYSTICK
  1895. scnprintf(card->longname, sizeof(card->longname),
  1896. "%s at 0x%lx, irq %i mpu 0x%x opl3 0x%x gameport 0x%x",
  1897. card->shortname, chip->port, chip->irq, chip->mpuaddr,
  1898. chip->opladdr, chip->gameaddr);
  1899. #else
  1900. scnprintf(card->longname, sizeof(card->longname),
  1901. "%s at 0x%lx, irq %i mpu 0x%x opl3 0x%x",
  1902. card->shortname, chip->port, chip->irq, chip->mpuaddr,
  1903. chip->opladdr);
  1904. #endif
  1905. snd_riptide_proc_init(chip);
  1906. err = snd_card_register(card);
  1907. if (err < 0)
  1908. return err;
  1909. pci_set_drvdata(pci, card);
  1910. dev++;
  1911. return 0;
  1912. }
  1913. static int
  1914. snd_card_riptide_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
  1915. {
  1916. return snd_card_free_on_error(&pci->dev, __snd_card_riptide_probe(pci, pci_id));
  1917. }
  1918. static struct pci_driver driver = {
  1919. .name = KBUILD_MODNAME,
  1920. .id_table = snd_riptide_ids,
  1921. .probe = snd_card_riptide_probe,
  1922. .driver = {
  1923. .pm = &riptide_pm,
  1924. },
  1925. };
  1926. #ifdef SUPPORT_JOYSTICK
  1927. static struct pci_driver joystick_driver = {
  1928. .name = KBUILD_MODNAME "-joystick",
  1929. .id_table = snd_riptide_joystick_ids,
  1930. .probe = snd_riptide_joystick_probe,
  1931. .remove = snd_riptide_joystick_remove,
  1932. };
  1933. #endif
  1934. static int __init alsa_card_riptide_init(void)
  1935. {
  1936. int err;
  1937. err = pci_register_driver(&driver);
  1938. if (err < 0)
  1939. return err;
  1940. #if defined(SUPPORT_JOYSTICK)
  1941. err = pci_register_driver(&joystick_driver);
  1942. /* On failure unregister formerly registered audio driver */
  1943. if (err < 0)
  1944. pci_unregister_driver(&driver);
  1945. #endif
  1946. return err;
  1947. }
  1948. static void __exit alsa_card_riptide_exit(void)
  1949. {
  1950. pci_unregister_driver(&driver);
  1951. #if defined(SUPPORT_JOYSTICK)
  1952. pci_unregister_driver(&joystick_driver);
  1953. #endif
  1954. }
  1955. module_init(alsa_card_riptide_init);
  1956. module_exit(alsa_card_riptide_exit);