ark1668ed-bsp/linux/sound/soc/codecs/ak7604.c

/*
 * ak7604.c  --  audio driver for AK7604
 *
 * Copyright (C) 2017-2021 Asahi Kasei Microdevices Corporation
 *  Author                Date        Revision
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                      17/11/27        1.0
 *                      18/02/06        1.1
 *                      18/03/07        1.2
 *                      20/08/21        1.3 Kernel 4_14_XX
 *                      21/02/10        1.4
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include <linux/ioctl.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
#include <linux/spi/spi.h>
#include <linux/mutex.h>
#include <linux/firmware.h>
#include <linux/vmalloc.h>

#include <linux/regmap.h>
#include <linux/of_gpio.h>

#include "ak7604.h"
#include "ak7604_dsp_code.h"

//#define KERNEL_3_18_XX
//#define KERNEL_4_14_XX

//#define AK7604_DEBUG			//used at debug mode
//#define ARK_CARPLAY_MODE

#ifdef AK7604_DEBUG
#define akdbgprt printk
#else
#define akdbgprt(format, arg...) do {} while (0)
#endif

#define SND_SOC_SPI 1
#define SND_SOC_I2C 2

/* AK7604 Codec Private Data */
struct ak7604_priv {
	int control_type;
	struct snd_soc_component *component;
	struct spi_device *spi;
	struct i2c_client *i2c;
	struct regmap *regmap;
	int fs;

	int pdn_gpio;
	int MIRNo;
	int status;

	int dresetn;
	int DSPPramMode;
	int DSPCramMode;
	int DSPOfregMode;

	int PLLInput;  // 0 : XTI,   1 : BICK1 ...3 : BICK3
	int XtiFs;     // 0 : 12.288MHz,  1: 18.432MHz

	// 0:8kHz, 1:12kHz, 2:16kHz, 3:24kHz, 4:32kHz, 5:48kHz, 6:96kHz, 7:192kHz
	int SDfs[NUM_SYNCDOMAIN];

	// 0:64fs, 1:48fs, 2:32fs, 3:128fs, 4:256fs
	int SDBick[NUM_SYNCDOMAIN];

	// 0 : Slave Mode, 1 : Master
	int Master[NUM_SYNCDOMAIN];

	// 0 : Low,  1: PLLMCLK,  2:XTI, 3:BICK1, 4:BICK2, 5:BICK3
	int SDCks[NUM_SYNCDOMAIN];

	int TDMSDINbit[NUM_SDIO];
	int TDMSDOUTbit[NUM_SDIO];
	int DIEDGEbit[NUM_SDIO];
	int DOEDGEbit[NUM_SDIO];
	int DISLbit[NUM_SDIO];
	int DOSLbit[NUM_SDIO];

	int cramaddr;
	int cramcount;
	unsigned char cramvalue[48];

};

struct _ak7604_pd_handler {
	int ref_count;
	struct mutex lock;
	struct ak7604_priv *data;
} ak7604_pd_handler = {
	.ref_count = -1,
	.data = NULL,
};

/* ak7604 register cache & default register settings */
static const struct reg_default ak7604_reg[] = {
#ifndef ARK_CARPLAY_MODE
	//(soc-salve)
	//ark音频链路plan:1
	//ark(i2s1)<->ak7604(i2s2)
	//ark(i2s2)->fm1505->ak7604(i2s1)
	//ak7604(mic-i2s1)->fm1505->ark(i2s0)
	{ 0x0000, 0x0F },
	{ 0x0001, 0x07 },
	{ 0x0002, 0x90 },
	{ 0x0003, 0x04 },
	{ 0x0004, 0x03 }, // AK7604_04_SYNCDOMAIN_MS	//[011]:[bit1->ak7604-i2s1:master	 bit2->ak7604-i2s2:master		bit3->ak7604-i2s3:slave]
	{ 0x0005, 0x08 },
	{ 0x0006, 0x27 },
	{ 0x0007, 0x08 },
	{ 0x0008, 0x27 },
	{ 0x0009, 0x08 },
	{ 0x000A, 0x27 },
	{ 0x000B, 0x08 },
	{ 0x000C, 0x00 },
	{ 0x000D, 0x12 },//default:0x12		only for beidou:0x11
	{ 0x000E, 0x30 },
	{ 0x000F, 0x12 },
	{ 0x0010, 0x30 },
	{ 0x0011, 0x12 },////default:0x10		241010:0x11(SDADC->SD1)	0x12(SDADC->SD2)		//only for beidou:0x11(SDADC->SD1)
	{ 0x0012, 0x11 },
	{ 0x0013, 0x11 },
	{ 0x0014, 0x11 },//(default:0x11)	20241016:0x12
	{ 0x0015, 0x10 },
	{ 0x0016, 0x00 },
	{ 0x0017, 0x10 },
	{ 0x0018, 0x00 },
	{ 0x0019, 0x01 },//SDOUT1A Source Selector	"arecord: ADC->SDOUT1A(0x0E)"	//only for beidou:0x01
	{ 0x001A, 0x00 },
	{ 0x001B, 0x00 },
	{ 0x001C, 0x00 },
	{ 0x001D, 0x01 },//SDOUT2 Source Selector(default:0x00)	"arecord: ADC->SDOUT2(0x0E)"		20241016:DSPOUT2->SDOUT1(0x09)		//only for beidou:0x01
	{ 0x001E, 0x00 },//SDOUT3 Source Selector(default:0x09)	"arecord: SDOUT3->ADC(0x0E)"
	{ 0x001F, 0x0E },//DAC1 Source Selector(default:0x08), 20250811:0x0E(ADC) 	"Playback : SDIN1(0x01) -> DSP1 -> DAC1 (SYNC1_Slave)   or  SDIN2(0x05) -> DSP1 -> DAC1 (SYNC1_Slave)"
	{ 0x0020, 0x0A },//DAC2 Source Selector	0x0A
	{ 0x0021, 0x00 },//DAC3 Source Selector
	{ 0x0022, 0x01 },
	{ 0x0023, 0x05 },//(default:0x05)	20241016:0x0E
	{ 0x0024, 0x0F },
	{ 0x0025, 0x00 },
	{ 0x0026, 0x00 },
	{ 0x0027, 0x00 },
	{ 0x0028, 0x06 },
	{ 0x0029, 0x00 },
	{ 0x002A, 0x00 },
	{ 0x002B, 0x00 },
	{ 0x002C, 0x00 },
	{ 0x002D, 0x00 },
	{ 0x002E, 0x00 },
	{ 0x002F, 0x00 },
	{ 0x0030, 0x00 },
	{ 0x0031, 0x00 },
	{ 0x0032, 0x00 },
	{ 0x0033, 0x00 },
	{ 0x0034, 0x00 },
	{ 0x0035, 0x00 },
	{ 0x0036, 0x00 },
	{ 0x0037, 0x00 },
	{ 0x0038, 0x00 },
	{ 0x0039, 0x00 },
	{ 0x003A, 0x00 },
	{ 0x003B, 0x00 },
	{ 0x003C, 0x00 },
	{ 0x003D, 0x00 },
	{ 0x003E, 0x00 },
	{ 0x003F, 0x00 },
	{ 0x0040, 0x00 },
	{ 0x0041, 0x00 },
	{ 0x0042, 0x00 },
	{ 0x0043, 0x00 },
	{ 0x0044, 0x00 },
	{ 0x0045, 0x00 },
	{ 0x0046, 0x00 },
	{ 0x0047, 0x00 },
	{ 0x0048, 0x00 },
	{ 0x0049, 0x00 },
	{ 0x004A, 0x00 },
	{ 0x004B, 0x00 },
	{ 0x004C, 0x00 },
	{ 0x004D, 0x00 },
	{ 0x004E, 0x00 },
	{ 0x004F, 0x00 },
	{ 0x0050, 0x00 },
	{ 0x0051, 0xE1 },
	{ 0x0052, 0x00 },
	{ 0x0053, 0x00 },
	{ 0x0054, 0x00 },
	{ 0x0055, 0x00 },
	{ 0x0056, 0x00 },
	{ 0x0057, 0x00 },
	{ 0x0058, 0x00 },
	{ 0x0059, 0x00 },
	{ 0x005A, 0x00 },
	{ 0x005B, 0x00 },
	{ 0x005C, 0x00 },
	{ 0x005D, 0x00 },
	{ 0x005E, 0x00 },
	{ 0x005F, 0x00 },
	{ 0x0060, 0x00 },
	{ 0x0061, 0x00 },
	{ 0x0062, 0x00 },
	{ 0x0063, 0x00 },
	{ 0x0064, 0x00 },
	{ 0x0065, 0x00 },
	{ 0x0066, 0x00 },
	{ 0x0067, 0x00 },
	{ 0x0068, 0x00 },
	{ 0x0069, 0x00 },
	{ 0x006A, 0x00 },
	{ 0x006B, 0x00 },
	{ 0x006C, 0x00 },
	{ 0x006D, 0x00 },
	{ 0x006E, 0x00 },
	{ 0x006F, 0x00 },
	{ 0x0070, 0x00 },
	{ 0x0071, 0x00 },
	{ 0x0072, 0x00 },
	{ 0x0073, 0x0F },
	{ 0x0074, 0x00 },
	{ 0x0075, 0x00 },
	{ 0x0076, 0x00 },
	{ 0x0077, 0x00 },
	{ 0x0078, 0x00 },
	{ 0x0079, 0x00 },
	{ 0x007A, 0x00 },
	{ 0x007B, 0x00 },
	{ 0x007C, 0x00 },
	{ 0x007D, 0x00 },
	{ 0x007E, 0x00 },
	{ 0x007F, 0x00 },
	{ 0x0080, 0x00 },
	{ 0x0081, 0x00 },
	{ 0x0082, 0xFF },//MIC Input Volume L/R 	36dB
	{ 0x0083, 0x18 },//DAC1 Digital Volume L		default:0x18(0.0db)	4b(-40.5db)
	{ 0x0084, 0x18 },//DAC1 Digital Volume R		default:0x18		4b(-40.5db)
	{ 0x0085, 0x18 },//DAC2 Digital Volume L		default:0x18		4b(-40.5db)
	{ 0x0086, 0x18 },//DAC2 Digital Volume R		default:0x18		4b(-40.5db)
	{ 0x0087, 0x18 },//DAC3 Digital Volume L		default:0x18		4b(-40.5db)
	{ 0x0088, 0x18 },//DAC3 Digital Volume R		default:0x18		4b(-40.5db)
	{ 0x0089, 0x00 }, // AK7604_89_DAC_MUTEFILTER
	{ 0x008A, 0x15 },
	{ 0x008B, 0x20 },//ADC Digital Volume L	default:0x30(0.0db)	0x1B:10.5db	0x02:(23.0db)	0x23	0x20
	{ 0x008C, 0x3c },//ADC Digital Volume R	default:0x30(0.0db)	0x1B:10.5db	0x02:(23.0db)	0x23	0x3c 0x48
	{ 0x008D, 0x08 },//(default:AINL1/AINR1:0x02)	2025-08-11: AINL2/AINR2:0x08	INP1/INN1/INP2/INN2:0x0
	{ 0x008E, 0x00 },// AK7604_8E_ADC_MUTEHPF
	{ 0x008F, 0x00 },
	{ 0x0090, 0x00 },
	{ 0x0091, 0x00 },
	{ 0x0092, 0x00 },
	{ 0x0093, 0x00 },
	{ 0x0094, 0x00 },
	{ 0x0095, 0x00 },
	{ 0x0096, 0x00 },
	{ 0x0097, 0x00 },
	{ 0x0098, 0x00 },
	{ 0x0099, 0x00 },
	{ 0x009A, 0x00 },
	{ 0x009B, 0x00 },
	{ 0x009C, 0x00 },
	{ 0x009D, 0x00 },
	{ 0x009E, 0x00 },
	{ 0x009F, 0x00 },
	{ 0x00A0, 0x00 },
	{ 0x00A1, 0xBC },//(default:0xB0/0x80)	20241016:0x8c		2024-10-24:0xBC
	{ 0x00A2, 0x10 },
	{ 0x00A3, 0x07 },
#else
	//ark音频链路方案2
	//ark(i2s1)<->ak7604(i2s1)
	//ark(i2s2)->fm1505->ak7604(i2s2)->功放
	//ak7604(mic-i2s2)->fm1505->ark(i2s0)
	{ 0x0000, 0x0F },
	{ 0x0001, 0x07 },
	{ 0x0002, 0x90 },
	{ 0x0003, 0x04 },
	{ 0x0004, 0x03 }, // AK7604_04_SYNCDOMAIN_MS	//[011] ->[bit1->ak7604-i2s1:master	 bit2->ak7604-i2s2:master		bit3->ak7604-i2s3:slave]
	{ 0x0005, 0x08 },
	{ 0x0006, 0x27 },
	{ 0x0007, 0x08 },
	{ 0x0008, 0x27 },
	{ 0x0009, 0x08 },
	{ 0x000A, 0x27 },
	{ 0x000B, 0x08 },
	{ 0x000C, 0x00 },
	{ 0x000D, 0x12 },//default:0x12		241010:0x11
	{ 0x000E, 0x30 },
	{ 0x000F, 0x12 },
	{ 0x0010, 0x30 },
	{ 0x0011, 0x12 },//default:0x10		241010:0x11(SDADC->SD1)	0x12(SDADC->SD2)
	{ 0x0012, 0x11 },//default:0x11		241010:0x01(SDDAC->SD1)	0x02(SDDAC->SD2)
	{ 0x0013, 0x11 },//default:0x11		241010:0x10(SDDO2->SD1)	0x20(SDDO2->SD2)
	{ 0x0014, 0x11 },//default:0x11		241010:0x21
	{ 0x0015, 0x10 },
	{ 0x0016, 0x00 },
	{ 0x0017, 0x10 },//default:0x10		241010:0x12
	{ 0x0018, 0x00 },
	{ 0x0019, 0x0E },//SDOUT1A Source Selector	"arecord: SDOUT1A->ADC(0x0E)"
	{ 0x001A, 0x00 },
	{ 0x001B, 0x00 },
	{ 0x001C, 0x00 },
	{ 0x001D, 0x0E },//SDOUT2 Source Selector(default:0x00)	"arecord: SDOUT2->ADC(0x0E)"
	{ 0x001E, 0x09 },//SDOUT3 Source Selector(default:0x09)	"arecord: SDOUT3->ADC(0x0E)"
	{ 0x001F, 0x01 },//DAC1 Source Selector(default:0x08)	"Playback : SDIN1(0x01) -> DSP1 -> DAC1 (SYNC1_Slave)   or  SDIN2(0x05) -> DSP1 -> DAC1 (SYNC1_Slave)"
	{ 0x0020, 0x05 },//DAC2 Source Selector(default:0x0A)
	{ 0x0021, 0x00 },//DAC3 Source Selector
	{ 0x0022, 0x01 },//default:0x01		241010:0x05
	{ 0x0023, 0x05 },
	{ 0x0024, 0x0F },
	{ 0x0025, 0x00 },
	{ 0x0026, 0x00 },
	{ 0x0027, 0x00 },
	{ 0x0028, 0x06 },//default:0x06		241010:0x05
	{ 0x0029, 0x00 },//default:0x00		241010:0x05
	{ 0x002A, 0x00 },
	{ 0x002B, 0x00 },
	{ 0x002C, 0x00 },
	{ 0x002D, 0x00 },
	{ 0x002E, 0x00 },
	{ 0x002F, 0x00 },
	{ 0x0030, 0x00 },
	{ 0x0031, 0x00 },
	{ 0x0032, 0x00 },
	{ 0x0033, 0x00 },
	{ 0x0034, 0x00 },
	{ 0x0035, 0x00 },
	{ 0x0036, 0x00 },
	{ 0x0037, 0x00 },
	{ 0x0038, 0x00 },
	{ 0x0039, 0x00 },
	{ 0x003A, 0x00 },
	{ 0x003B, 0x00 },
	{ 0x003C, 0x00 },
	{ 0x003D, 0x00 },
	{ 0x003E, 0x00 },
	{ 0x003F, 0x00 },
	{ 0x0040, 0x00 },
	{ 0x0041, 0x00 },
	{ 0x0042, 0x00 },
	{ 0x0043, 0x00 },
	{ 0x0044, 0x00 },
	{ 0x0045, 0x00 },
	{ 0x0046, 0x00 },
	{ 0x0047, 0x00 },
	{ 0x0048, 0x00 },
	{ 0x0049, 0x00 },
	{ 0x004A, 0x00 },
	{ 0x004B, 0x00 },
	{ 0x004C, 0x00 },
	{ 0x004D, 0x00 },
	{ 0x004E, 0x00 },
	{ 0x004F, 0x00 },
	{ 0x0050, 0x00 },
	{ 0x0051, 0xE1 },
	{ 0x0052, 0x00 },
	{ 0x0053, 0x00 },
	{ 0x0054, 0x00 },
	{ 0x0055, 0x00 },
	{ 0x0056, 0x00 },
	{ 0x0057, 0x00 },
	{ 0x0058, 0x00 },
	{ 0x0059, 0x00 },
	{ 0x005A, 0x00 },
	{ 0x005B, 0x00 },
	{ 0x005C, 0x00 },
	{ 0x005D, 0x00 },
	{ 0x005E, 0x00 },
	{ 0x005F, 0x00 },
	{ 0x0060, 0x00 },
	{ 0x0061, 0x00 },
	{ 0x0062, 0x00 },
	{ 0x0063, 0x00 },
	{ 0x0064, 0x00 },
	{ 0x0065, 0x00 },
	{ 0x0066, 0x00 },
	{ 0x0067, 0x00 },
	{ 0x0068, 0x00 },
	{ 0x0069, 0x00 },
	{ 0x006A, 0x00 },
	{ 0x006B, 0x00 },
	{ 0x006C, 0x00 },
	{ 0x006D, 0x00 },
	{ 0x006E, 0x00 },
	{ 0x006F, 0x00 },
	{ 0x0070, 0x00 },
	{ 0x0071, 0x00 },
	{ 0x0072, 0x00 },
	{ 0x0073, 0x0F },
	{ 0x0074, 0x00 },
	{ 0x0075, 0x00 },
	{ 0x0076, 0x00 },
	{ 0x0077, 0x00 },
	{ 0x0078, 0x00 },
	{ 0x0079, 0x00 },
	{ 0x007A, 0x00 },
	{ 0x007B, 0x00 },
	{ 0x007C, 0x00 },
	{ 0x007D, 0x00 },
	{ 0x007E, 0x00 },
	{ 0x007F, 0x00 },
	{ 0x0080, 0x00 },
	{ 0x0081, 0x00 },
	{ 0x0082, 0xFF },//MIC Input Volume L/R 	36dB
	{ 0x0083, 0x4b },//DAC1 Digital Volume L		default:0x18(0.0db)	69(-40.5db)
	{ 0x0084, 0x4b },//DAC1 Digital Volume R		default:0x18		69(-40.5db)
	{ 0x0085, 0x4b },//DAC2 Digital Volume L		default:0x18		69(-40.5db)
	{ 0x0086, 0x4b },//DAC2 Digital Volume R		default:0x18		69(-40.5db)
	{ 0x0087, 0x4b },//DAC3 Digital Volume L		default:0x18		69(-40.5db)
	{ 0x0088, 0x4b },//DAC3 Digital Volume R		default:0x18		69(-40.5db)
	{ 0x0089, 0x00 }, // AK7604_89_DAC_MUTEFILTER
	{ 0x008A, 0x15 },
	{ 0x008B, 0x08 },//ADC Digital Volume L	default:0x30(0.0db)	0x1B:10.5db	0x08:(20.0db)
	{ 0x008C, 0x08 },//ADC Digital Volume R	default:0x30(0.0db)	0x1B:10.5db	0x08:(20.0db)
	{ 0x008D, 0x02 },
	{ 0x008E, 0x00 },// AK7604_8E_ADC_MUTEHPF
	{ 0x008F, 0x00 },
	{ 0x0090, 0x00 },
	{ 0x0091, 0x00 },
	{ 0x0092, 0x00 },
	{ 0x0093, 0x00 },
	{ 0x0094, 0x00 },
	{ 0x0095, 0x00 },
	{ 0x0096, 0x00 },
	{ 0x0097, 0x00 },
	{ 0x0098, 0x00 },
	{ 0x0099, 0x00 },
	{ 0x009A, 0x00 },
	{ 0x009B, 0x00 },
	{ 0x009C, 0x00 },
	{ 0x009D, 0x00 },
	{ 0x009E, 0x00 },
	{ 0x009F, 0x00 },
	{ 0x00A0, 0x00 },
	{ 0x00A1, 0xB0 },//default:0xB0	241010:0xbc
	{ 0x00A2, 0x10 },//default:0x10		241010:0x30
	{ 0x00A3, 0x03 },//default:0x07		241010:0x00

//	{ 0x00A4, 0x00 },   //
//	{ 0x00A5, 0x00 },   //
//	{ 0x00A6, 0x00 },   //
//	{ 0x00A7, 0x00 },   //
//	{ 0x00A8, 0x00 },   //
//	{ 0x00A9, 0x00 },   //
//	{ 0x00AA, 0x00 },   //
//	{ 0x00AB, 0x00 },   //
//	{ 0x00AC, 0x00 },   //
//	{ 0x00AD, 0x00 },   //
//	{ 0x00AE, 0x00 },   //
//	{ 0x00AF, 0x00 },   //
//	{ 0x00B0, 0x00 },   //
//	{ 0x00B1, 0x00 },   //
//	{ 0x00B2, 0x00 },   //
//	{ 0x00B3, 0x00 },   //
//	{ 0x00B4, 0x00 },   //
//	{ 0x00B5, 0x00 },   //
//	{ 0x00B6, 0x00 },   //
//	{ 0x00B7, 0x00 },   //
//	{ 0x00B8, 0x00 },   //
//	{ 0x00B9, 0x00 },   //
//	{ 0x00BA, 0x00 },   //
//	{ 0x00BB, 0x00 },   //
//	{ 0x00BC, 0x00 },   //
//	{ 0x00BD, 0x00 },   //
//	{ 0x00BE, 0x00 },   //
//	{ 0x00BF, 0x00 },   //
//	{ 0x00C0, 0x04 },   // AK7604_C0_DEVICE_ID
//	{ 0x00C1, 0x00 },   // AK7604_C1_REVISION_NUM
//	{ 0x00C2, 0xA0 },   // AK7604_C2_DSPERROR_STATUS
//	{ 0x00C3, 0x00 },   // AK7604_C3_SRC_STATUS
//	{ 0x00C4, 0x00 },   //
//	{ 0x00C5, 0x00 },   //
//	{ 0x00C6, 0x80 },   // AK7604_C6_STO_READOUT
//	{ 0x00C7, 0x00 },   // AK7604_VIRT_C7_DSPOUT1_MIX
//	{ 0x00C8, 0x00 },   // AK7604_VIRT_C8_DSPOUT2_MIX
//	{ 0x00C9, 0x00 },   // AK7604_VIRT_C9_DSPOUT3_MIX
//	{ 0x00CA, 0x00 },   // AK7604_VIRT_CA_DSPOUT4_MIX
//	{ 0x00CB, 0x00 },   // AK7604_VIRT_CB_DSPOUT5_MIX
//	{ 0x00CC, 0x00 },   // AK7604_VIRT_CC_DSPOUT6_MIX
#endif
};

// MIC Input Volume control:
// from 0 to 36 dB (quantity of each step is various)
static DECLARE_TLV_DB_MINMAX(mgn_tlv, 0, 3600);

// ADC, ADC2 Digital Volume control:
// from -103.5 to 24 dB in 0.5 dB steps (mute instead of -103.5 dB)
static DECLARE_TLV_DB_SCALE(voladc_tlv, -10350, 50, 0);

// DAC Digital Volume control:
// from -115.5 to 12 dB in 0.5 dB steps (mute instead of -115.5 dB)
static DECLARE_TLV_DB_SCALE(voldac_tlv, -11550, 50, 0);


static const char * const atspad_texts[] = {
	"4/fs", "16/fs"
};

static const char * const atspda_texts[] = {
	"4/fs", "16/fs"
};

static const char * const dac_digfilsel_texts[] = {
	"Sharp",
	"Slow",
	"Short Delay Sharp",
	"Short Delay Slow",
};

static const char * const dac_deemphasis_texts[] = {
	"44.1kHz", "OFF", "48kHz", "32kHz"
};


static const struct soc_enum ak7604_codec_enum[] = {
	SOC_ENUM_SINGLE(AK7604_8E_ADC_MUTEHPF, 7, ARRAY_SIZE(atspad_texts), atspad_texts),
	SOC_ENUM_SINGLE(AK7604_89_DAC_MUTEFILTER, 7, ARRAY_SIZE(atspda_texts), atspda_texts),
	SOC_ENUM_SINGLE(AK7604_89_DAC_MUTEFILTER, 0,
		ARRAY_SIZE(dac_digfilsel_texts), dac_digfilsel_texts),
	SOC_ENUM_SINGLE(AK7604_8A_DAC_DEEM_, 0,
		ARRAY_SIZE(dac_deemphasis_texts), dac_deemphasis_texts),//DAC1
	SOC_ENUM_SINGLE(AK7604_8A_DAC_DEEM_, 2,
		ARRAY_SIZE(dac_deemphasis_texts), dac_deemphasis_texts),//DAC2
	SOC_ENUM_SINGLE(AK7604_8A_DAC_DEEM_, 4,
		ARRAY_SIZE(dac_deemphasis_texts), dac_deemphasis_texts),//DAC3
};

static const char * const sdselbit_texts[] = {
	"Low", "SYNC1", "SYNC2", "SYNC3", "SYNC4",
};

static const struct soc_enum ak7604_sdsel_enum[] = {
	SOC_ENUM_SINGLE(AK7604_11_SYNCDOMAIN_SEL3, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SDOUT1
	SOC_ENUM_SINGLE(AK7604_11_SYNCDOMAIN_SEL3, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SDOUT2
	SOC_ENUM_SINGLE(AK7604_12_SYNCDOMAIN_SEL4, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SDOUT3
	SOC_ENUM_SINGLE(AK7604_12_SYNCDOMAIN_SEL4, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DAC
	SOC_ENUM_SINGLE(AK7604_13_SYNCDOMAIN_SEL5, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //ADC

	SOC_ENUM_SINGLE(AK7604_13_SYNCDOMAIN_SEL5, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSP
	SOC_ENUM_SINGLE(AK7604_14_SYNCDOMAIN_SEL6, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSPO1
	SOC_ENUM_SINGLE(AK7604_14_SYNCDOMAIN_SEL6, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSPO2
	SOC_ENUM_SINGLE(AK7604_15_SYNCDOMAIN_SEL7, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSPO3
	SOC_ENUM_SINGLE(AK7604_15_SYNCDOMAIN_SEL7, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSPO4

	SOC_ENUM_SINGLE(AK7604_16_SYNCDOMAIN_SEL8, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSPO5
	SOC_ENUM_SINGLE(AK7604_16_SYNCDOMAIN_SEL8, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //DSPO6
	SOC_ENUM_SINGLE(AK7604_17_SYNCDOMAIN_SEL9, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SRCO1
	SOC_ENUM_SINGLE(AK7604_17_SYNCDOMAIN_SEL9, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SRCO2
	SOC_ENUM_SINGLE(AK7604_18_SYNCDOMAIN_SEL10, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SRCO3

	SOC_ENUM_SINGLE(AK7604_18_SYNCDOMAIN_SEL10, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SRCO4
};

static const char * const fsmodebit_texts[] = {
	"8kHz:8kHz", "12kHz:12kHz", "16kHz:16kHz", "24kHz:24kHz",
	"32kHz:32kHz", "32kHz:16kHz", "32kHz:8kHz", "48kHz:48kHz",
	"48kHz:24kHz", "48kHz:16kHz", "48kHz:8kHz", "96kHz:96kHz",
	"96kHz:48kHz", "96kHz:32kHz", "96kHz:24kHz", "96kHz:16kHz",
	"96kHz:8kHz"
};

static const struct soc_enum ak7604_fsmode_enum[] = {
	SOC_ENUM_SINGLE(AK7604_01_SYSTEMCLOCK_2, 0, ARRAY_SIZE(fsmodebit_texts), fsmodebit_texts),
};

// ak7604_set_dai_fmt() takes priority
// This is for SD that is not assigned to BICK/LRCK pin
static const char * const msnbit_texts[] = {
	"Slave", "Master"
};

static const struct soc_enum ak7604_msnbit_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(msnbit_texts), msnbit_texts),
};

static const struct soc_enum ak7604_portsdsel_enum[] = {
	SOC_ENUM_SINGLE(AK7604_0F_SYNCDOMAIN_SEL1, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SDBCK1[2:0]
	SOC_ENUM_SINGLE(AK7604_0F_SYNCDOMAIN_SEL1, 0,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SDBCK2[2:0]
	SOC_ENUM_SINGLE(AK7604_10_SYNCDOMAIN_SEL2, 4,
		ARRAY_SIZE(sdselbit_texts), sdselbit_texts), //SDBCK3[2:0]
};

static const char * const sdcks_texts[] = {
	"Low", "PLLMCLK", "XTI", "BICK1", "BICK2", "BICK3"
};

static const struct soc_enum ak7604_sdcks_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sdcks_texts), sdcks_texts),
};


static const char * const sd_fs_texts[] = {
	"8kHz", "12kHz",  "16kHz", "24kHz",
	"32kHz", "48kHz", "96kHz"
};

static int sdfstab[] = {
	8000, 12000, 16000, 24000,
	32000, 48000, 96000
};

static const char * const sd_bick_texts[] = {
	"64fs", "48fs", "32fs",  "128fs", "256fs"
};

static int sdbicktab[] = {
	64, 48, 32, 128, 256
};

static const struct soc_enum ak7604_sd_fs_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sd_fs_texts), sd_fs_texts),
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(sd_bick_texts), sd_bick_texts),
};


static int XtiFsTab[] = {
	12288000,  18432000
};

static int PLLInFsTab[] = {
	256000, 384000, 512000, 768000, 1024000,
	1152000, 1536000, 2048000, 2304000, 3072000,
	4096000, 4608000, 6144000, 8192000, 9216000,
	12288000, 18432000, 24576000
};

static int setPLLOut(
struct snd_soc_component *component)
{//akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int nPLLInFs;
	int value, nBfs, fs;
	int n, nMax;

	value = (ak7604->PLLInput << 5);
	snd_soc_component_update_bits(component, AK7604_00_SYSTEMCLOCK_1, 0x60, value);

	if (ak7604->PLLInput == 0) {
		nPLLInFs = XtiFsTab[ak7604->XtiFs];
	} else {
		nBfs = sdbicktab[ak7604->SDBick[ak7604->PLLInput-1]];
		fs = sdfstab[ak7604->SDfs[ak7604->PLLInput-1]];
		akdbgprt("[AK7604] %s nBfs=%d fs=%d\n", __func__, nBfs, fs);
		nPLLInFs = nBfs * fs;
	}

	n = 0;
	nMax = ARRAY_SIZE(PLLInFsTab);

	do {
		//akdbgprt("[AK7604] %s n=%d PLL:%d %d\n", __func__, n, nPLLInFs, PLLInFsTab[n]);
		if (nPLLInFs == PLLInFsTab[n])
			break;
		n++;
	} while (n < nMax);


	if (n == nMax) {
		pr_err("%s: PLL1 setting Error!\n", __func__);
		return(-1);
	}

	snd_soc_component_update_bits(component, AK7604_00_SYSTEMCLOCK_1, 0x1F, n);

	return 0;

}

static int setSDMaster(
struct snd_soc_component *component,
int nSDNo,
int nMaster)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int addr;
	int value;

	if (nSDNo >= NUM_SYNCDOMAIN)
		return 0;

	ak7604->Master[nSDNo] = nMaster;

	addr = AK7604_05_SYNCDOMAIN1_SET1 + (2 * nSDNo);
	value =  ak7604->SDCks[nSDNo] << 3;
	snd_soc_component_update_bits(component, addr, 0x38, value);

	printk("-->nMaster = %d,nSDNo = %d\n", nMaster, nSDNo);
	addr = AK7604_04_SYNCDOMAIN_MS;
	value = nMaster << nSDNo;
	printk("-->value = %d\n", value);
	snd_soc_component_update_bits(component, addr, 1<<nSDNo, value);

	return 0;

}

static int setSDClock(
struct snd_soc_component *component,
int nSDNo)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int addr;
	int fs, bickfs;
	int cksBickFs;
	int sdv, bdv;
	int csksd;

	if (nSDNo >= NUM_SYNCDOMAIN)
		return 0;

	fs = sdfstab[ak7604->SDfs[nSDNo]];
	bickfs = sdbicktab[ak7604->SDBick[nSDNo]] * fs;

	addr = AK7604_05_SYNCDOMAIN1_SET1 + (2 * nSDNo);

	switch (ak7604->SDCks[nSDNo]) {
	case 3:  // BICK1
	case 4:  // BICK2
	case 5:  // BICK3
		csksd = ak7604->SDCks[nSDNo] - 3;
		cksBickFs = sdbicktab[ak7604->SDBick[csksd]] * sdfstab[ak7604->SDfs[csksd]];
		bdv = cksBickFs / bickfs;
		if ((cksBickFs % bickfs) != 0)
			pr_err("[ak7604]%s: BDV Error! SD No = %d,cks=%d, bick=%d\n",
				__func__, nSDNo, cksBickFs, bickfs);
		break;
	case 2:  // XTI
		bdv = XtiFsTab[ak7604->XtiFs] / bickfs;
		break;
	default:
		bdv = 122880000 / bickfs;
		break;
	}

	sdv = ak7604->SDBick[nSDNo];
	akdbgprt("\t[AK7604]%s, BDV=%d, SDV=%d\n", __func__, bdv, sdbicktab[sdv]);
	bdv--;
	if (bdv > 255) {
		pr_err("%s: BDV Error! SD No = %d, bdv bit = %d\n", __func__, nSDNo, bdv);
		bdv = 255;
	}

	snd_soc_component_update_bits(component, addr, 0x07, sdv);
	addr++;
	snd_soc_component_write(component, addr, bdv);
	if (ak7604->PLLInput == (nSDNo + 1))
		setPLLOut(component);
	return 0;
}

static int get_sd1_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDCks[0];

	return 0;
}

static int set_sd1_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sdcks_texts)) {
		if (ak7604->SDCks[0] != currMode) {
			ak7604->SDCks[0] = currMode;
			setSDClock(component, 0);
			setSDMaster(component, 0, ak7604->Master[0]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd2_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDCks[1];

	return 0;
}

static int set_sd2_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sdcks_texts)) {
		if (ak7604->SDCks[1] != currMode) {
			ak7604->SDCks[1] = currMode;
			setSDClock(component, 1);
			setSDMaster(component, 1, ak7604->Master[1]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd3_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDCks[2];

	return 0;
}

static int set_sd3_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sdcks_texts)) {
		if (ak7604->SDCks[2] != currMode) {
			ak7604->SDCks[2] = currMode;
			setSDClock(component, 2);
			setSDMaster(component, 2, ak7604->Master[2]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd4_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDCks[3];

	return 0;
}

static int set_sd4_cks(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sdcks_texts)) {
		if (ak7604->SDCks[3] != currMode) {
			ak7604->SDCks[3] = currMode;
			setSDClock(component, 3);
			setSDMaster(component, 3, ak7604->Master[3]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd1_ms(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->Master[0];

	return 0;
}

static int set_sd1_ms(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	int    currMode = ucontrol->value.enumerated.item[0];

	setSDMaster(component, 0, currMode);

	return 0;
}


static int get_sd2_ms(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->Master[1];

	return 0;
}

static int set_sd2_ms(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	int    currMode = ucontrol->value.enumerated.item[0];

	setSDMaster(component, 1, currMode);

	return 0;
}


static int get_sd3_ms(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->Master[2];

	return 0;
}

static int set_sd3_ms(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	int    currMode = ucontrol->value.enumerated.item[0];

	setSDMaster(component, 2, currMode);

	return 0;
}

static int get_sd1_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDfs[0];

	return 0;
}

static int set_sd1_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_fs_texts)) {
		if (ak7604->SDfs[0] != currMode) {
			ak7604->SDfs[0] = currMode;
			setSDClock(component, 0);
			setSDMaster(component, 0, ak7604->Master[0]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd2_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDfs[1];

	return 0;
}

static int set_sd2_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_fs_texts)) {
		if (ak7604->SDfs[1] != currMode) {
			ak7604->SDfs[1] = currMode;
			setSDClock(component, 1);
			setSDMaster(component, 1, ak7604->Master[1]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;

}

static int get_sd3_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDfs[2];

	return 0;
}

static int set_sd3_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_fs_texts)) {
		if (ak7604->SDfs[2] != currMode) {
			ak7604->SDfs[2] = currMode;
			setSDClock(component, 2);
			setSDMaster(component, 2,  ak7604->Master[2]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;

}

static int get_sd4_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDfs[3];

	return 0;
}


static int set_sd4_fs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_fs_texts)) {
		if (ak7604->SDfs[3] != currMode) {
			ak7604->SDfs[3] = currMode;
			setSDClock(component, 3);
			setSDMaster(component, 3, ak7604->Master[3]);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;

}

static int get_sd1_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDBick[0];

	return 0;
}

static int set_sd1_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_bick_texts)) {
		if (ak7604->SDBick[0] != currMode) {
			ak7604->SDBick[0] = currMode;
			setSDClock(component, 0);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd2_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDBick[1];

	return 0;
}

static int set_sd2_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_bick_texts)) {
		if (ak7604->SDBick[1] != currMode) {
			ak7604->SDBick[1] = currMode;
			setSDClock(component, 1);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd3_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDBick[2];

	return 0;
}

static int set_sd3_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_bick_texts)) {
		if (ak7604->SDBick[2] != currMode) {
			ak7604->SDBick[2] = currMode;
			setSDClock(component, 2);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sd4_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->SDBick[3];

	return 0;
}

static int set_sd4_bick(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(sd_bick_texts)) {
		if (ak7604->SDBick[3] != currMode) {
			ak7604->SDBick[3] = currMode;
			setSDClock(component, 3);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}


static const char * const pllinput_texts[]  = {
	"XTI", "BICK1",  "BICK2",  "BICK3",
};

static const char * const xtifs_texts[]  = {
	"12.288MHz", "18.432MHz"
};

static const struct soc_enum ak7604_pllset_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(pllinput_texts), pllinput_texts),
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtifs_texts), xtifs_texts),
};

static int get_pllinput(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->PLLInput;

	return 0;
}

static int set_pllinput(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(pllinput_texts)) {
		if (ak7604->PLLInput != currMode) {
			ak7604->PLLInput = currMode;
			setPLLOut(component);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_xtifs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->XtiFs;

	return 0;
}

static int set_xtifs(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(xtifs_texts)) {
		if (ak7604->XtiFs != currMode) {
			ak7604->XtiFs = currMode;
			setPLLOut(component);
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static const char * const ak7604_tdm_texts[] = {
	"TDM Off", "TDM On"
};

static const struct soc_enum ak7604_tdm_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak7604_tdm_texts), ak7604_tdm_texts),
};

static int get_sdin1_tdm(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->TDMSDINbit[0];

	return 0;
}

static int set_sdin1_tdm(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < 2) {
		if (ak7604->TDMSDINbit[0] != currMode) {
			ak7604->TDMSDINbit[0] = currMode;
			ak7604->DIEDGEbit[0] = ak7604->TDMSDINbit[0];
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdout1_tdm(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->TDMSDOUTbit[0];

	return 0;
}

static int set_sdout1_tdm(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < 2) {
		if (ak7604->TDMSDOUTbit[0] != currMode) {
			ak7604->TDMSDOUTbit[0] = currMode;
			ak7604->DOEDGEbit[0] = ak7604->TDMSDOUTbit[0];
		}
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static const char * const ak7604_sd_ioformat_texts[] = {
	"24bit",
	"20bit",
	"16bit",
	"32bit",
};

static const struct soc_enum ak7604_slotlen_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak7604_sd_ioformat_texts), ak7604_sd_ioformat_texts),
};

static int get_sdin1_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DISLbit[0];

	return 0;
}

static int set_sdin1_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DISLbit[0] != currMode)
			ak7604->DISLbit[0] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdin2_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DISLbit[1];

	return 0;
}

static int set_sdin2_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DISLbit[1] != currMode)
			ak7604->DISLbit[1] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdin3_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DISLbit[2];

	return 0;
}

static int set_sdin3_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DISLbit[2] != currMode)
			ak7604->DISLbit[2] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdin4_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DISLbit[3];

	return 0;
}

static int set_sdin4_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DISLbit[3] != currMode)
			ak7604->DISLbit[3] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdout1_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DOSLbit[0];

	return 0;
}

static int set_sdout1_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DOSLbit[0] != currMode)
			ak7604->DOSLbit[0] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdout2_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DOSLbit[1];

	return 0;
}

static int set_sdout2_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DOSLbit[1] != currMode)
			ak7604->DOSLbit[1] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static int get_sdout3_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ucontrol->value.enumerated.item[0] = ak7604->DOSLbit[2];

	return 0;
}

static int set_sdout3_slot(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];

	if (currMode < ARRAY_SIZE(ak7604_sd_ioformat_texts)) {
		if (ak7604->DOSLbit[2] != currMode)
			ak7604->DOSLbit[2] = currMode;
	} else {
		akdbgprt(" [AK7604] %s Invalid Value selected!\n", __func__);
	}
	return 0;
}

static const char * const sdout_modeset_texts[] = {
	"Slow", "Fast"
};

static const struct soc_enum ak7604_sdout_modeset_enum[] = {
	SOC_ENUM_SINGLE(AK7604_50_INPUT_DATA, 4,
		ARRAY_SIZE(sdout_modeset_texts), sdout_modeset_texts),
	SOC_ENUM_SINGLE(AK7604_50_INPUT_DATA, 5,
		ARRAY_SIZE(sdout_modeset_texts), sdout_modeset_texts),
	SOC_ENUM_SINGLE(AK7604_50_INPUT_DATA, 6,
		ARRAY_SIZE(sdout_modeset_texts), sdout_modeset_texts),
};

static const char * const do1sel_texts[] = {
	"L", "SDOUT1"
};
static const char * const do2sel_texts[] = {
	"L", "L1", "L2", "L3", "DZF", "DZF Invert", "SDOUT2", "RDY"
};
static const char * const do3sel_texts[] = {
	"STO", "SDOUT3", "GPO", "GPO Invert", "L"
};


static const struct soc_enum ak7604_outportsel_enum[] = {
	SOC_ENUM_SINGLE(AK7604_51_SELECT_DATA, 7, ARRAY_SIZE(do1sel_texts), do1sel_texts),
	SOC_ENUM_SINGLE(AK7604_51_SELECT_DATA, 4, ARRAY_SIZE(do2sel_texts), do2sel_texts),
	SOC_ENUM_SINGLE(AK7604_51_SELECT_DATA, 0, ARRAY_SIZE(do3sel_texts), do3sel_texts),
};

static const char * const di3sel_texts[] = {
	"SDIN3", "JX3"
};

static const char * const bck3sel_texts[] = {
	"BICK3", "JX1"
};

static const char * const lck3sel_texts[] = {
	"LRCK3", "JX0", "N/A", "SDIN4"
};

static const struct soc_enum ak7604_inportsel_enum[] = {
	SOC_ENUM_SINGLE(AK7604_50_INPUT_DATA, 3, ARRAY_SIZE(di3sel_texts), di3sel_texts),
	SOC_ENUM_SINGLE(AK7604_50_INPUT_DATA, 2, ARRAY_SIZE(bck3sel_texts), bck3sel_texts),
	SOC_ENUM_SINGLE(AK7604_50_INPUT_DATA, 0, ARRAY_SIZE(lck3sel_texts), lck3sel_texts),
};

static const char * const src_softmute_texts[] = {
	"Manual", "Semi Auto"
};

static const struct soc_enum ak7604_src_softmute_enum[] = {
	SOC_ENUM_SINGLE(AK7604_71_SRCMUTE_SETTING, 0,
		ARRAY_SIZE(src_softmute_texts), src_softmute_texts),
	SOC_ENUM_SINGLE(AK7604_71_SRCMUTE_SETTING, 1,
		ARRAY_SIZE(src_softmute_texts), src_softmute_texts),
	SOC_ENUM_SINGLE(AK7604_71_SRCMUTE_SETTING, 2,
		ARRAY_SIZE(src_softmute_texts), src_softmute_texts),
	SOC_ENUM_SINGLE(AK7604_71_SRCMUTE_SETTING, 3,
		ARRAY_SIZE(src_softmute_texts), src_softmute_texts),
};

static const char * const src_softdfil_texts[] = {
	"Voice", "Audio"
};

static const struct soc_enum ak7604_src_dfil_enum[] = {
	SOC_ENUM_SINGLE(AK7604_73_SRCFILTER_SETTING, 0,
		ARRAY_SIZE(src_softdfil_texts), src_softdfil_texts),
	SOC_ENUM_SINGLE(AK7604_73_SRCFILTER_SETTING, 1,
		ARRAY_SIZE(src_softdfil_texts), src_softdfil_texts),
	SOC_ENUM_SINGLE(AK7604_73_SRCFILTER_SETTING, 2,
		ARRAY_SIZE(src_softdfil_texts), src_softdfil_texts),
	SOC_ENUM_SINGLE(AK7604_73_SRCFILTER_SETTING, 3,
		ARRAY_SIZE(src_softdfil_texts), src_softdfil_texts),
};


static const char * const dsp_drmbk_texts[] = { // BANK1/BANK0
	"0/6144", "1024/5120", "2048/4096", "3072/3072"
};

static const char * const dsp_assign_dram_texts[] = { // BANK1/BANK0
	"Ring/Ring", "Ring/Linear", "Linear/Ring", "Linear/Linear"
};

static const struct soc_enum ak7604_dsp_dram_enum[] = {
	SOC_ENUM_SINGLE(AK7604_60_DSP_SETTING1, 0,
		ARRAY_SIZE(dsp_drmbk_texts), dsp_drmbk_texts),
	SOC_ENUM_SINGLE(AK7604_60_DSP_SETTING1, 2,
		ARRAY_SIZE(dsp_assign_dram_texts), dsp_assign_dram_texts),
};

static const struct soc_enum ak7604_firmware_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak7604_firmware_pram), ak7604_firmware_pram),
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak7604_firmware_cram), ak7604_firmware_cram),
};

static int ak7604_firmware_write_ram(struct snd_soc_component *component, u16 mode, u16 cmd);
static int ak7604_set_status(struct snd_soc_component *component, enum ak7604_status status);
static int ak7604_write_cram(struct snd_soc_component *component,
	int addr, int len, unsigned char *cram_data);

static int get_DSP_write_pram(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	/* Get the current output routing */
	ucontrol->value.enumerated.item[0] = ak7604->DSPPramMode;

	return 0;

}

static int set_DSP_write_pram(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];
	int    ret;

	akdbgprt("\t%s PRAM mode =%d\n", __func__, currMode);

	ret = ak7604_firmware_write_ram(component, RAMTYPE_PRAM, currMode);
	if (ret != 0)
		return(-1);

	ak7604->DSPPramMode = currMode;

	return 0;
}

static int get_DSP_write_cram(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	/* Get the current output routing */
	ucontrol->value.enumerated.item[0] = ak7604->DSPCramMode;

	return 0;

}

static int set_DSP_write_cram(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int    currMode = ucontrol->value.enumerated.item[0];
	int    ret;

	akdbgprt("\t%s CRAM mode =%d\n", __func__, currMode);

	ret = ak7604_firmware_write_ram(component, RAMTYPE_CRAM, currMode);
	if (ret != 0)
		return(-1);

	ak7604->DSPCramMode = currMode;

	return 0;
}

static int ak7604_reads(struct snd_soc_component *component, u8 *, size_t, u8 *, size_t);

static const char * const ak7604_cram_write_exec_texts[] = {
	"Wait", "Execute",
};

static const struct soc_enum ak7604_cramope_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak7604_cram_value), ak7604_cram_value),
	SOC_ENUM_SINGLE_EXT(256, ak7604_cram_value),
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak7604_cram_write_exec_texts), ak7604_cram_write_exec_texts),
};

static int get_cram_write_addr(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	/* Get the current output routing */
	ucontrol->value.enumerated.item[0] = ak7604->cramaddr;

	return 0;

}

static int set_cram_write_addr(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int n;

	u32    currMode = ucontrol->value.enumerated.item[0];

	if (currMode >= ARRAY_SIZE(ak7604_cram_value))
		return -EINVAL;

	ak7604->cramaddr = currMode;
	ak7604->cramcount = 0;

	for (n = 0; n < 48; n++)
		ak7604->cramvalue[n] = 0xFF;

	return 0;
}

static int get_cram_write_valueH(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int n;

	if ((ak7604->cramcount == 0) || (ak7604->cramcount > 16))
		n = 0;
	else
		n = 3 * (ak7604->cramcount - 1);

	ucontrol->value.enumerated.item[0] = ak7604->cramvalue[n];

	return 0;

}

static int set_cram_write_valueH(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	u32    currMode = ucontrol->value.enumerated.item[0];
	int n;

	if (ak7604->cramcount > 15)
		return -EINVAL;

	n = 3 * ak7604->cramcount;

	ak7604->cramvalue[n] = currMode;

	return 0;

}

static int get_cram_write_valueM(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int n;

	if ((ak7604->cramcount == 0) || (ak7604->cramcount > 16))
		n = 0;
	else
		n = 3 * (ak7604->cramcount - 1) + 1;

	ucontrol->value.enumerated.item[0] = ak7604->cramvalue[n];

	return 0;

}

static int set_cram_write_valueM(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	u32    currMode = ucontrol->value.enumerated.item[0];
	int n;

	if (ak7604->cramcount > 15)
		return -EINVAL;

	n = 3 * ak7604->cramcount + 1;

	ak7604->cramvalue[n] = currMode;

	return 0;

}

static int get_cram_write_valueL(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int n;

	if ((ak7604->cramcount == 0) || (ak7604->cramcount > 16))
		n = 0;
	else
		n = 3 * (ak7604->cramcount - 1) + 2;

	ucontrol->value.enumerated.item[0] = ak7604->cramvalue[n];

	return 0;

}

static int set_cram_write_valueL(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	u32    currMode = ucontrol->value.enumerated.item[0];
	int n;

	if (ak7604->cramcount > 15)
		return -EINVAL;

	n = 3 * ak7604->cramcount + 2;

	ak7604->cramvalue[n] = currMode;

	ak7604->cramcount++;

	return 0;
}

static int get_cram_write_exec(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	ucontrol->value.enumerated.item[0] = 0;

	return 0;

}

static int set_cram_write_exec(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	u32    currMode = ucontrol->value.enumerated.item[0];
	int n, ret;

	if (currMode > 1)
		return(-EINVAL);
	if (currMode == 0)
		return 0;

	if (ak7604->cramcount == 0)
		return(-EINVAL);

	if (ak7604->cramcount < 16)
		n = 3 * ak7604->cramcount;
	else
		n = 48;

	ret = ak7604_write_cram(component, ak7604->cramaddr, n, ak7604->cramvalue);
	ak7604->cramcount = 0;
	if (ret < 0)
		return(-EINVAL);

	return 0;

}

#ifdef AK7604_DEBUG
static bool ak7604_readable(struct device *dev, unsigned int reg);

static int test_read_ram(struct snd_soc_component *component, int mode)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	u8	tx[3], rx[512];
	int i, n, plen, clen;

	akdbgprt("*****[AK7604] %s(%d)\n", __func__, __LINE__);

	ak7604_set_status(component, DOWNLOAD);
	mdelay(1);
	if (mode == 0) {
		plen = 16;
		for (n = 0; n < (5 * plen); n++)
			rx[n] = 0;
		tx[0] = (COMMAND_WRITE_PRAM & 0x7F) + mode;
		tx[1] = 0x0;
		tx[2] = 0x0;
		ak7604_reads(component, tx, 3, rx, 5 * plen);
		akdbgprt("***** AK7604 PRAM LEN = %d *******\n", plen);
		n = 0;
		for (i = 0; i < plen; i++) {
			akdbgprt("AK7604 PAddr=%03X : %02X%02X%02X%02X%02X\n", i,
				(int)rx[n], (int)rx[n+1], (int)rx[n+2], (int)rx[n+3], (int)rx[n+4]);
			n += 5;
		}
	} else {
		clen = 16;
		for (n = 0; n < (3 * clen); n++)
			rx[n] = 0;
		tx[0] =  (COMMAND_WRITE_CRAM & 0x7F);
		tx[1] = 0x0;
		tx[2] = 0x0;
		ak7604_reads(component, tx, 3, rx, 3 * clen);
		akdbgprt("*****AK7604 CRAM CMD=%d,  LEN = %d*******\n", (int)tx[0], clen);
		n = 0;
		for (i = 0; i < clen; i++) {
			akdbgprt("AK7604 CAddr=%03X : %02X%02X%02X\n", i,
				(int)rx[n], (int)rx[n+1], (int)rx[n+2]);
			n += 3;
		}
	}
	mdelay(1);
	ak7604_set_status(component, DOWNLOAD_FINISH);

	return 0;

}

static const char * const test_reg_select[] = {
	"read AK7604 Reg 00:34",
	"read AK7604 Reg 50:A3",
	"read AK7604 Reg C0:C6",
	"read DSP PRAM",
	"read DSP CRAM",
};

static const struct soc_enum ak7604_test_enum[] = {
	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(test_reg_select), test_reg_select),
};

static int get_test_reg(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	int nTestRegNo = 0;

	/* Get the current output routing */
	ucontrol->value.enumerated.item[0] = nTestRegNo;

	return 0;
}

static int set_test_reg(
struct snd_kcontrol       *kcontrol,
struct snd_ctl_elem_value  *ucontrol)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
	u32    currMode = ucontrol->value.enumerated.item[0];
	int    i, value;
	int	   regs, rege;
	int nTestRegNo = 0;

	nTestRegNo = currMode;

	if (currMode < 3) {
		switch (currMode) {
		case 0:
			regs = 0x00;
			rege = 0x34;
			break;
		case 1:
			regs = 0x50;
			rege = 0xA3;
			break;
		case 2:
		default:
			regs = 0xC0;
			rege = 0xC6;
			break;
		}
		for (i = regs; i <= rege; i++) {
			if (ak7604_readable(NULL, i)) {
				value = snd_soc_component_read(component, i);
				akdbgprt("***AK7604 Addr,Reg=(%x, %x)\n", i, value);
			}
		}
	} else if (currMode < 5) {
		test_read_ram(component, (currMode - 3));
	}

	return 0;

}
#endif

static const struct snd_kcontrol_new ak7604_snd_controls[] = {
	SOC_SINGLE_TLV("MIC Input Volume L", AK7604_82_MIC_GAIN, 4, 0x0F, 0, mgn_tlv),
	SOC_SINGLE_TLV("MIC Input Volume R", AK7604_82_MIC_GAIN, 0, 0x0F, 0, mgn_tlv),

	SOC_SINGLE_TLV("ADC Digital Volume L", AK7604_8B_ADCL_VOLUME, 0, 0xFF, 1, voladc_tlv),
	SOC_SINGLE_TLV("ADC Digital Volume R", AK7604_8C_ADCR_VOLUME, 0, 0xFF, 1, voladc_tlv),

	SOC_SINGLE_TLV("DAC1 Digital Volume L", AK7604_83_DAC1L_VOLUME, 0, 0xFF, 1, voldac_tlv),
	SOC_SINGLE_TLV("DAC1 Digital Volume R", AK7604_84_DAC1R_VOLUME, 0, 0xFF, 1, voldac_tlv),
	SOC_SINGLE_TLV("DAC2 Digital Volume L", AK7604_85_DAC2L_VOLUME, 0, 0xFF, 1, voldac_tlv),
	SOC_SINGLE_TLV("DAC2 Digital Volume R", AK7604_86_DAC2R_VOLUME, 0, 0xFF, 1, voldac_tlv),
	SOC_SINGLE_TLV("DAC3 Digital Volume L", AK7604_87_DAC3L_VOLUME, 0, 0xFF, 1, voldac_tlv),
	SOC_SINGLE_TLV("DAC3 Digital Volume R", AK7604_88_DAC3R_VOLUME, 0, 0xFF, 1, voldac_tlv),

	SOC_SINGLE("ADC Mute", AK7604_8E_ADC_MUTEHPF, 6, 1, 0),
	SOC_ENUM("ADC Volume Transition Time", ak7604_codec_enum[0]),


	SOC_SINGLE("DAC1 Mute", AK7604_89_DAC_MUTEFILTER, 6, 1, 0),
	SOC_SINGLE("DAC2 Mute", AK7604_89_DAC_MUTEFILTER, 5, 1, 0),
	SOC_SINGLE("DAC3 Mute", AK7604_89_DAC_MUTEFILTER, 4, 1, 0),
	SOC_ENUM("DAC Volume Transition Time", ak7604_codec_enum[1]),
	SOC_ENUM("DAC Digital Filter", ak7604_codec_enum[2]),

	SOC_ENUM("DAC1 De-Emphasis Filter", ak7604_codec_enum[3]),
	SOC_ENUM("DAC2 De-Emphasis Filter", ak7604_codec_enum[4]),
	SOC_ENUM("DAC3 De-Emphasis Filter", ak7604_codec_enum[5]),

	SOC_ENUM("SDOUT1 Sync Domain", ak7604_sdsel_enum[0]),
	SOC_ENUM("SDOUT2 Sync Domain", ak7604_sdsel_enum[1]),
	SOC_ENUM("SDOUT3 Sync Domain", ak7604_sdsel_enum[2]),
	SOC_ENUM("DAC Sync Domain", ak7604_sdsel_enum[3]),
	SOC_ENUM("ADC Sync Domain", ak7604_sdsel_enum[4]),

	SOC_ENUM("DSP Sync Domain", ak7604_sdsel_enum[5]),
	SOC_ENUM("DSPOUT1 Sync Domain", ak7604_sdsel_enum[6]),
	SOC_ENUM("DSPOUT2 Sync Domain", ak7604_sdsel_enum[7]),
	SOC_ENUM("DSPOUT3 Sync Domain", ak7604_sdsel_enum[8]),
	SOC_ENUM("DSPOUT4 Sync Domain", ak7604_sdsel_enum[9]),
	SOC_ENUM("DSPOUT5 Sync Domain", ak7604_sdsel_enum[10]),
	SOC_ENUM("DSPOUT6 Sync Domain", ak7604_sdsel_enum[11]),

	SOC_ENUM("SRC1OUT Sync Domain", ak7604_sdsel_enum[12]),
	SOC_ENUM("SRC2OUT Sync Domain", ak7604_sdsel_enum[13]),
	SOC_ENUM("SRC3OUT Sync Domain", ak7604_sdsel_enum[14]),
	SOC_ENUM("SRC4OUT Sync Domain", ak7604_sdsel_enum[15]),

	SOC_ENUM("CODEC Sampling Frequency", ak7604_fsmode_enum[0]),
	SOC_ENUM_EXT("LRCK1/BICK1 Master", ak7604_msnbit_enum[0], get_sd1_ms, set_sd1_ms),
	SOC_ENUM_EXT("LRCK2/BICK2 Master", ak7604_msnbit_enum[0], get_sd2_ms, set_sd2_ms),
	SOC_ENUM_EXT("LRCK3/BICK3 Master", ak7604_msnbit_enum[0], get_sd3_ms, set_sd3_ms),

	SOC_ENUM("LRCK1/BICK1 Sync Domain", ak7604_portsdsel_enum[0]),
	SOC_ENUM("LRCK2/BICK2 Sync Domain", ak7604_portsdsel_enum[1]),
	SOC_ENUM("LRCK3/BICK3 Sync Domain", ak7604_portsdsel_enum[2]),

	SOC_ENUM_EXT("Sync Domain 1 Clock Source", ak7604_sdcks_enum[0], get_sd1_cks, set_sd1_cks),
	SOC_ENUM_EXT("Sync Domain 2 Clock Source", ak7604_sdcks_enum[0], get_sd2_cks, set_sd2_cks),
	SOC_ENUM_EXT("Sync Domain 3 Clock Source", ak7604_sdcks_enum[0], get_sd3_cks, set_sd3_cks),
	SOC_ENUM_EXT("Sync Domain 4 Clock Source", ak7604_sdcks_enum[0], get_sd4_cks, set_sd4_cks),

	SOC_ENUM_EXT("Sync Domain 1 fs", ak7604_sd_fs_enum[0], get_sd1_fs, set_sd1_fs),
	SOC_ENUM_EXT("Sync Domain 2 fs", ak7604_sd_fs_enum[0], get_sd2_fs, set_sd2_fs),
	SOC_ENUM_EXT("Sync Domain 3 fs", ak7604_sd_fs_enum[0], get_sd3_fs, set_sd3_fs),
	SOC_ENUM_EXT("Sync Domain 4 fs", ak7604_sd_fs_enum[0], get_sd4_fs, set_sd4_fs),

	SOC_ENUM_EXT("Sync Domain 1 BICK", ak7604_sd_fs_enum[1], get_sd1_bick, set_sd1_bick),
	SOC_ENUM_EXT("Sync Domain 2 BICK", ak7604_sd_fs_enum[1], get_sd2_bick, set_sd2_bick),
	SOC_ENUM_EXT("Sync Domain 3 BICK", ak7604_sd_fs_enum[1], get_sd3_bick, set_sd3_bick),
	SOC_ENUM_EXT("Sync Domain 4 BICK", ak7604_sd_fs_enum[1], get_sd4_bick, set_sd4_bick),

	SOC_ENUM_EXT("PLL Input Clock", ak7604_pllset_enum[0], get_pllinput, set_pllinput),
	SOC_ENUM_EXT("XTI Frequency", ak7604_pllset_enum[1], get_xtifs, set_xtifs),

	SOC_ENUM_EXT("SDIN1 TDM Setting", ak7604_tdm_enum[0], get_sdin1_tdm, set_sdin1_tdm),
	SOC_ENUM_EXT("SDOUT1 TDM Setting", ak7604_tdm_enum[0], get_sdout1_tdm, set_sdout1_tdm),

	SOC_ENUM_EXT("SDIN1 Slot Length", ak7604_slotlen_enum[0], get_sdin1_slot, set_sdin1_slot),
	SOC_ENUM_EXT("SDIN2 Slot Length", ak7604_slotlen_enum[0], get_sdin2_slot, set_sdin2_slot),
	SOC_ENUM_EXT("SDIN3 Slot Length", ak7604_slotlen_enum[0], get_sdin3_slot, set_sdin3_slot),
	SOC_ENUM_EXT("SDIN4 Slot Length", ak7604_slotlen_enum[0], get_sdin4_slot, set_sdin4_slot),

	SOC_ENUM_EXT("SDOUT1 Slot Length", ak7604_slotlen_enum[0],
		get_sdout1_slot, set_sdout1_slot),
	SOC_ENUM_EXT("SDOUT2 Slot Length", ak7604_slotlen_enum[0],
		get_sdout2_slot, set_sdout2_slot),
	SOC_ENUM_EXT("SDOUT3 Slot Length", ak7604_slotlen_enum[0],
		get_sdout3_slot, set_sdout3_slot),

	SOC_ENUM("SDOUT1 Fast Mode Setting", ak7604_sdout_modeset_enum[0]),
	SOC_ENUM("SDOUT2 Fast Mode Setting", ak7604_sdout_modeset_enum[1]),
	SOC_ENUM("SDOUT3 Fast Mode Setting", ak7604_sdout_modeset_enum[2]),

	SOC_ENUM("SDOUT1 Pin Output Select", ak7604_outportsel_enum[0]),
	SOC_ENUM("SDOUT2 Pin Output Select", ak7604_outportsel_enum[1]),
	SOC_ENUM("SDOUT3 Pin Output Select", ak7604_outportsel_enum[2]),

	SOC_ENUM("SDIN3 Pin Input Select", ak7604_inportsel_enum[0]),
	SOC_ENUM("BICK3 Pin Input Select", ak7604_inportsel_enum[1]),
	SOC_ENUM("LRCK3 Pin Input Select", ak7604_inportsel_enum[2]),

	SOC_SINGLE("SRC1 Mute", AK7604_71_SRCMUTE_SETTING, 4, 1, 0),
	SOC_SINGLE("SRC2 Mute", AK7604_71_SRCMUTE_SETTING, 5, 1, 0),
	SOC_SINGLE("SRC3 Mute", AK7604_71_SRCMUTE_SETTING, 6, 1, 0),
	SOC_SINGLE("SRC4 Mute", AK7604_71_SRCMUTE_SETTING, 7, 1, 0),
	SOC_ENUM("SRC1 Mute Semi-Auto", ak7604_src_softmute_enum[0]),
	SOC_ENUM("SRC2 Mute Semi-Auto", ak7604_src_softmute_enum[1]),
	SOC_ENUM("SRC3 Mute Semi-Auto", ak7604_src_softmute_enum[2]),
	SOC_ENUM("SRC4 Mute Semi-Auto", ak7604_src_softmute_enum[3]),
	SOC_SINGLE("SRC1 Group Delay Matching", AK7604_72_SRCGROUTP_SETTING, 0, 3, 0),
	SOC_SINGLE("SRC2 Group Delay Matching", AK7604_72_SRCGROUTP_SETTING, 2, 3, 0),
	SOC_SINGLE("SRC3 Group Delay Matching", AK7604_72_SRCGROUTP_SETTING, 4, 3, 0),
	SOC_SINGLE("SRC4 Group Delay Matching", AK7604_72_SRCGROUTP_SETTING, 6, 3, 0),
	SOC_ENUM("SRC1 Digital Filter", ak7604_src_dfil_enum[0]),
	SOC_ENUM("SRC2 Digital Filter", ak7604_src_dfil_enum[1]),
	SOC_ENUM("SRC3 Digital Filter", ak7604_src_dfil_enum[2]),
	SOC_ENUM("SRC4 Digital Filter", ak7604_src_dfil_enum[3]),



	SOC_SINGLE("DSP JX0 Enable", AK7604_61_DSP_SETTING2, 4, 1, 0),
	SOC_SINGLE("DSP JX1 Enable", AK7604_61_DSP_SETTING2, 5, 1, 0),
	SOC_SINGLE("DSP JX2 Enable", AK7604_61_DSP_SETTING2, 6, 1, 0),

	SOC_SINGLE("STO DSP WDT Error Out", AK7604_53_STO_SETTING, 6, 1, 1),
	SOC_SINGLE("STO CRC Error Out", AK7604_53_STO_SETTING, 5, 1, 0),
	SOC_SINGLE("STO PLL Lock Signal Out", AK7604_53_STO_SETTING, 4, 1, 0),
	SOC_SINGLE("STO SRC4 Lock Out", AK7604_53_STO_SETTING, 3, 1, 0),
	SOC_SINGLE("STO SRC3 Lock Out", AK7604_53_STO_SETTING, 2, 1, 0),
	SOC_SINGLE("STO SRC2 Lock Out", AK7604_53_STO_SETTING, 1, 1, 0),
	SOC_SINGLE("STO SRC1 Lock Out", AK7604_53_STO_SETTING, 0, 1, 0),

	SOC_ENUM("DSP DRAM Bank Size", ak7604_dsp_dram_enum[0]),
	SOC_ENUM("DSP DRAM Bank Addressing", ak7604_dsp_dram_enum[1]),

	SOC_ENUM_EXT("DSP Firmware PRAM", ak7604_firmware_enum[0],
		get_DSP_write_pram, set_DSP_write_pram),
	SOC_ENUM_EXT("DSP Firmware CRAM", ak7604_firmware_enum[1],
		get_DSP_write_cram, set_DSP_write_cram),

	SOC_ENUM_EXT("Set CRAM Address", ak7604_cramope_enum[0],
		get_cram_write_addr, set_cram_write_addr),
	SOC_ENUM_EXT("Set CRAM Data H", ak7604_cramope_enum[1],
		get_cram_write_valueH, set_cram_write_valueH),
	SOC_ENUM_EXT("Set CRAM Data M", ak7604_cramope_enum[1],
		get_cram_write_valueM, set_cram_write_valueM),
	SOC_ENUM_EXT("Set CRAM Data L", ak7604_cramope_enum[1],
		get_cram_write_valueL, set_cram_write_valueL),
	SOC_ENUM_EXT("Execute CRAM Write", ak7604_cramope_enum[2],
		get_cram_write_exec, set_cram_write_exec),

#ifdef AK7604_DEBUG
	SOC_ENUM_EXT("Reg Read", ak7604_test_enum[0], get_test_reg, set_test_reg),
#endif

};

static const char * const ak7604_micbias1_select_texts[] = {
	"LineIn", "MicBias"
};

static SOC_ENUM_SINGLE_VIRT_DECL(ak7604_micbias1_mux_enum, ak7604_micbias1_select_texts);

static const struct snd_kcontrol_new ak7604_micbias1_mux_control =
	SOC_DAPM_ENUM("MicBias1 Select", ak7604_micbias1_mux_enum);


static const char * const ak7604_micbias2_select_texts[] = {
	"LineIn", "MicBias"
};

static SOC_ENUM_SINGLE_VIRT_DECL(ak7604_micbias2_mux_enum, ak7604_micbias2_select_texts);

static const struct snd_kcontrol_new ak7604_micbias2_mux_control =
	SOC_DAPM_ENUM("MicBias2 Select", ak7604_micbias2_mux_enum);

static const char * const ak7604_adc_input_texts[] = {
	"INP_N", "AIN1_GND", "AIN1", "AIN2", "AIN3"
};

static int ak7604_adc_input_values[] = {
	0, 1, 2, 4, 6
};

static SOC_VALUE_ENUM_SINGLE_DECL(ak7604_adc_input_enum,
				  AK7604_8D_AIN_SELECT, 1,
				  0x7, ak7604_adc_input_texts,
				  ak7604_adc_input_values);

static const struct snd_kcontrol_new ak7604_adc_input_mux_control =
	SOC_DAPM_ENUM("ADC select", ak7604_adc_input_enum);

static const char * const ak7604_source_select_texts[] = {
	"ALL0",    "SDIN1A",   "SDIN1B",  "SDIN1C",  "SDIN1D",
	"SDIN2",   "SDIN3",    "SDIN4",   "DSPO1",   "DSPO2",
	"DSPO3",   "DSPO4",    "DSPO5",   "DSPO6",    "ADC",
	"SRC1O",   "SRC2O",    "SRC3O",   "SRC4O"
};

static const struct soc_enum ak7604_sout1a_mux_enum =
	SOC_ENUM_SINGLE(AK7604_19_SDOUT1A_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_sout1a_mux_control =
	SOC_DAPM_ENUM("SOUT1A Select", ak7604_sout1a_mux_enum);

static const struct soc_enum ak7604_sout1b_mux_enum =
	SOC_ENUM_SINGLE(AK7604_1A_SDOUT1B_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_sout1b_mux_control =
	SOC_DAPM_ENUM("SOUT1B Select", ak7604_sout1b_mux_enum);

static const struct soc_enum ak7604_sout1c_mux_enum =
	SOC_ENUM_SINGLE(AK7604_1B_SDOUT1C_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_sout1c_mux_control =
	SOC_DAPM_ENUM("SOUT1C Select", ak7604_sout1c_mux_enum);

static const struct soc_enum ak7604_sout1d_mux_enum =
	SOC_ENUM_SINGLE(AK7604_1C_SDOUT1D_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_sout1d_mux_control =
	SOC_DAPM_ENUM("SOUT1D Select", ak7604_sout1d_mux_enum);

static const struct soc_enum ak7604_sout2_mux_enum =
	SOC_ENUM_SINGLE(AK7604_1D_SDOUT2_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_sout2_mux_control =
	SOC_DAPM_ENUM("SOUT2 Select", ak7604_sout2_mux_enum);

static const struct soc_enum ak7604_sout3_mux_enum =
	SOC_ENUM_SINGLE(AK7604_1E_SDOUT3_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_sout3_mux_control =
	SOC_DAPM_ENUM("SOUT3 Select", ak7604_sout3_mux_enum);

static const struct soc_enum ak7604_dac1_mux_enum =
	SOC_ENUM_SINGLE(AK7604_1F_DAC1_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dac1_mux_control =
	SOC_DAPM_ENUM("DAC1 Select", ak7604_dac1_mux_enum);

static const struct soc_enum ak7604_dac2_mux_enum =
	SOC_ENUM_SINGLE(AK7604_20_DAC2_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dac2_mux_control =
	SOC_DAPM_ENUM("DAC2 Select", ak7604_dac2_mux_enum);

static const struct soc_enum ak7604_dac3_mux_enum =
	SOC_ENUM_SINGLE(AK7604_21_DAC3_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dac3_mux_control =
	SOC_DAPM_ENUM("DAC3 Select", ak7604_dac3_mux_enum);


static const struct soc_enum ak7604_dspin1_mux_enum =
	SOC_ENUM_SINGLE(AK7604_22_DSPDIN1_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dspin1_mux_control =
	SOC_DAPM_ENUM("DSPIN1 Select", ak7604_dspin1_mux_enum);


static const struct soc_enum ak7604_dspin2_mux_enum =
	SOC_ENUM_SINGLE(AK7604_23_DSPDIN2_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dspin2_mux_control =
	SOC_DAPM_ENUM("DSP1 IN2 Select", ak7604_dspin2_mux_enum);

static const struct soc_enum ak7604_dspin3_mux_enum =
	SOC_ENUM_SINGLE(AK7604_24_DSPDIN3_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dspin3_mux_control =
	SOC_DAPM_ENUM("DSP1 IN3 Select", ak7604_dspin3_mux_enum);

static const struct soc_enum ak7604_dspin4_mux_enum =
	SOC_ENUM_SINGLE(AK7604_25_DSPDIN4_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dspin4_mux_control =
	SOC_DAPM_ENUM("DSP1 IN4 Select", ak7604_dspin4_mux_enum);

static const struct soc_enum ak7604_dspin5_mux_enum =
	SOC_ENUM_SINGLE(AK7604_26_DSPDIN5_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dspin5_mux_control =
	SOC_DAPM_ENUM("DSP1 IN5 Select", ak7604_dspin5_mux_enum);

static const struct soc_enum ak7604_dspin6_mux_enum =
	SOC_ENUM_SINGLE(AK7604_27_DSPDIN6_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_dspin6_mux_control =
	SOC_DAPM_ENUM("DSP1 IN6 Select", ak7604_dspin6_mux_enum);

static const struct soc_enum ak7604_src1_mux_enum =
	SOC_ENUM_SINGLE(AK7604_28_SRC1_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_src1_mux_control =
	SOC_DAPM_ENUM("SRC1 Select", ak7604_src1_mux_enum);

static const struct soc_enum ak7604_src2_mux_enum =
	SOC_ENUM_SINGLE(AK7604_29_SRC2_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_src2_mux_control =
	SOC_DAPM_ENUM("SRC2 Select", ak7604_src2_mux_enum);

static const struct soc_enum ak7604_src3_mux_enum =
	SOC_ENUM_SINGLE(AK7604_2A_SRC3_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_src3_mux_control =
	SOC_DAPM_ENUM("SRC3 Select", ak7604_src3_mux_enum);

static const struct soc_enum ak7604_src4_mux_enum =
	SOC_ENUM_SINGLE(AK7604_2B_SRC4_SELECT, 0,
			ARRAY_SIZE(ak7604_source_select_texts), ak7604_source_select_texts);

static const struct snd_kcontrol_new ak7604_src4_mux_control =
	SOC_DAPM_ENUM("SRC4 Select", ak7604_src4_mux_enum);


static int ak7604_ClockReset(struct snd_soc_dapm_widget *w,
			 struct snd_kcontrol *kcontrol, int event)
{akdbgprt("\t[AK7604] %s(%d):event = %d\n", __func__, __LINE__, event);
#ifdef KERNEL_3_18_XX
	//struct snd_soc_codec *codec = w->codec;
#else
	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
#endif

	switch (event) {
	case SND_SOC_DAPM_PRE_PMU:
		// CKRESETN bit = 1
		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x80, 0x80);
		mdelay(10);
		// HRESETN bit = 1
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x01, 0x01);
		break;

	case SND_SOC_DAPM_POST_PMD:
//		// HRESETN bit = 0
//		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x01, 0x0);
//		// CKRESETN bit = 0
//		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x80, 0x0);
		break;
	}
	return 0;
}

static const struct snd_kcontrol_new dspout1_mixer_kctrl[] = {
	SOC_DAPM_SINGLE("DSPIN1", AK7604_VIRT_C7_DSPOUT1_MIX, 0, 1, 0),
	SOC_DAPM_SINGLE("DSPIN2", AK7604_VIRT_C7_DSPOUT1_MIX, 1, 1, 0),
	SOC_DAPM_SINGLE("DSPIN3", AK7604_VIRT_C7_DSPOUT1_MIX, 2, 1, 0),
	SOC_DAPM_SINGLE("DSPIN4", AK7604_VIRT_C7_DSPOUT1_MIX, 3, 1, 0),
	SOC_DAPM_SINGLE("DSPIN5", AK7604_VIRT_C7_DSPOUT1_MIX, 4, 1, 0),
	SOC_DAPM_SINGLE("DSPIN6", AK7604_VIRT_C7_DSPOUT1_MIX, 5, 1, 0),
};

static const struct snd_kcontrol_new dspout2_mixer_kctrl[] = {
	SOC_DAPM_SINGLE("DSPIN1", AK7604_VIRT_C8_DSPOUT2_MIX, 0, 1, 0),
	SOC_DAPM_SINGLE("DSPIN2", AK7604_VIRT_C8_DSPOUT2_MIX, 1, 1, 0),
	SOC_DAPM_SINGLE("DSPIN3", AK7604_VIRT_C8_DSPOUT2_MIX, 2, 1, 0),
	SOC_DAPM_SINGLE("DSPIN4", AK7604_VIRT_C8_DSPOUT2_MIX, 3, 1, 0),
	SOC_DAPM_SINGLE("DSPIN5", AK7604_VIRT_C8_DSPOUT2_MIX, 4, 1, 0),
	SOC_DAPM_SINGLE("DSPIN6", AK7604_VIRT_C8_DSPOUT2_MIX, 5, 1, 0),
};

static const struct snd_kcontrol_new dspout3_mixer_kctrl[] = {
	SOC_DAPM_SINGLE("DSPIN1", AK7604_VIRT_C9_DSPOUT3_MIX, 0, 1, 0),
	SOC_DAPM_SINGLE("DSPIN2", AK7604_VIRT_C9_DSPOUT3_MIX, 1, 1, 0),
	SOC_DAPM_SINGLE("DSPIN3", AK7604_VIRT_C9_DSPOUT3_MIX, 2, 1, 0),
	SOC_DAPM_SINGLE("DSPIN4", AK7604_VIRT_C9_DSPOUT3_MIX, 3, 1, 0),
	SOC_DAPM_SINGLE("DSPIN5", AK7604_VIRT_C9_DSPOUT3_MIX, 4, 1, 0),
	SOC_DAPM_SINGLE("DSPIN6", AK7604_VIRT_C9_DSPOUT3_MIX, 5, 1, 0),
};

static const struct snd_kcontrol_new dspout4_mixer_kctrl[] = {
	SOC_DAPM_SINGLE("DSPIN1", AK7604_VIRT_CA_DSPOUT4_MIX, 0, 1, 0),
	SOC_DAPM_SINGLE("DSPIN2", AK7604_VIRT_CA_DSPOUT4_MIX, 1, 1, 0),
	SOC_DAPM_SINGLE("DSPIN3", AK7604_VIRT_CA_DSPOUT4_MIX, 2, 1, 0),
	SOC_DAPM_SINGLE("DSPIN4", AK7604_VIRT_CA_DSPOUT4_MIX, 3, 1, 0),
	SOC_DAPM_SINGLE("DSPIN5", AK7604_VIRT_CA_DSPOUT4_MIX, 4, 1, 0),
	SOC_DAPM_SINGLE("DSPIN6", AK7604_VIRT_CA_DSPOUT4_MIX, 5, 1, 0),
};

static const struct snd_kcontrol_new dspout5_mixer_kctrl[] = {
	SOC_DAPM_SINGLE("DSPIN1", AK7604_VIRT_CB_DSPOUT5_MIX, 0, 1, 0),
	SOC_DAPM_SINGLE("DSPIN2", AK7604_VIRT_CB_DSPOUT5_MIX, 1, 1, 0),
	SOC_DAPM_SINGLE("DSPIN3", AK7604_VIRT_CB_DSPOUT5_MIX, 2, 1, 0),
	SOC_DAPM_SINGLE("DSPIN4", AK7604_VIRT_CB_DSPOUT5_MIX, 3, 1, 0),
	SOC_DAPM_SINGLE("DSPIN5", AK7604_VIRT_CB_DSPOUT5_MIX, 4, 1, 0),
	SOC_DAPM_SINGLE("DSPIN6", AK7604_VIRT_CB_DSPOUT5_MIX, 5, 1, 0),
};

static const struct snd_kcontrol_new dspout6_mixer_kctrl[] = {
	SOC_DAPM_SINGLE("DSPIN1", AK7604_VIRT_CC_DSPOUT6_MIX, 0, 1, 0),
	SOC_DAPM_SINGLE("DSPIN2", AK7604_VIRT_CC_DSPOUT6_MIX, 1, 1, 0),
	SOC_DAPM_SINGLE("DSPIN3", AK7604_VIRT_CC_DSPOUT6_MIX, 2, 1, 0),
	SOC_DAPM_SINGLE("DSPIN4", AK7604_VIRT_CC_DSPOUT6_MIX, 3, 1, 0),
	SOC_DAPM_SINGLE("DSPIN5", AK7604_VIRT_CC_DSPOUT6_MIX, 4, 1, 0),
	SOC_DAPM_SINGLE("DSPIN6", AK7604_VIRT_CC_DSPOUT6_MIX, 5, 1, 0),
};

static int ak7604_DSPPowerUp(struct snd_soc_dapm_widget *w,
			 struct snd_kcontrol *kcontrol, int event)
{akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);
#ifdef KERNEL_3_18_XX
	//struct snd_soc_codec *codec = w->codec;
#else
	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
#endif

	switch (event) {
	case SND_SOC_DAPM_POST_PMU:
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x04, 0x04);
		break;

	case SND_SOC_DAPM_POST_PMD:
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x04, 0x00);
		break;
	}
	return 0;
}

/* ak7604 dapm widgets */
static const struct snd_soc_dapm_widget ak7604_dapm_widgets[] = {

	SND_SOC_DAPM_SUPPLY_S("Clock Power", 1, SND_SOC_NOPM, 0, 0, ak7604_ClockReset,
			SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
	SND_SOC_DAPM_SUPPLY_S("CODEC Power", 2, AK7604_A3_RESETCONTROL, 1, 0, NULL, 0),

// CODEC
	SND_SOC_DAPM_ADC("ADC", NULL, AK7604_A1_POWERMANAGEMENT1, 7, 0),
	SND_SOC_DAPM_DAC("DAC1", NULL, AK7604_A1_POWERMANAGEMENT1, 4, 0),
	SND_SOC_DAPM_DAC("DAC2", NULL, AK7604_A1_POWERMANAGEMENT1, 5, 0),
	SND_SOC_DAPM_DAC("DAC3", NULL, AK7604_A1_POWERMANAGEMENT1, 6, 0),

// SRC
	SND_SOC_DAPM_PGA("SRC1", AK7604_A2_POWERMANAGEMENT2, 4, 0, NULL, 0),
	SND_SOC_DAPM_PGA("SRC2", AK7604_A2_POWERMANAGEMENT2, 5, 0, NULL, 0),
	SND_SOC_DAPM_PGA("SRC3", AK7604_A2_POWERMANAGEMENT2, 6, 0, NULL, 0),
	SND_SOC_DAPM_PGA("SRC4", AK7604_A2_POWERMANAGEMENT2, 7, 0, NULL, 0),

// DSP
	SND_SOC_DAPM_SUPPLY_S("DSP", 3, AK7604_A3_RESETCONTROL, 2, 0, ak7604_DSPPowerUp,
			SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),

	SND_SOC_DAPM_PGA("DSPO1", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("DSPO2", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("DSPO3", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("DSPO4", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("DSPO5", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("DSPO6", SND_SOC_NOPM, 0, 0, NULL, 0),

//	SND_SOC_DAPM_MIXER("DSPOUT1 Mixer", SND_SOC_NOPM, 0, 0,
//		&dspout1_mixer_kctrl[0], ARRAY_SIZE(dspout1_mixer_kctrl)),
//	SND_SOC_DAPM_MIXER("DSPOUT2 Mixer", SND_SOC_NOPM, 0, 0,
//		&dspout2_mixer_kctrl[0], ARRAY_SIZE(dspout2_mixer_kctrl)),
//	SND_SOC_DAPM_MIXER("DSPOUT3 Mixer", SND_SOC_NOPM, 0, 0,
//		&dspout3_mixer_kctrl[0], ARRAY_SIZE(dspout3_mixer_kctrl)),
//	SND_SOC_DAPM_MIXER("DSPOUT4 Mixer", SND_SOC_NOPM, 0, 0,
//		&dspout4_mixer_kctrl[0], ARRAY_SIZE(dspout4_mixer_kctrl)),
//	SND_SOC_DAPM_MIXER("DSPOUT5 Mixer", SND_SOC_NOPM, 0, 0,
//		&dspout5_mixer_kctrl[0], ARRAY_SIZE(dspout5_mixer_kctrl)),
//	SND_SOC_DAPM_MIXER("DSPOUT6 Mixer", SND_SOC_NOPM, 0, 0,
//		&dspout6_mixer_kctrl[0], ARRAY_SIZE(dspout6_mixer_kctrl)),

// Digital Input/Output
	SND_SOC_DAPM_AIF_IN("SDIN1A", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_IN("SDIN1B", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_IN("SDIN1C", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_IN("SDIN1D", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_IN("SDIN2", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_IN("SDIN3", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_IN("SDIN4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),

	SND_SOC_DAPM_AIF_OUT("SDOUT1", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_OUT("SDOUT2", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_AIF_OUT("SDOUT3", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),

// Analog Input
	SND_SOC_DAPM_INPUT("INP_N"),
	SND_SOC_DAPM_INPUT("AIN1_GND"),
	SND_SOC_DAPM_INPUT("AIN1"),
	SND_SOC_DAPM_INPUT("AIN2"),
	SND_SOC_DAPM_INPUT("AIN3"),

	SND_SOC_DAPM_MUX("ADC MUX", SND_SOC_NOPM, 0, 0, &ak7604_adc_input_mux_control),

// MIC Bias
	SND_SOC_DAPM_MICBIAS("MicBias1", AK7604_A1_POWERMANAGEMENT1, 2, 0),
	SND_SOC_DAPM_MUX("MicBias1 MUX", SND_SOC_NOPM, 0, 0, &ak7604_micbias1_mux_control),

	SND_SOC_DAPM_MICBIAS("MicBias2", AK7604_A1_POWERMANAGEMENT1, 3, 0),
	SND_SOC_DAPM_MUX("MicBias2 MUX", SND_SOC_NOPM, 0, 0, &ak7604_micbias2_mux_control),

// Analog Output
	SND_SOC_DAPM_OUTPUT("AOUT1"),
	SND_SOC_DAPM_OUTPUT("AOUT2"),
	SND_SOC_DAPM_OUTPUT("AOUT3"),


// Source Selector
	SND_SOC_DAPM_MUX("SDOUT1A Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_sout1a_mux_control),
	SND_SOC_DAPM_MUX("SDOUT1B Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_sout1b_mux_control),
	SND_SOC_DAPM_MUX("SDOUT1C Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_sout1c_mux_control),
	SND_SOC_DAPM_MUX("SDOUT1D Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_sout1d_mux_control),
	SND_SOC_DAPM_MUX("SDOUT2 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_sout2_mux_control),
	SND_SOC_DAPM_MUX("SDOUT3 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_sout3_mux_control),

	SND_SOC_DAPM_MUX("DAC1 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dac1_mux_control),
	SND_SOC_DAPM_MUX("DAC2 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dac2_mux_control),
	SND_SOC_DAPM_MUX("DAC3 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dac3_mux_control),

	SND_SOC_DAPM_MUX("DSPIN1 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dspin1_mux_control),
	SND_SOC_DAPM_MUX("DSPIN2 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dspin2_mux_control),
	SND_SOC_DAPM_MUX("DSPIN3 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dspin3_mux_control),
	SND_SOC_DAPM_MUX("DSPIN4 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dspin4_mux_control),
	SND_SOC_DAPM_MUX("DSPIN5 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dspin5_mux_control),
	SND_SOC_DAPM_MUX("DSPIN6 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_dspin6_mux_control),

	SND_SOC_DAPM_MUX("SRC1 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_src1_mux_control),
	SND_SOC_DAPM_MUX("SRC2 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_src2_mux_control),
	SND_SOC_DAPM_MUX("SRC3 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_src3_mux_control),
	SND_SOC_DAPM_MUX("SRC4 Source Selector", SND_SOC_NOPM, 0, 0, &ak7604_src4_mux_control),

};

static const struct snd_soc_dapm_route ak7604_intercon[] = {
	{"CODEC Power", NULL, "Clock Power"},
	{"SDOUT1", NULL, "Clock Power"},
	{"SDOUT2", NULL, "Clock Power"},
	{"SDOUT3", NULL, "Clock Power"},

	{"ADC", NULL, "CODEC Power"},
	{"DAC1", NULL, "CODEC Power"},
	{"DAC2", NULL, "CODEC Power"},
	{"DAC3", NULL, "CODEC Power"},

	{"ADC MUX", "INP_N", "INP_N"},
	{"ADC MUX", "AIN1_GND", "AIN1_GND"},
	{"ADC MUX", "AIN1", "AIN1"},
	{"ADC MUX", "AIN2", "AIN2"},
	{"ADC MUX", "AIN3", "AIN3"},

	{"MicBias1", NULL, "ADC MUX"},
	{"MicBias1 MUX", "LineIn", "ADC MUX"},
	{"MicBias1 MUX", "MicBias", "MicBias1"},

	{"MicBias2", NULL, "MicBias1 MUX"},
	{"MicBias2 MUX", "LineIn", "ADC MUX"},
	{"MicBias2 MUX", "MicBias", "MicBias2"},

	{"ADC", NULL, "MicBias2 MUX"},

	{"SDOUT1", NULL, "SDOUT1A Source Selector"},
	{"SDOUT1", NULL, "SDOUT1B Source Selector"},
	{"SDOUT1", NULL, "SDOUT1C Source Selector"},
	{"SDOUT1", NULL, "SDOUT1D Source Selector"},
	{"SDOUT2", NULL, "SDOUT2 Source Selector"},
	{"SDOUT3", NULL, "SDOUT3 Source Selector"},

	{"DAC1", NULL, "DAC1 Source Selector"},
	{"DAC2", NULL, "DAC2 Source Selector"},
	{"DAC3", NULL, "DAC3 Source Selector"},

	{"AOUT1", NULL, "DAC1"},
	{"AOUT2", NULL, "DAC2"},
	{"AOUT3", NULL, "DAC3"},

	{"DSPO1", NULL, "DSP"},
	{"DSPO2", NULL, "DSP"},
	{"DSPO3", NULL, "DSP"},
	{"DSPO4", NULL, "DSP"},
	{"DSPO5", NULL, "DSP"},
	{"DSPO6", NULL, "DSP"},
#if 0
	{"DSPO1", NULL, "DSPOUT1 Mixer"},
	{"DSPO2", NULL, "DSPOUT2 Mixer"},
	{"DSPO3", NULL, "DSPOUT3 Mixer"},
	{"DSPO4", NULL, "DSPOUT4 Mixer"},
	{"DSPO5", NULL, "DSPOUT5 Mixer"},
	{"DSPO6", NULL, "DSPOUT6 Mixer"},

	{"DSPOUT1 Mixer", "DSPIN1", "DSPIN1 Source Selector"},
	{"DSPOUT1 Mixer", "DSPIN2", "DSPIN2 Source Selector"},
	{"DSPOUT1 Mixer", "DSPIN3", "DSPIN3 Source Selector"},
	{"DSPOUT1 Mixer", "DSPIN4", "DSPIN4 Source Selector"},
	{"DSPOUT1 Mixer", "DSPIN5", "DSPIN5 Source Selector"},
	{"DSPOUT1 Mixer", "DSPIN6", "DSPIN6 Source Selector"},

	{"DSPOUT2 Mixer", "DSPIN1", "DSPIN1 Source Selector"},
	{"DSPOUT2 Mixer", "DSPIN2", "DSPIN2 Source Selector"},
	{"DSPOUT2 Mixer", "DSPIN3", "DSPIN3 Source Selector"},
	{"DSPOUT2 Mixer", "DSPIN4", "DSPIN4 Source Selector"},
	{"DSPOUT2 Mixer", "DSPIN5", "DSPIN5 Source Selector"},
	{"DSPOUT2 Mixer", "DSPIN6", "DSPIN6 Source Selector"},

	{"DSPOUT3 Mixer", "DSPIN1", "DSPIN1 Source Selector"},
	{"DSPOUT3 Mixer", "DSPIN2", "DSPIN2 Source Selector"},
	{"DSPOUT3 Mixer", "DSPIN3", "DSPIN3 Source Selector"},
	{"DSPOUT3 Mixer", "DSPIN4", "DSPIN4 Source Selector"},
	{"DSPOUT3 Mixer", "DSPIN5", "DSPIN5 Source Selector"},
	{"DSPOUT3 Mixer", "DSPIN6", "DSPIN6 Source Selector"},

	{"DSPOUT4 Mixer", "DSPIN1", "DSPIN1 Source Selector"},
	{"DSPOUT4 Mixer", "DSPIN2", "DSPIN2 Source Selector"},
	{"DSPOUT4 Mixer", "DSPIN3", "DSPIN3 Source Selector"},
	{"DSPOUT4 Mixer", "DSPIN4", "DSPIN4 Source Selector"},
	{"DSPOUT4 Mixer", "DSPIN5", "DSPIN5 Source Selector"},
	{"DSPOUT4 Mixer", "DSPIN6", "DSPIN6 Source Selector"},

	{"DSPOUT5 Mixer", "DSPIN1", "DSPIN1 Source Selector"},
	{"DSPOUT5 Mixer", "DSPIN2", "DSPIN2 Source Selector"},
	{"DSPOUT5 Mixer", "DSPIN3", "DSPIN3 Source Selector"},
	{"DSPOUT5 Mixer", "DSPIN4", "DSPIN4 Source Selector"},
	{"DSPOUT5 Mixer", "DSPIN5", "DSPIN5 Source Selector"},
	{"DSPOUT5 Mixer", "DSPIN6", "DSPIN6 Source Selector"},

	{"DSPOUT6 Mixer", "DSPIN1", "DSPIN1 Source Selector"},
	{"DSPOUT6 Mixer", "DSPIN2", "DSPIN2 Source Selector"},
	{"DSPOUT6 Mixer", "DSPIN3", "DSPIN3 Source Selector"},
	{"DSPOUT6 Mixer", "DSPIN4", "DSPIN4 Source Selector"},
	{"DSPOUT6 Mixer", "DSPIN5", "DSPIN5 Source Selector"},
	{"DSPOUT6 Mixer", "DSPIN6", "DSPIN6 Source Selector"},
#endif
	{"SRC1", NULL, "SRC1 Source Selector"},
	{"SRC2", NULL, "SRC2 Source Selector"},
	{"SRC3", NULL, "SRC3 Source Selector"},
	{"SRC4", NULL, "SRC4 Source Selector"},

	{"DSPIN1 Source Selector", "SDIN1A", "SDIN1A"},
	{"DSPIN1 Source Selector", "SDIN1B", "SDIN1B"},
	{"DSPIN1 Source Selector", "SDIN1C", "SDIN1C"},
	{"DSPIN1 Source Selector", "SDIN1D", "SDIN1D"},
	{"DSPIN1 Source Selector", "SDIN2", "SDIN2"},
	{"DSPIN1 Source Selector", "SDIN3", "SDIN3"},
	{"DSPIN1 Source Selector", "SDIN4", "SDIN4"},
	{"DSPIN1 Source Selector", "DSPO1", "DSPO1"},
	{"DSPIN1 Source Selector", "DSPO2", "DSPO2"},
	{"DSPIN1 Source Selector", "DSPO3", "DSPO3"},
	{"DSPIN1 Source Selector", "DSPO4", "DSPO4"},
	{"DSPIN1 Source Selector", "DSPO5", "DSPO5"},
	{"DSPIN1 Source Selector", "DSPO6", "DSPO6"},
	{"DSPIN1 Source Selector", "ADC", "ADC"},
	{"DSPIN1 Source Selector", "SRC1O", "SRC1"},
	{"DSPIN1 Source Selector", "SRC2O", "SRC2"},
	{"DSPIN1 Source Selector", "SRC3O", "SRC3"},
	{"DSPIN1 Source Selector", "SRC4O", "SRC4"},

	{"DSPIN2 Source Selector", "SDIN1A", "SDIN1A"},
	{"DSPIN2 Source Selector", "SDIN1B", "SDIN1B"},
	{"DSPIN2 Source Selector", "SDIN1C", "SDIN1C"},
	{"DSPIN2 Source Selector", "SDIN1D", "SDIN1D"},
	{"DSPIN2 Source Selector", "SDIN2", "SDIN2"},
	{"DSPIN2 Source Selector", "SDIN3", "SDIN3"},
	{"DSPIN2 Source Selector", "SDIN4", "SDIN4"},
	{"DSPIN2 Source Selector", "DSPO1", "DSPO1"},
	{"DSPIN2 Source Selector", "DSPO2", "DSPO2"},
	{"DSPIN2 Source Selector", "DSPO3", "DSPO3"},
	{"DSPIN2 Source Selector", "DSPO4", "DSPO4"},
	{"DSPIN2 Source Selector", "DSPO5", "DSPO5"},
	{"DSPIN2 Source Selector", "DSPO6", "DSPO6"},
	{"DSPIN2 Source Selector", "ADC", "ADC"},
	{"DSPIN2 Source Selector", "SRC1O", "SRC1"},
	{"DSPIN2 Source Selector", "SRC2O", "SRC2"},
	{"DSPIN2 Source Selector", "SRC3O", "SRC3"},
	{"DSPIN2 Source Selector", "SRC4O", "SRC4"},

	{"DSPIN3 Source Selector", "SDIN1A", "SDIN1A"},
	{"DSPIN3 Source Selector", "SDIN1B", "SDIN1B"},
	{"DSPIN3 Source Selector", "SDIN1C", "SDIN1C"},
	{"DSPIN3 Source Selector", "SDIN1D", "SDIN1D"},
	{"DSPIN3 Source Selector", "SDIN2", "SDIN2"},
	{"DSPIN3 Source Selector", "SDIN3", "SDIN3"},
	{"DSPIN3 Source Selector", "SDIN4", "SDIN4"},
	{"DSPIN3 Source Selector", "DSPO1", "DSPO1"},
	{"DSPIN3 Source Selector", "DSPO2", "DSPO2"},
	{"DSPIN3 Source Selector", "DSPO3", "DSPO3"},
	{"DSPIN3 Source Selector", "DSPO4", "DSPO4"},
	{"DSPIN3 Source Selector", "DSPO5", "DSPO5"},
	{"DSPIN3 Source Selector", "DSPO6", "DSPO6"},
	{"DSPIN3 Source Selector", "ADC", "ADC"},
	{"DSPIN3 Source Selector", "SRC1O", "SRC1"},
	{"DSPIN3 Source Selector", "SRC2O", "SRC2"},
	{"DSPIN3 Source Selector", "SRC3O", "SRC3"},
	{"DSPIN3 Source Selector", "SRC4O", "SRC4"},

	{"DSPIN4 Source Selector", "SDIN1A", "SDIN1A"},
	{"DSPIN4 Source Selector", "SDIN1B", "SDIN1B"},
	{"DSPIN4 Source Selector", "SDIN1C", "SDIN1C"},
	{"DSPIN4 Source Selector", "SDIN1D", "SDIN1D"},
	{"DSPIN4 Source Selector", "SDIN2", "SDIN2"},
	{"DSPIN4 Source Selector", "SDIN3", "SDIN3"},
	{"DSPIN4 Source Selector", "SDIN4", "SDIN4"},
	{"DSPIN4 Source Selector", "DSPO1", "DSPO1"},
	{"DSPIN4 Source Selector", "DSPO2", "DSPO2"},
	{"DSPIN4 Source Selector", "DSPO3", "DSPO3"},
	{"DSPIN4 Source Selector", "DSPO4", "DSPO4"},
	{"DSPIN4 Source Selector", "DSPO5", "DSPO5"},
	{"DSPIN4 Source Selector", "DSPO6", "DSPO6"},
	{"DSPIN4 Source Selector", "ADC", "ADC"},
	{"DSPIN4 Source Selector", "SRC1O", "SRC1"},
	{"DSPIN4 Source Selector", "SRC2O", "SRC2"},
	{"DSPIN4 Source Selector", "SRC3O", "SRC3"},
	{"DSPIN4 Source Selector", "SRC4O", "SRC4"},

	{"DSPIN5 Source Selector", "SDIN1A", "SDIN1A"},
	{"DSPIN5 Source Selector", "SDIN1B", "SDIN1B"},
	{"DSPIN5 Source Selector", "SDIN1C", "SDIN1C"},
	{"DSPIN5 Source Selector", "SDIN1D", "SDIN1D"},
	{"DSPIN5 Source Selector", "SDIN2", "SDIN2"},
	{"DSPIN5 Source Selector", "SDIN3", "SDIN3"},
	{"DSPIN5 Source Selector", "SDIN4", "SDIN4"},
	{"DSPIN5 Source Selector", "DSPO1", "DSPO1"},
	{"DSPIN5 Source Selector", "DSPO2", "DSPO2"},
	{"DSPIN5 Source Selector", "DSPO3", "DSPO3"},
	{"DSPIN5 Source Selector", "DSPO4", "DSPO4"},
	{"DSPIN5 Source Selector", "DSPO5", "DSPO5"},
	{"DSPIN5 Source Selector", "DSPO6", "DSPO6"},
	{"DSPIN5 Source Selector", "ADC", "ADC"},
	{"DSPIN5 Source Selector", "SRC1O", "SRC1"},
	{"DSPIN5 Source Selector", "SRC2O", "SRC2"},
	{"DSPIN5 Source Selector", "SRC3O", "SRC3"},
	{"DSPIN5 Source Selector", "SRC4O", "SRC4"},

	{"DSPIN6 Source Selector", "SDIN1A", "SDIN1A"},
	{"DSPIN6 Source Selector", "SDIN1B", "SDIN1B"},
	{"DSPIN6 Source Selector", "SDIN1C", "SDIN1C"},
	{"DSPIN6 Source Selector", "SDIN1D", "SDIN1D"},
	{"DSPIN6 Source Selector", "SDIN2", "SDIN2"},
	{"DSPIN6 Source Selector", "SDIN3", "SDIN3"},
	{"DSPIN6 Source Selector", "SDIN4", "SDIN4"},
	{"DSPIN6 Source Selector", "DSPO1", "DSPO1"},
	{"DSPIN6 Source Selector", "DSPO2", "DSPO2"},
	{"DSPIN6 Source Selector", "DSPO3", "DSPO3"},
	{"DSPIN6 Source Selector", "DSPO4", "DSPO4"},
	{"DSPIN6 Source Selector", "DSPO5", "DSPO5"},
	{"DSPIN6 Source Selector", "DSPO6", "DSPO6"},
	{"DSPIN6 Source Selector", "ADC", "ADC"},
	{"DSPIN6 Source Selector", "SRC1O", "SRC1"},
	{"DSPIN6 Source Selector", "SRC2O", "SRC2"},
	{"DSPIN6 Source Selector", "SRC3O", "SRC3"},
	{"DSPIN6 Source Selector", "SRC4O", "SRC4"},

	{"SRC1 Source Selector", "SDIN1A", "SDIN1A"},
	{"SRC1 Source Selector", "SDIN1B", "SDIN1B"},
	{"SRC1 Source Selector", "SDIN1C", "SDIN1C"},
	{"SRC1 Source Selector", "SDIN1D", "SDIN1D"},
	{"SRC1 Source Selector", "SDIN2", "SDIN2"},
	{"SRC1 Source Selector", "SDIN3", "SDIN3"},
	{"SRC1 Source Selector", "SDIN4", "SDIN4"},
	{"SRC1 Source Selector", "DSPO1", "DSPO1"},
	{"SRC1 Source Selector", "DSPO2", "DSPO2"},
	{"SRC1 Source Selector", "DSPO3", "DSPO3"},
	{"SRC1 Source Selector", "DSPO4", "DSPO4"},
	{"SRC1 Source Selector", "DSPO5", "DSPO5"},
	{"SRC1 Source Selector", "DSPO6", "DSPO6"},
	{"SRC1 Source Selector", "ADC", "ADC"},
	{"SRC1 Source Selector", "SRC1O", "SRC1"},
	{"SRC1 Source Selector", "SRC2O", "SRC2"},
	{"SRC1 Source Selector", "SRC3O", "SRC3"},
	{"SRC1 Source Selector", "SRC4O", "SRC4"},

	{"SRC2 Source Selector", "SDIN1A", "SDIN1A"},
	{"SRC2 Source Selector", "SDIN1B", "SDIN1B"},
	{"SRC2 Source Selector", "SDIN1C", "SDIN1C"},
	{"SRC2 Source Selector", "SDIN1D", "SDIN1D"},
	{"SRC2 Source Selector", "SDIN2", "SDIN2"},
	{"SRC2 Source Selector", "SDIN3", "SDIN3"},
	{"SRC2 Source Selector", "SDIN4", "SDIN4"},
	{"SRC2 Source Selector", "DSPO1", "DSPO1"},
	{"SRC2 Source Selector", "DSPO2", "DSPO2"},
	{"SRC2 Source Selector", "DSPO3", "DSPO3"},
	{"SRC2 Source Selector", "DSPO4", "DSPO4"},
	{"SRC2 Source Selector", "DSPO5", "DSPO5"},
	{"SRC2 Source Selector", "DSPO6", "DSPO6"},
	{"SRC2 Source Selector", "ADC", "ADC"},
	{"SRC2 Source Selector", "SRC1O", "SRC1"},
	{"SRC2 Source Selector", "SRC2O", "SRC2"},
	{"SRC2 Source Selector", "SRC3O", "SRC3"},
	{"SRC2 Source Selector", "SRC4O", "SRC4"},

	{"SRC4 Source Selector", "SDIN1A", "SDIN1A"},
	{"SRC4 Source Selector", "SDIN1B", "SDIN1B"},
	{"SRC4 Source Selector", "SDIN1C", "SDIN1C"},
	{"SRC4 Source Selector", "SDIN1D", "SDIN1D"},
	{"SRC4 Source Selector", "SDIN2", "SDIN2"},
	{"SRC4 Source Selector", "SDIN3", "SDIN3"},
	{"SRC4 Source Selector", "SDIN4", "SDIN4"},
	{"SRC4 Source Selector", "DSPO1", "DSPO1"},
	{"SRC4 Source Selector", "DSPO2", "DSPO2"},
	{"SRC4 Source Selector", "DSPO3", "DSPO3"},
	{"SRC4 Source Selector", "DSPO4", "DSPO4"},
	{"SRC4 Source Selector", "DSPO5", "DSPO5"},
	{"SRC4 Source Selector", "DSPO6", "DSPO6"},
	{"SRC4 Source Selector", "ADC", "ADC"},
	{"SRC4 Source Selector", "SRC1O", "SRC1"},
	{"SRC4 Source Selector", "SRC2O", "SRC2"},
	{"SRC4 Source Selector", "SRC3O", "SRC3"},
	{"SRC4 Source Selector", "SRC4O", "SRC4"},

	{"SRC3 Source Selector", "SDIN1A", "SDIN1A"},
	{"SRC3 Source Selector", "SDIN1B", "SDIN1B"},
	{"SRC3 Source Selector", "SDIN1C", "SDIN1C"},
	{"SRC3 Source Selector", "SDIN1D", "SDIN1D"},
	{"SRC3 Source Selector", "SDIN2", "SDIN2"},
	{"SRC3 Source Selector", "SDIN3", "SDIN3"},
	{"SRC3 Source Selector", "SDIN4", "SDIN4"},
	{"SRC3 Source Selector", "DSPO1", "DSPO1"},
	{"SRC3 Source Selector", "DSPO2", "DSPO2"},
	{"SRC3 Source Selector", "DSPO3", "DSPO3"},
	{"SRC3 Source Selector", "DSPO4", "DSPO4"},
	{"SRC3 Source Selector", "DSPO5", "DSPO5"},
	{"SRC3 Source Selector", "DSPO6", "DSPO6"},
	{"SRC3 Source Selector", "ADC", "ADC"},
	{"SRC3 Source Selector", "SRC1O", "SRC1"},
	{"SRC3 Source Selector", "SRC2O", "SRC2"},
	{"SRC3 Source Selector", "SRC3O", "SRC3"},
	{"SRC3 Source Selector", "SRC4O", "SRC4"},

	{"SDOUT1A Source Selector", "SDIN1A", "SDIN1A"},
	{"SDOUT1A Source Selector", "SDIN1B", "SDIN1B"},
	{"SDOUT1A Source Selector", "SDIN1C", "SDIN1C"},
	{"SDOUT1A Source Selector", "SDIN1D", "SDIN1D"},
	{"SDOUT1A Source Selector", "SDIN2", "SDIN2"},
	{"SDOUT1A Source Selector", "SDIN3", "SDIN3"},
	{"SDOUT1A Source Selector", "SDIN4", "SDIN4"},
	{"SDOUT1A Source Selector", "DSPO1", "DSPO1"},
	{"SDOUT1A Source Selector", "DSPO2", "DSPO2"},
	{"SDOUT1A Source Selector", "DSPO3", "DSPO3"},
	{"SDOUT1A Source Selector", "DSPO4", "DSPO4"},
	{"SDOUT1A Source Selector", "DSPO5", "DSPO5"},
	{"SDOUT1A Source Selector", "DSPO6", "DSPO6"},
	{"SDOUT1A Source Selector", "ADC", "ADC"},
	{"SDOUT1A Source Selector", "SRC1O", "SRC1"},
	{"SDOUT1A Source Selector", "SRC2O", "SRC2"},
	{"SDOUT1A Source Selector", "SRC3O", "SRC3"},
	{"SDOUT1A Source Selector", "SRC4O", "SRC4"},

	{"SDOUT1B Source Selector", "SDIN1A", "SDIN1A"},
	{"SDOUT1B Source Selector", "SDIN1B", "SDIN1B"},
	{"SDOUT1B Source Selector", "SDIN1C", "SDIN1C"},
	{"SDOUT1B Source Selector", "SDIN1D", "SDIN1D"},
	{"SDOUT1B Source Selector", "SDIN2", "SDIN2"},
	{"SDOUT1B Source Selector", "SDIN3", "SDIN3"},
	{"SDOUT1B Source Selector", "SDIN4", "SDIN4"},
	{"SDOUT1B Source Selector", "DSPO1", "DSPO1"},
	{"SDOUT1B Source Selector", "DSPO2", "DSPO2"},
	{"SDOUT1B Source Selector", "DSPO3", "DSPO3"},
	{"SDOUT1B Source Selector", "DSPO4", "DSPO4"},
	{"SDOUT1B Source Selector", "DSPO5", "DSPO5"},
	{"SDOUT1B Source Selector", "DSPO6", "DSPO6"},
	{"SDOUT1B Source Selector", "ADC", "ADC"},
	{"SDOUT1B Source Selector", "SRC1O", "SRC1"},
	{"SDOUT1B Source Selector", "SRC2O", "SRC2"},
	{"SDOUT1B Source Selector", "SRC3O", "SRC3"},
	{"SDOUT1B Source Selector", "SRC4O", "SRC4"},

	{"SDOUT1C Source Selector", "SDIN1A", "SDIN1A"},
	{"SDOUT1C Source Selector", "SDIN1B", "SDIN1B"},
	{"SDOUT1C Source Selector", "SDIN1C", "SDIN1C"},
	{"SDOUT1C Source Selector", "SDIN1D", "SDIN1D"},
	{"SDOUT1C Source Selector", "SDIN2", "SDIN2"},
	{"SDOUT1C Source Selector", "SDIN3", "SDIN3"},
	{"SDOUT1C Source Selector", "SDIN4", "SDIN4"},
	{"SDOUT1C Source Selector", "DSPO1", "DSPO1"},
	{"SDOUT1C Source Selector", "DSPO2", "DSPO2"},
	{"SDOUT1C Source Selector", "DSPO3", "DSPO3"},
	{"SDOUT1C Source Selector", "DSPO4", "DSPO4"},
	{"SDOUT1C Source Selector", "DSPO5", "DSPO5"},
	{"SDOUT1C Source Selector", "DSPO6", "DSPO6"},
	{"SDOUT1C Source Selector", "ADC", "ADC"},
	{"SDOUT1C Source Selector", "SRC1O", "SRC1"},
	{"SDOUT1C Source Selector", "SRC2O", "SRC2"},
	{"SDOUT1C Source Selector", "SRC3O", "SRC3"},
	{"SDOUT1C Source Selector", "SRC4O", "SRC4"},

	{"SDOUT1D Source Selector", "SDIN1A", "SDIN1A"},
	{"SDOUT1D Source Selector", "SDIN1B", "SDIN1B"},
	{"SDOUT1D Source Selector", "SDIN1C", "SDIN1C"},
	{"SDOUT1D Source Selector", "SDIN1D", "SDIN1D"},
	{"SDOUT1D Source Selector", "SDIN2", "SDIN2"},
	{"SDOUT1D Source Selector", "SDIN3", "SDIN3"},
	{"SDOUT1D Source Selector", "SDIN4", "SDIN4"},
	{"SDOUT1D Source Selector", "DSPO1", "DSPO1"},
	{"SDOUT1D Source Selector", "DSPO2", "DSPO2"},
	{"SDOUT1D Source Selector", "DSPO3", "DSPO3"},
	{"SDOUT1D Source Selector", "DSPO4", "DSPO4"},
	{"SDOUT1D Source Selector", "DSPO5", "DSPO5"},
	{"SDOUT1D Source Selector", "DSPO6", "DSPO6"},
	{"SDOUT1D Source Selector", "ADC", "ADC"},
	{"SDOUT1D Source Selector", "SRC1O", "SRC1"},
	{"SDOUT1D Source Selector", "SRC2O", "SRC2"},
	{"SDOUT1D Source Selector", "SRC3O", "SRC3"},
	{"SDOUT1D Source Selector", "SRC4O", "SRC4"},

	{"SDOUT2 Source Selector", "SDIN1A", "SDIN1A"},
	{"SDOUT2 Source Selector", "SDIN1B", "SDIN1B"},
	{"SDOUT2 Source Selector", "SDIN1C", "SDIN1C"},
	{"SDOUT2 Source Selector", "SDIN1D", "SDIN1D"},
	{"SDOUT2 Source Selector", "SDIN2", "SDIN2"},
	{"SDOUT2 Source Selector", "SDIN3", "SDIN3"},
	{"SDOUT2 Source Selector", "SDIN4", "SDIN4"},
	{"SDOUT2 Source Selector", "DSPO1", "DSPO1"},
	{"SDOUT2 Source Selector", "DSPO2", "DSPO2"},
	{"SDOUT2 Source Selector", "DSPO3", "DSPO3"},
	{"SDOUT2 Source Selector", "DSPO4", "DSPO4"},
	{"SDOUT2 Source Selector", "DSPO5", "DSPO5"},
	{"SDOUT2 Source Selector", "DSPO6", "DSPO6"},
	{"SDOUT2 Source Selector", "ADC", "ADC"},
	{"SDOUT2 Source Selector", "SRC1O", "SRC1"},
	{"SDOUT2 Source Selector", "SRC2O", "SRC2"},
	{"SDOUT2 Source Selector", "SRC3O", "SRC3"},
	{"SDOUT2 Source Selector", "SRC4O", "SRC4"},

	{"SDOUT3 Source Selector", "SDIN1A", "SDIN1A"},
	{"SDOUT3 Source Selector", "SDIN1B", "SDIN1B"},
	{"SDOUT3 Source Selector", "SDIN1C", "SDIN1C"},
	{"SDOUT3 Source Selector", "SDIN1D", "SDIN1D"},
	{"SDOUT3 Source Selector", "SDIN2", "SDIN2"},
	{"SDOUT3 Source Selector", "SDIN3", "SDIN3"},
	{"SDOUT3 Source Selector", "SDIN4", "SDIN4"},
	{"SDOUT3 Source Selector", "DSPO1", "DSPO1"},
	{"SDOUT3 Source Selector", "DSPO2", "DSPO2"},
	{"SDOUT3 Source Selector", "DSPO3", "DSPO3"},
	{"SDOUT3 Source Selector", "DSPO4", "DSPO4"},
	{"SDOUT3 Source Selector", "DSPO5", "DSPO5"},
	{"SDOUT3 Source Selector", "DSPO6", "DSPO6"},
	{"SDOUT3 Source Selector", "ADC", "ADC"},
	{"SDOUT3 Source Selector", "SRC1O", "SRC1"},
	{"SDOUT3 Source Selector", "SRC2O", "SRC2"},
	{"SDOUT3 Source Selector", "SRC3O", "SRC3"},
	{"SDOUT3 Source Selector", "SRC4O", "SRC4"},

	{"DAC1 Source Selector", "SDIN1A", "SDIN1A"},
	{"DAC1 Source Selector", "SDIN1B", "SDIN1B"},
	{"DAC1 Source Selector", "SDIN1C", "SDIN1C"},
	{"DAC1 Source Selector", "SDIN1D", "SDIN1D"},
	{"DAC1 Source Selector", "SDIN2", "SDIN2"},
	{"DAC1 Source Selector", "SDIN3", "SDIN3"},
	{"DAC1 Source Selector", "DSPO1", "DSPO1"},
	{"DAC1 Source Selector", "DSPO2", "DSPO2"},
	{"DAC1 Source Selector", "DSPO3", "DSPO3"},
	{"DAC1 Source Selector", "DSPO4", "DSPO4"},
	{"DAC1 Source Selector", "DSPO5", "DSPO5"},
	{"DAC1 Source Selector", "DSPO6", "DSPO6"},
	{"DAC1 Source Selector", "ADC", "ADC"},
	{"DAC1 Source Selector", "SRC1O", "SRC1"},
	{"DAC1 Source Selector", "SRC2O", "SRC2"},
	{"DAC1 Source Selector", "SRC3O", "SRC3"},
	{"DAC1 Source Selector", "SRC4O", "SRC4"},

	{"DAC2 Source Selector", "SDIN1A", "SDIN1A"},
	{"DAC2 Source Selector", "SDIN1B", "SDIN1B"},
	{"DAC2 Source Selector", "SDIN1C", "SDIN1C"},
	{"DAC2 Source Selector", "SDIN1D", "SDIN1D"},
	{"DAC2 Source Selector", "SDIN2", "SDIN2"},
	{"DAC2 Source Selector", "SDIN3", "SDIN3"},
	{"DAC2 Source Selector", "SDIN4", "SDIN4"},
	{"DAC2 Source Selector", "DSPO1", "DSPO1"},
	{"DAC2 Source Selector", "DSPO2", "DSPO2"},
	{"DAC2 Source Selector", "DSPO3", "DSPO3"},
	{"DAC2 Source Selector", "DSPO4", "DSPO4"},
	{"DAC2 Source Selector", "DSPO5", "DSPO5"},
	{"DAC2 Source Selector", "DSPO6", "DSPO6"},
	{"DAC2 Source Selector", "ADC", "ADC"},
	{"DAC2 Source Selector", "SRC1O", "SRC1"},
	{"DAC2 Source Selector", "SRC2O", "SRC2"},
	{"DAC2 Source Selector", "SRC3O", "SRC3"},
	{"DAC2 Source Selector", "SRC4O", "SRC4"},

	{"DAC3 Source Selector", "SDIN1A", "SDIN1A"},
	{"DAC3 Source Selector", "SDIN1B", "SDIN1B"},
	{"DAC3 Source Selector", "SDIN1C", "SDIN1C"},
	{"DAC3 Source Selector", "SDIN1D", "SDIN1D"},
	{"DAC3 Source Selector", "SDIN2", "SDIN2"},
	{"DAC3 Source Selector", "SDIN3", "SDIN3"},
	{"DAC3 Source Selector", "SDIN4", "SDIN4"},
	{"DAC3 Source Selector", "DSPO1", "DSPO1"},
	{"DAC3 Source Selector", "DSPO2", "DSPO2"},
	{"DAC3 Source Selector", "DSPO3", "DSPO3"},
	{"DAC3 Source Selector", "DSPO4", "DSPO4"},
	{"DAC3 Source Selector", "DSPO5", "DSPO5"},
	{"DAC3 Source Selector", "DSPO6", "DSPO6"},
	{"DAC3 Source Selector", "ADC", "ADC"},
	{"DAC3 Source Selector", "SRC1O", "SRC1"},
	{"DAC3 Source Selector", "SRC2O", "SRC2"},
	{"DAC3 Source Selector", "SRC3O", "SRC3"},
	{"DAC3 Source Selector", "SRC4O", "SRC4"},

};

static int ak7604_hw_params(struct snd_pcm_substream *substream,
		struct snd_pcm_hw_params *params,
		struct snd_soc_dai *dai)
{
	struct snd_soc_component *component = dai->component;
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int nSDNo;
	int fsno, nmax;
	int DIODLbit, addr, value;

	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	ak7604->fs = params_rate(params);

	akdbgprt("\t[AK7604] %s fs=%d\n", __func__, ak7604->fs);
	mdelay(10);

	DIODLbit = 2;

	switch (params_format(params)) {
	case SNDRV_PCM_FORMAT_S16_LE:
		DIODLbit = 2;
		break;
	case SNDRV_PCM_FORMAT_S24_LE:
		DIODLbit = 0;
		break;
	case SNDRV_PCM_FORMAT_S32_LE:
		DIODLbit = 3;
		break;
	default:
		pr_err("%s: invalid Audio format %u\n", __func__, params_format(params));
		return -EINVAL;
	}

	akdbgprt("\t[AK7604] %s dai->id = %d\n", __func__, dai->id);
	switch (dai->id) {
	case AIF_PORT1:
		nSDNo = 0;
		break;
	case AIF_PORT2:
		nSDNo = 1;
		break;
	case AIF_PORT3:
		nSDNo = 2;
		break;
	case AIF_PORT4:
		nSDNo = 3;
		break;
	default:
		pr_err("%s: Invalid dai id %d\n", __func__, dai->id);
		return -EINVAL;
	}

	fsno = 0;
	nmax = ARRAY_SIZE(sdfstab);
	akdbgprt("\t[AK7604] %s nmax = %d\n", __func__, nmax);

	do {
		if (ak7604->fs <= sdfstab[fsno])
			break;
		fsno++;
	} while (fsno < nmax);
	akdbgprt("\t[AK7604] %s fsno = %d\n", __func__, fsno);

	if (fsno == nmax) {
		pr_err("%s: not support Sampling Frequency : %d\n", __func__, ak7604->fs);
		return -EINVAL;
	}

	akdbgprt("\t[AK7604] %s setSDClock\n", __func__);
	mdelay(10);

	ak7604->SDfs[nSDNo] = fsno;
	setSDClock(component, nSDNo);

	/* set Word length */

	addr = AK7604_2E_SDIN1_FORMAT + nSDNo;
	value = DIODLbit;
	snd_soc_component_update_bits(component, addr, 0x03, value);
	addr = AK7604_32_SDOUT1_FORMAT + nSDNo;
	snd_soc_component_update_bits(component, addr, 0x03, value);

	return 0;
}

static int ak7604_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
		unsigned int freq, int dir)
{
	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	return 0;
}

static int ak7604_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{

	struct snd_soc_component *component = dai->component;
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int format, diolsb, diedge, doedge, dislot, doslot;
	int msnbit;
	int nSDNo, value;
	int addr, mask, shift;

	akdbgprt("\t[AK7604] %s(%d),dai->id = %d\n", __func__, __LINE__, dai->id);

	switch (dai->id) {
	case AIF_PORT1:
		nSDNo = 0;
		break;
	case AIF_PORT2:
		nSDNo = 1;
		break;
	case AIF_PORT3:
		nSDNo = 2;
		break;
	case AIF_PORT4:
		nSDNo = 3;
		break;
	default:
		pr_err("%s: Invalid dai id %d\n", __func__, dai->id);
		return -EINVAL;
	}

	/* set master/slave audio interface */

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBS_CFS:
		msnbit = 0;
		akdbgprt("\t[AK7604] %s(Slave_nSDNo=%d)\n", __func__, nSDNo);
		break;
	case SND_SOC_DAIFMT_CBM_CFM:
		msnbit = 1;
		akdbgprt("\t[AK7604] %s(Master_nSDNo=%d)\n", __func__, nSDNo);
		break;
	case SND_SOC_DAIFMT_CBS_CFM:
	case SND_SOC_DAIFMT_CBM_CFS:
	default:
		dev_err(component->dev, "Clock mode unsupported");
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		format = AK7604_LRIF_I2S_MODE; // 0
		diolsb = 0;
		diedge = ak7604->DIEDGEbit[nSDNo];
		doedge = ak7604->DOEDGEbit[nSDNo];
		dislot = 3;
		doslot = 3;
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		format = AK7604_LRIF_MSB_MODE; // 5
		diolsb = 0;
		diedge = ak7604->DIEDGEbit[nSDNo];
		doedge = ak7604->DOEDGEbit[nSDNo];
		dislot = 3;
		doslot = 3;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		format = AK7604_LRIF_LSB_MODE; // 5
		diolsb = 1;
		diedge = ak7604->DIEDGEbit[nSDNo];
		doedge = ak7604->DOEDGEbit[nSDNo];
		dislot = 3;
		doslot = 3;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		format = AK7604_LRIF_PCM_SHORT_MODE; // 6
		diolsb = 0;
		diedge = 1;
		doedge = 1;
		dislot = ak7604->DISLbit[nSDNo];
		doslot = ak7604->DOSLbit[nSDNo];
		break;
	case SND_SOC_DAIFMT_DSP_B:
		format = AK7604_LRIF_PCM_LONG_MODE; // 7
		diolsb = 0;
		diedge = 1;
		doedge = 1;
		dislot = ak7604->DISLbit[nSDNo];
		doslot = ak7604->DOSLbit[nSDNo];
		break;
	default:
		return -EINVAL;
	}

	/* set format */
	akdbgprt("\t[AK7604] %s(Master_nSDNo=%d,msnbit = =%d)\n", __func__, nSDNo, msnbit);
	//setSDMaster(component, nSDNo, msnbit);

	addr = AK7604_2C_CLOCKFORMAT1 + (nSDNo/2);
	akdbgprt("\t[AK7604] %s(addr =0x%x)\n", __func__, addr);
	shift = 4 * ((nSDNo+1) % 2);
	value = (format << shift);
	mask = 0xF << shift;
	akdbgprt("\t[AK7604] %s(value = =0x%x,mask =0x%x)\n", __func__, value, mask);
	snd_soc_component_update_bits(component, addr, mask, value);

	/* set SDIO format */
	/* set Slot length */

	addr = AK7604_2E_SDIN1_FORMAT + nSDNo;
	value = (diedge <<  7) + (diolsb <<  3) + (dislot <<  4);
	snd_soc_component_update_bits(component, addr, 0xB8, value);

	addr = AK7604_32_SDOUT1_FORMAT + nSDNo;
	value = (doedge <<  7) + (diolsb <<  3) + (doslot <<  4);
	snd_soc_component_update_bits(component, addr, 0xB8, value);

	return 0;
}

static bool ak7604_volatile(struct device *dev, unsigned int reg)
{
	bool	ret;

#ifdef AK7604_DEBUG
	if (reg < AK7604_VIRT_REGISTER)
		ret = true;
	else
		ret = false;
#else
	if (reg < AK7604_C0_DEVICE_ID)
		ret = false;
	else if (reg < AK7604_VIRT_REGISTER)
		ret = true;
	else
		ret = false;
#endif
	return(ret);
}

static bool ak7604_readable(struct device *dev, unsigned int reg)
{

	bool ret;

	if (reg == AK7604_03_RESERVED)
		ret = false;
	else if (reg <= AK7604_34_SDOUT3_FORMAT)
		ret = true;
	else if (reg < AK7604_50_INPUT_DATA)
		ret = false;
	else if (reg <= AK7604_53_STO_SETTING)
		ret = true;
	else if (reg < AK7604_60_DSP_SETTING1)
		ret = false;
	else if (reg <= AK7604_61_DSP_SETTING2)
		ret = true;
	else if (reg < AK7604_71_SRCMUTE_SETTING)
		ret = false;
	else if (reg <= AK7604_73_SRCFILTER_SETTING)
		ret = true;
	else if (reg < AK7604_81_MIC_SETTING)
		ret = false;
	else if (reg <= AK7604_8E_ADC_MUTEHPF)
		ret = true;
	else if (reg < AK7604_A1_POWERMANAGEMENT1)
		ret = false;
	else if (reg <= AK7604_A3_RESETCONTROL)
		ret = true;
	else if (reg < AK7604_C0_DEVICE_ID)
		ret = false;
	else if (reg <= AK7604_VIRT_CC_DSPOUT6_MIX)
		ret = true;
	else
		ret = true;

	return ret;
}

static bool ak7604_writeable(struct device *dev, unsigned int reg)
{
	bool ret;

	if (reg == AK7604_03_RESERVED)
		ret = false;
	else if (reg <= AK7604_34_SDOUT3_FORMAT)
		ret = true;
	else if (reg < AK7604_50_INPUT_DATA)
		ret = false;
	else if (reg <= AK7604_53_STO_SETTING)
		ret = true;
	else if (reg < AK7604_60_DSP_SETTING1)
		ret = false;
	else if (reg <= AK7604_61_DSP_SETTING2)
		ret = true;
	else if (reg < AK7604_71_SRCMUTE_SETTING)
		ret = false;
	else if (reg <= AK7604_73_SRCFILTER_SETTING)
		ret = true;
	else if (reg < AK7604_81_MIC_SETTING)
		ret = false;
	else if (reg <= AK7604_8E_ADC_MUTEHPF)
		ret = true;
	else if (reg < AK7604_A1_POWERMANAGEMENT1)
		ret = false;
	else if (reg <= AK7604_A3_RESETCONTROL)
		ret = true;
	else if (reg < AK7604_VIRT_C7_DSPOUT1_MIX)
		ret = false;
	else if (reg <= AK7604_VIRT_CC_DSPOUT6_MIX)
		ret = true;
	else
		ret = false;

	return ret;
}

static unsigned int ak7604_i2c_read(
struct i2c_client *client,
u8 *reg,
int reglen,
u8 *data,
int datalen)
{
	struct i2c_msg xfer[2];
	int ret;

	/* Write register */
	xfer[0].addr = client->addr;
	xfer[0].flags = 0;
	xfer[0].len = reglen;
	xfer[0].buf = reg;

	/* Read data */
	xfer[1].addr = client->addr;
	xfer[1].flags = I2C_M_RD;
	xfer[1].len = datalen;
	xfer[1].buf = data;

	ret = i2c_transfer(client->adapter, xfer, 2);

	if (ret == 2)
		return 0;
	else if (ret < 0)
		return -ret;
	else
		return -EIO;
}

static unsigned int ak7604_read_register(struct snd_soc_component *component, unsigned int reg)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	unsigned char tx[3], rx[1];
	int	wlen, rlen;
	int val, ret;
	unsigned int rdata;

	if (reg == SND_SOC_NOPM)
		return 0;

	BUG_ON(reg > AK7604_MAX_REGISTER);

	if (!ak7604_readable(NULL, reg))
		return 0xFF;

	if (!ak7604_volatile(NULL, reg) && ak7604_readable(NULL, reg)) {
		ret = regmap_read(ak7604->regmap, reg, &val);
		if (ret >= 0) {
			return val;
		} else if (ret < 0) {
			dev_err(component->dev, "Cache read from %x failed: %d\n", reg, ret);
			return 0;
		}
	}

	wlen = 3;
	rlen = 1;
	tx[0] = (unsigned char)(COMMAND_READ_REG & 0x7F);
	tx[1] = (unsigned char)(0xFF & (reg >> 8));
	tx[2] = (unsigned char)(0xFF & reg);

	if (ak7604->control_type == SND_SOC_SPI)
		ret = spi_write_then_read(ak7604->spi, tx, wlen, rx, rlen);
	else
		ret = ak7604_i2c_read(ak7604->i2c, tx, wlen, rx, rlen);

	if (ret < 0) {
		akdbgprt("\t[AK7604] %s error ret = %d\n", __func__, ret);
		rdata = -EIO;
	} else {
		rdata = (unsigned int)rx[0];
	}

	return rdata;
}

static int ak7604_reads(struct snd_soc_component *component, u8 *tx, size_t wlen, u8 *rx, size_t rlen)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int ret;

	akdbgprt("*****[AK7604] %s tx[0]=%x, %d, %d\n", __func__, tx[0], (int)wlen, (int)rlen);
	if (ak7604->control_type == SND_SOC_SPI)
		ret = spi_write_then_read(ak7604->spi, tx, wlen, rx, rlen);
	else
		ret = ak7604_i2c_read(ak7604->i2c, tx, wlen, rx, rlen);

	return ret;

}

static int ak7604_write_register(struct snd_soc_component *component,
	unsigned int reg, unsigned int value)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	unsigned char tx[4];
	int wlen;
	int ret;

	//akdbgprt("[AK7604] %s (%x, %x)\n", __func__, reg, value);

	if (reg == SND_SOC_NOPM)
		return 0;

	if (!ak7604_volatile(NULL, reg)) {
		ret = regmap_write(ak7604->regmap, reg, value);
		if (ret != 0)
			dev_err(component->dev, "Cache write to %x failed: %d\n", reg, ret);
	}

	if (reg >= AK7604_VIRT_REGISTER)
		return 0;

	wlen = 4;
	tx[0] = (unsigned char)COMMAND_WRITE_REG;
	tx[1] = (unsigned char)(0xFF & (reg >> 8));
	tx[2] = (unsigned char)(0xFF & reg);
	tx[3] = value;

	if (ak7604->control_type == SND_SOC_SPI)
		ret = spi_write(ak7604->spi, tx, wlen);
	else
		ret = i2c_master_send(ak7604->i2c, tx, wlen);

	return ret;
}

static int ak7604_write_spidmy(struct snd_soc_component *component)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	unsigned char tx[4];
	int wlen;
	int rd;

	akdbgprt("[AK7604] %s\n", __func__);

	rd = 0;

	wlen = 4;
	tx[0] = (unsigned char)(0xDE);
	tx[1] = (unsigned char)(0xAD);
	tx[2] = (unsigned char)(0xDA);
	tx[3] = (unsigned char)(0x7A);

	if (ak7604->control_type == SND_SOC_SPI)
		rd = spi_write(ak7604->spi, tx, wlen);
	return rd;
}

static int ak7604_writes(struct snd_soc_component *component, const u8 *tx, size_t wlen)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int rc;

	akdbgprt("[AK7604W] %s tx[0]=%x tx[1]=%x, len=%d\n",
		__func__, (int)tx[0], (int)tx[1], (int)wlen);

	if (ak7604->control_type == SND_SOC_SPI)
		rc = spi_write(ak7604->spi, tx, wlen);
	else
		rc = i2c_master_send(ak7604->i2c, tx, wlen);

	return rc;
}

static int crc_read(struct snd_soc_component *component)
{
	int rc;

	u8	tx[3], rx[2];

	tx[0] = COMMAND_CRC_READ;
	tx[1] = 0;
	tx[2] = 0;

	rc =  ak7604_reads(component, tx, 3, rx, 2);

	return (rc < 0) ? rc : ((rx[0] << 8) + rx[1]);
}

static int ak7604_set_status(struct snd_soc_component *component, enum ak7604_status status)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	akdbgprt("\t[AK7604] %s status=%d\n", __func__, status);
	switch (status) {
	case RUN:
		// CKRESETN bit = 1
		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x80, 0x80);
		mdelay(10);
		// CRESETN bit = D1RESETN = HRESETN = 1;
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x07, 0x07);
		break;
	case DOWNLOAD:
		ak7604->dresetn = snd_soc_component_read(component, AK7604_A3_RESETCONTROL);
		ak7604->dresetn &= 0x4;
		if (ak7604->dresetn)
			// D1RESETN = 0;
			snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x04, 0x0);
		mdelay(1);
		// DLRDY bit = 1
		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x01, 0x01);
		break;
	case DOWNLOAD_FINISH:
		// DLRDY bit = 0
		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x01, 0x0);
		mdelay(1);
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x04, ak7604->dresetn);
		break;
	case STANDBY:
		// CRESETN bit = D1RESETN = HRESETN = 0;
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x07, 0x0);
		// CKRESETN bit = 1
		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x80, 0x80);
		break;
	case SUSPEND:
	case POWERDOWN:
		// CRESETN bit = D1RESETN = HRESETN = 0;
		snd_soc_component_update_bits(component, AK7604_A3_RESETCONTROL, 0x07, 0x0);
		// CKRESETN bit = 0
		snd_soc_component_update_bits(component, AK7604_02_SYSTEMCLOCK_3, 0x80, 0x0);
		break;
	default:
		return -EINVAL;
	}

	ak7604->status = status;

	return 0;
}

static int ak7604_ram_download(struct snd_soc_component *component, const u8 *tx_ram, u64 num, u16 crc)
{
	int rc;
	int nDSPRun;
	u16	read_crc;

	akdbgprt("\t[AK7604] %s num=%ld\n", __func__, (long)num);

	nDSPRun = snd_soc_component_read(component, AK7604_A3_RESETCONTROL);

	ak7604_set_status(component, DOWNLOAD);

	rc = ak7604_writes(component, tx_ram, num);
	if (rc < 0) {
		snd_soc_component_write(component, AK7604_A3_RESETCONTROL, nDSPRun);
		return rc;
	}

	if ((crc != 0) && (rc >= 0))  {
		read_crc = crc_read(component);
		akdbgprt("\t[AK7604] %s CRC Cal=%x Read=%x\n", __func__, (int)crc, (int)read_crc);

		if (read_crc == crc)
			rc = 0;
		else
			rc = 1;
	}

	ak7604_set_status(component, DOWNLOAD_FINISH);
	snd_soc_component_write(component, AK7604_A3_RESETCONTROL, nDSPRun);

	return rc;

}

static int calc_CRC(int length, u8 *data)
{

#define CRC16_CCITT (0x1021)

	unsigned short crc = 0x0000;
	int i, j;

	for (i = 0; i < length; i++) {
		crc ^= *data++ << 8;
		for (j = 0; j < 8; j++) {
			if (crc & 0x8000) {
				crc <<= 1;
				crc ^= CRC16_CCITT;
			} else {
				crc <<= 1;
			}
		}
	}

	akdbgprt("[AK7604] %s CRC=%x\n", __func__, crc);

	return crc;
}

static int ak7604_write_ram(
struct snd_soc_component *component,
int	nPCRam,	// 0 : PRAM, 1 : CRAM
u8 *upRam,
int	nWSize)
{
	int n, ret;
	int	wCRC;
	int nMaxSize;

	akdbgprt("[AK7604] %s RamNo=%d, len=%d\n", __func__, nPCRam, nWSize);

	switch (nPCRam) {
	case RAMTYPE_PRAM:
		nMaxSize = TOTAL_NUM_OF_PRAM_MAX;
		if (nWSize > nMaxSize) {
			akdbgprt("%s: PRAM Write size is over!\n", __func__);
			return(-1);
		}
		break;
	case RAMTYPE_CRAM:
		nMaxSize = TOTAL_NUM_OF_CRAM_MAX;
		if (nWSize > nMaxSize) {
			akdbgprt("%s: CRAM Write size is over!\n", __func__);
			return(-1);
		}
		break;
	default:
		return(-1);
	}

	wCRC = calc_CRC(nWSize, upRam);

	n = MAX_LOOP_TIMES;
	do {
		ret = ak7604_ram_download(component, upRam, nWSize, wCRC);
		if (ret >= 0)
			break;
		n--;
	} while (n > 0);

	if (ret < 0) {
		akdbgprt("%s: RAM Write Error! RAM No = %d\n", __func__, nPCRam);
		return(-1);
	}

	return 0;

}

static int ak7604_firmware_write_ram(struct snd_soc_component *component, u16 mode, u16 cmd)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int ret = 0;
	int nNumMode, nMaxLen;
	int nRamSize;
	u8  *ram_basic;
	const struct firmware *fw;
	u8  *fwdn;
	char szFileName[32];

	akdbgprt("[AK7604] %s mode=%d, cmd=%d\n", __func__, mode, cmd);

	switch (mode) {
	case RAMTYPE_PRAM:
		nNumMode = ARRAY_SIZE(ak7604_firmware_pram);
		break;
	case RAMTYPE_CRAM:
		nNumMode = ARRAY_SIZE(ak7604_firmware_cram);
		break;
	default:
		akdbgprt("[AK7604] %s mode Error=%d\n", __func__, mode);
		return(-EINVAL);
	}

	if (cmd == 0)
		return 0;

	if (cmd >= nNumMode) {
		pr_err("%s: invalid command %d\n", __func__, cmd);
		return(-EINVAL);
	}

	if (cmd == 1) {
		switch (mode) {
		case RAMTYPE_PRAM:
			ram_basic = ak7604_pram_basic;
			nRamSize = sizeof(ak7604_pram_basic);
			break;
		case RAMTYPE_CRAM:
			ram_basic = ak7604_cram_basic;
			nRamSize = sizeof(ak7604_cram_basic);
			break;
		default:
			return(-EINVAL);
		}
		ret = ak7604_write_ram(component, (int)mode, ram_basic, nRamSize);
	} else {
		switch (mode) {
		case RAMTYPE_PRAM:
			sprintf(szFileName, "ak7604_pram_%s.bin", ak7604_firmware_pram[cmd]);
			nMaxLen = TOTAL_NUM_OF_PRAM_MAX;
			break;
		case RAMTYPE_CRAM:
			sprintf(szFileName, "ak7604_cram_%s.bin", ak7604_firmware_cram[cmd]);
			nMaxLen = TOTAL_NUM_OF_CRAM_MAX;
			break;
		default:
			return(-EINVAL);
		}

		if (ak7604->control_type == SND_SOC_SPI)
			ret = request_firmware(&fw, szFileName, &(ak7604->spi->dev));
		else
			ret = request_firmware(&fw, szFileName, &(ak7604->i2c->dev));

		if (ret) {
			akdbgprt("[AK7604] %s could not load firmware=%d\n", szFileName, ret);
			return -EINVAL;
		}

		akdbgprt("[AK7604] %s name=%s size=%d\n", __func__, szFileName, (int)fw->size);
		if (fw->size > nMaxLen) {
			akdbgprt("[AK7604] %s RAM Size Error : %d\n", __func__, (int)fw->size);
			release_firmware(fw);
			return -ENOMEM;
		}

		fwdn = kmalloc((unsigned long)fw->size, GFP_KERNEL);
		if (fwdn == NULL) {
			akdbgprt(KERN_ERR "failed to buffer vmalloc: %d\n", (int)fw->size);
			release_firmware(fw);
			return -ENOMEM;
		}

		memcpy((void *)fwdn, fw->data, fw->size);

		ret = ak7604_write_ram(component, (int)mode, (u8 *)fwdn, (fw->size));

		kfree(fwdn);
		release_firmware(fw);
	}

	return ret;
}

static int ak7604_write_cram(
struct snd_soc_component *component,
int addr,
int len,
unsigned char *cram_data)
{
	int i, n, ret;
	int nDSPRun;
	unsigned char tx[51];

	akdbgprt("[AK7604] %s addr=%d, len=%d\n", __func__, addr, len);

	if (len > 48) {
		akdbgprt("[AK7604] %s Length over!\n", __func__);
		return(-1);
	}

	nDSPRun = snd_soc_component_read(component, AK7604_A3_RESETCONTROL);

	if (nDSPRun & 0x04) {
		tx[0] = COMMAND_WRITE_CRAM_RUN + (unsigned char)((len / 3) - 1);
		tx[1] = (unsigned char)(0xFF & (addr >> 8));
		tx[2] = (unsigned char)(0xFF & addr);
	} else {
		ak7604_set_status(component, DOWNLOAD);
		tx[0] = COMMAND_WRITE_CRAM;
		tx[1] = (unsigned char)(0xFF & (addr >> 8));
		tx[2] = (unsigned char)(0xFF & addr);
	}

	n = 3;
	for (i = 0; i < len; i++)
		tx[n++] = cram_data[i];

	ret = ak7604_writes(component, tx, n);

	if (nDSPRun & 0x04) {
		tx[0] = COMMAND_WRITE_CRAM_EXEC;
		tx[1] = 0;
		tx[2] = 0;
		ret = ak7604_writes(component, tx, 3);
	} else {
		ak7604_set_status(component, DOWNLOAD_FINISH);
		snd_soc_component_write(component, AK7604_A3_RESETCONTROL, nDSPRun);
	}

	mdelay(1);

	return ret;

}

#ifdef AK7604_IO_CONTROL
static unsigned long ak7604_readMIR(
struct snd_soc_component *component,
int nMIRNo,
unsigned long *dwMIRData)
{
	unsigned char tx[3];
	unsigned char rx[32];
	int n, nRLen;

	if (nMIRNo >= 8)
		return(-1);

	tx[0] = (unsigned char)COMMAND_MIR_READ;
	tx[1] = 0;
	tx[2] = 0;
	nRLen = 4 * (nMIRNo + 1);

	ak7604_reads(component, tx, 3, rx, nRLen);

	n = 4 * nMIRNo;
	*dwMIRData = ((0xFF & (unsigned long)rx[n++]) << 20);
	*dwMIRData += ((0xFF & (unsigned long)rx[n++]) << 12);
	*dwMIRData += ((0xFF & (unsigned long)rx[n++]) << 4);
	*dwMIRData += ((0xFF & (unsigned long)rx[n++]) >> 4);

	return 0;

}

static int ak7604_reg_cmd(struct snd_soc_component *component, REG_CMD *reg_param, int len)
{
	int i;
	int rc;
	int  addr, value;

	akdbgprt("*****[AK7604] %s len = %d\n", __func__, len);

	rc = 0;
	for (i = 0; i < len; i++) {
		addr = (int)(reg_param[i].addr);
		value = (int)(reg_param[i].data);

		if (addr != 0xFF) {
			rc = snd_soc_component_write(component, addr, value);
			if (rc < 0)
				break;
		} else {
			mdelay(value);
		}
	}

	if (rc != 0)
		rc = 0;

	return rc;

}

static long ak7604_ioctl(struct file *file, unsigned int cmd, unsigned long args)
{
	struct ak7604_priv *ak7604 = (struct ak7604_priv *)file->private_data;
	struct ak7604_wreg_handle ak7604_wreg;
	struct ak7604_wcram_handle  ak7604_wcram;
	void __user *data = (void __user *)args;
	int *val = (int *)args;
	int i;
	unsigned long dwMIRData;
	int ret = 0;
	REG_CMD      regcmd[MAX_WREG];
	unsigned char cram_data[MAX_WCRAM];

	akdbgprt("*****[AK7604] %s cmd, val=%x, %x\n", __func__, cmd, val[0]);

	switch (cmd) {
	case AK7604_IOCTL_WRITECRAM:
		if (copy_from_user(&ak7604_wcram, data, sizeof(struct ak7604_wcram_handle)))
			return -EFAULT;
		if ((ak7604_wcram.len % 3) != 0) {
			akdbgprt(KERN_ERR "[AK7604] %s CRAM len error\n", __func__);
			return -EFAULT;
		}
		if ((ak7604_wcram.len < 3) || (ak7604_wcram.len > MAX_WCRAM)) {
			akdbgprt(KERN_ERR "[AK7604] %s CRAM len error2\n", __func__);
			return -EFAULT;
		}
		for (i = 0; i < ak7604_wcram.len; i++)
			cram_data[i] = ak7604_wcram.cram[i];
		ret = ak7604_write_cram(ak7604->component, ak7604_wcram.addr,
					ak7604_wcram.len, cram_data);
		break;
	case AK7604_IOCTL_WRITEREG:
		if (copy_from_user(&ak7604_wreg, data, sizeof(struct ak7604_wreg_handle)))
			return -EFAULT;
		if ((ak7604_wreg.len < 1) || (ak7604_wreg.len > MAX_WREG)) {
			akdbgprt(KERN_ERR "MAXREG ERROR %d\n", ak7604_wreg.len);
			return -EFAULT;
		}
		for (i = 0; i < ak7604_wreg.len; i++) {
			regcmd[i].addr = ak7604_wreg.regcmd[i].addr;
			regcmd[i].data = ak7604_wreg.regcmd[i].data;
		}
		ak7604_reg_cmd(ak7604->component, regcmd, ak7604_wreg.len);
		break;
	case AK7604_IOCTL_SETSTATUS:
		ret = ak7604_set_status(ak7604->component, val[0]);
		if (ret < 0) {
			akdbgprt(KERN_ERR "ak7604: set_status error:\n");
			return ret;
		}
		break;
	case AK7604_IOCTL_SETMIR:
		ak7604->MIRNo = val[0];
		if (ret < 0) {
			akdbgprt(KERN_ERR "ak7604: set MIR error\n");
			return -EFAULT;
		}
		break;
	case AK7604_IOCTL_GETMIR:
		ak7604_readMIR(ak7604->component, (0xF & (ak7604->MIRNo)), &dwMIRData);
		ret = copy_to_user(data, (const void *)&dwMIRData, (unsigned long)4);
		if (ret < 0) {
			akdbgprt(KERN_ERR "ak7604: get status error\n");
			return -EFAULT;
		}
		break;
	default:
		akdbgprt(KERN_ERR "Unknown command required: %d\n", cmd);
		return -EINVAL;
	}

	return ret;
}

static int init_ak7604_pd(struct ak7604_priv *data)
{
	struct _ak7604_pd_handler *ak7604 = &ak7604_pd_handler;

	if (data == NULL)
		return -EFAULT;

	mutex_init(&ak7604->lock);

	mutex_lock(&ak7604->lock);
	ak7604->data = data;
	mutex_unlock(&ak7604->lock);

	return 0;
}

static struct ak7604_priv *get_ak7604_pd(void)
{
	struct _ak7604_pd_handler *ak7604 = &ak7604_pd_handler;

	if (ak7604->data == NULL)
		return NULL;

	mutex_lock(&ak7604->lock);
	ak7604->ref_count++;
	mutex_unlock(&ak7604->lock);

	return ak7604->data;
}

static int rel_ak7604_pd(struct ak7604_priv *data)
{
	struct _ak7604_pd_handler *ak7604 = &ak7604_pd_handler;

	if (ak7604->data == NULL)
		return -EFAULT;

	mutex_lock(&ak7604->lock);
	ak7604->ref_count--;
	mutex_unlock(&ak7604->lock);

	data = NULL;

	return 0;
}

/* AK7604 Misc driver interfaces */
static int ak7604_open(struct inode *inode, struct file *file)
{
	struct ak7604_priv *ak7604;

	ak7604 = get_ak7604_pd();
	file->private_data = ak7604;

	return 0;
}

static int ak7604_close(struct inode *inode, struct file *file)
{
	struct ak7604_priv *ak7604 = (struct ak7604_priv *)file->private_data;

	rel_ak7604_pd(ak7604);

	return 0;
}

static const struct file_operations ak7604_fops = {
	.owner = THIS_MODULE,
	.open = ak7604_open,
	.release = ak7604_close,
	.unlocked_ioctl = ak7604_ioctl,
};

static struct miscdevice ak7604_misc = {
	.minor = MISC_DYNAMIC_MINOR,
	.name = "ak7604-dsp",
	.fops = &ak7604_fops,
};

#endif

static int ak7604_set_bias_level(struct snd_soc_component *component,
		enum snd_soc_bias_level level)
{
#ifndef KERNEL_3_18_XX
	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
#endif

	akdbgprt("\t[AK7604] %s(%d),level = %d\n", __func__, __LINE__, level);

	switch (level) {
	case SND_SOC_BIAS_ON:
	case SND_SOC_BIAS_PREPARE:
	case SND_SOC_BIAS_STANDBY:
		break;
	case SND_SOC_BIAS_OFF:
		//ak7604_set_status(component, POWERDOWN);
		break;
	}
#ifdef KERNEL_3_18_XX
	//component->dapm.bias_level = level;
#else
	dapm->bias_level = level;
#endif

	return 0;
}

//static int ak7604_set_dai_mute(struct snd_soc_dai *dai, int mute)
//{
//	akdbgprt("\t[AK7604] %s Mute=[%s], play=%d cap=%d\n",
//		__func__, mute ? "ON" : "OFF", dai->playback_active, dai->capture_active);

//	return 0;
//}

#define AK7604_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
				SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
				SNDRV_PCM_RATE_96000)

#define AK7604_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |\
						SNDRV_PCM_FMTBIT_S32_LE)

static struct snd_soc_dai_ops ak7604_dai_ops = {
	.hw_params	= ak7604_hw_params,
	.set_sysclk	= ak7604_set_dai_sysclk,
	.set_fmt	= ak7604_set_dai_fmt,
//	.digital_mute = ak7604_set_dai_mute,
};

#if 1
struct snd_soc_dai_driver ak7604_dai[] = {
#ifndef ARK_CARPLAY_MODE
	//plan:1
	//ark(i2s1)->ak7604(i2s2)
	//fm1505->ak7604(i2s1)
	{
		.name = "ak7604-aif1",
		.id = AIF_PORT2,
		.playback = {
		       .stream_name = "AIF1 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.capture = {
		       .stream_name = "AIF1 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
	{
		.name = "ak7604-aif2",
		.id = AIF_PORT1,//AIF_PORT1,
//		.playback = {
//		       .stream_name = "AIF1 Playback",
//		       .channels_min = 1,
//		       .channels_max = 2,
//		       .rates = AK7604_RATES,
//		       .formats = AK7604_FORMATS,
//		},
		.capture = {
		       .stream_name = "AIF1 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
	{
		.name = "ak7604-aif3",
		.id = AIF_PORT1,//AIF_PORT1,
		.playback = {
		       .stream_name = "AIF1 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
//		.capture = {
//		       .stream_name = "AIF1 Capture",
//		       .channels_min = 1,
//		       .channels_max = 2,
//		       .rates = AK7604_RATES,
//		       .formats = AK7604_FORMATS,
//		},
		.ops = &ak7604_dai_ops,
	},
#else
	//plan:2
	//ark(i2s1)->ak7604(i2s1)
	//fm1505->ak7604(i2s2)
	{
		.name = "ak7604-aif1",
		.id = AIF_PORT1,
		.playback = {
		       .stream_name = "AIF1 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.capture = {
		       .stream_name = "AIF1 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
	{
		.name = "ak7604-aif2",
		.id = AIF_PORT2,
//		.playback = {
//		       .stream_name = "AIF1 Playback",
//		       .channels_min = 1,
//		       .channels_max = 2,
//		       .rates = AK7604_RATES,
//		       .formats = AK7604_FORMATS,
//		},
		.capture = {
		       .stream_name = "AIF2 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
	{
		.name = "ak7604-aif3",
		.id = AIF_PORT2,
		.playback = {
		       .stream_name = "AIF3 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
//		.capture = {
//		       .stream_name = "AIF1 Capture",
//		       .channels_min = 1,
//		       .channels_max = 2,
//		       .rates = AK7604_RATES,
//		       .formats = AK7604_FORMATS,
//		},
		.ops = &ak7604_dai_ops,
	},
#endif
};
#else
struct snd_soc_dai_driver ak7604_dai[] = {
	{
		.name = "ak7604-aif1",
		.id = AIF_PORT1,
		.playback = {
		       .stream_name = "AIF1 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.capture = {
		       .stream_name = "AIF1 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
	{
		.name = "ak7604-aif2",
		.id = AIF_PORT2,
		.playback = {
		       .stream_name = "AIF2 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.capture = {
		       .stream_name = "AIF2 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
	{
		.name = "ak7604-aif3",
		.id = AIF_PORT3,
		.playback = {
		       .stream_name = "AIF3 Playback",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.capture = {
		       .stream_name = "AIF3 Capture",
		       .channels_min = 1,
		       .channels_max = 2,
		       .rates = AK7604_RATES,
		       .formats = AK7604_FORMATS,
		},
		.ops = &ak7604_dai_ops,
	},
};
#endif

static int ak7604_init_reg(struct snd_soc_component *component)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int i, devid;

	if (ak7604->pdn_gpio > 0) {
		gpio_set_value(ak7604->pdn_gpio, 0);
		mdelay(1);
		gpio_set_value(ak7604->pdn_gpio, 1);
		mdelay(1);
	}

	if (ak7604->control_type == SND_SOC_SPI)
		ak7604_write_spidmy(component);

	devid = snd_soc_component_read(component, AK7604_C0_DEVICE_ID);
	akdbgprt("[AK7604] %s  Device ID = 0x%X\n", __func__, devid);
	if (devid != 0x04) {
		akdbgprt("********* This is not AK7604! *********\n");
		akdbgprt("********* This is not AK7604! *********\n");
		akdbgprt("********* This is not AK7604! *********\n");
	}

	ak7604->fs = 48000;
	ak7604->PLLInput = 0;
	ak7604->XtiFs    = 0;
	ak7604->dresetn  = 0;

	setPLLOut(component);

	for (i = 0; i < (NUM_SYNCDOMAIN - 1); i++)
		ak7604->Master[i] = 0;
	ak7604->Master[3] = 1;//SYNC4 fixed master.

	for (i = 0; i < NUM_SYNCDOMAIN; i++) {
		ak7604->SDBick[i]  = 0; //64fs
		ak7604->SDfs[i] = 5;  // 48kHz
		ak7604->SDCks[i] = 0;  // Low

		setSDClock(component, i);
	}

	for (i = 0; i < NUM_SYNCDOMAIN; i++) {
		ak7604->TDMSDINbit[i] = 0;
		ak7604->TDMSDOUTbit[i] = 0;
		ak7604->DIEDGEbit[i] = 0;
		ak7604->DOEDGEbit[i] = 0;
		ak7604->DISLbit[i] = 0;
		ak7604->DOSLbit[i] = 0;
	}

	// DSP BANK Setting for Audio Effect
//	snd_soc_component_write(component, AK7604_60_DSP_SETTING1, 0x02); // DRMBK -> 2048/4096, DRMA -> Ring/Ring

//	snd_soc_component_write(component, AK7604_0F_SYNCDOMAIN_SEL1, 0x12);//SyncN -> LR/BICKN(if Master)
//	snd_soc_component_write(component, AK7604_10_SYNCDOMAIN_SEL2, 0x30);//SyncN -> LR/BICKN(if Master)

//	snd_soc_component_write(component, AK7604_0D_SDIN1_2_SYNC, 0x12); //SDIN1(LR/BICK1), SDIN2(LR/BICK2)
//	snd_soc_component_write(component, AK7604_0E_SDIN3_4_SYNC, 0x31); //SDIN3(LR/BICK3), SDIN4(LR/BICK1)

//	snd_soc_component_write(component, AK7604_81_MIC_SETTING, 0x3); // MIC Gain Zero Cross Enable

	return 0;
}

static int ark_ak7604_init(struct snd_soc_component *component)
{
	//struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	//unsigned int val;
	int i, ret;
	int tabnum;

	akdbgprt("[AK7604] %s  ----->start<-----\n", __func__);
#if 0
	for (i = 0; i < ARRAY_SIZE(ak7604_reg); i++) {
		if (ak7604_writeable(NULL, ak7604_reg[i].reg)) {
			ret = regmap_read(ak7604->regmap,
						ak7604_reg[i].reg, &val);
			if (ret >= 0)
				snd_soc_component_write(component, ak7604_reg[i].reg, val);
		}
	}

//	akdbgprt("[AK7604] %s  ----->read<-----\n", __func__);
//	for (i = 0; i < ARRAY_SIZE(ak7604_reg); i++) {
//		if (ak7604_writeable(NULL, ak7604_reg[i].reg)) {akdbgprt("[AK7604] %s  ----->read start<-----\n", __func__);
//			ret = regmap_read(ak7604->regmap,
//						ak7604_reg[i].reg, &val);
//			if (ret >= 0)
//				printk("%s(),ak7604 read error val=0x%x def=0x%x reg=0x%x\n", __FUNCTION__, val, ak7604_reg[i].def, ak7604_reg[i].reg);
//		}
//	}
#else
	tabnum = ARRAY_SIZE(ak7604_reg);
	for (i = 0 ; i < tabnum ; ++i) {
		if (ak7604_reg[i].reg != AK7604_C0_DEVICE_ID)
		{
			if (ak7604_writeable(NULL, ak7604_reg[i].reg)) {
				ret = ak7604_write_register(component, ak7604_reg[i].reg, ak7604_reg[i].def);
			}
		}
		if (ret < 0)
			printk("%s(),ak7604 write error reg=0x%x reg=%d\n", __func__, ak7604_reg[i].reg, ret);
	}

//	for(i=0 ; i<tabnum ; ++i){
//		if(ak7604_reg[i].reg != AK7604_C0_DEVICE_ID)
//		{
//			if (ak7604_volatile(NULL, ak7604_reg[i].reg) && ak7604_readable(NULL, ak7604_reg[i].reg)) {
//				val = ak7604_read_register(component, ak7604_reg[i].reg);
//				if(val != ak7604_reg[i].def)
//					printk("%s(),ak7604 read error val=0x%x def=0x%x reg=0x%x\n", __FUNCTION__, val, ak7604_reg[i].def, ak7604_reg[i].reg);
//				else
//					printk("ak7604 read reg=0x%x, def=0x%x\n", ak7604_reg[i].reg, ak7604_reg[i].def);
//			}
//		}
//	}
#endif
	//akdbgprt("[AK7604] %s  ----->end<-----\n", __func__);
	return 0;
}

static int ak7604_parse_dt(struct ak7604_priv *ak7604)
{
	struct device *dev;
	struct device_node *np;

	if (ak7604->control_type == SND_SOC_SPI)
		dev = &(ak7604->spi->dev);
	else
		dev = &(ak7604->i2c->dev);

	np = dev->of_node;

	if (!np) {
		akdbgprt("\t[AK7604] %s np error!\n", __func__);
		return 0;
	}

	ak7604->pdn_gpio = of_get_named_gpio(np, "ak7604,pdn-gpio", 0);
	akdbgprt("\t[AK7604] %s pdn-gpio=%d\n", __func__, ak7604->pdn_gpio);
	if (ak7604->pdn_gpio < 0) {
		ak7604->pdn_gpio = -1;
		return 0;
	}

	if (!gpio_is_valid(ak7604->pdn_gpio)) {
		akdbgprt(KERN_ERR "ak7604 pdn pin(%u) is invalid\n", ak7604->pdn_gpio);
		return 0;
	}

	return 0;
}

static int ak7604_probe(struct snd_soc_component *component)
{
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
	int ret = 0;

	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	ak7604->component = component;
	ret = ak7604_parse_dt(ak7604);
	if (ret < 0) {
		ak7604->pdn_gpio = -1;
		ret = 0;
	}
	if (ak7604->pdn_gpio != -1) {
		ret = gpio_request(ak7604->pdn_gpio, "ak7604 pdn");
		akdbgprt("\t[AK7604] %s : gpio_request ret = %d\n", __func__, ret);
		gpio_direction_output(ak7604->pdn_gpio, 0);
	}

	ak7604_init_reg(component);

	ret = ark_ak7604_init(component);

	ak7604->MIRNo = 0;
	ak7604->status = POWERDOWN;

	ak7604->DSPPramMode = 0;
	ak7604->DSPCramMode = 0;

	ak7604->cramaddr = 0;
	ak7604->cramcount = 0;

#ifdef AK7604_IO_CONTROL
	init_ak7604_pd(ak7604);
#endif

	return 0;
}

static void ak7604_remove(struct snd_soc_component *component)
{akdbgprt("\t[ak7604] %s start\n", __func__);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	ak7604_set_bias_level(component, SND_SOC_BIAS_OFF);
	if (ak7604->pdn_gpio != -1) {
		gpio_set_value(ak7604->pdn_gpio, 0);
		mdelay(1);
		gpio_free(ak7604->pdn_gpio);
		mdelay(1);
	}
}

static int ak7604_suspend(struct snd_soc_component *component)
{akdbgprt("\t[ak7604] %s start\n", __func__);
	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);

	ak7604_set_bias_level(component, SND_SOC_BIAS_OFF);

	regcache_cache_only(ak7604->regmap, true);
	regcache_mark_dirty(ak7604->regmap);

	if (ak7604->pdn_gpio > 0) {
		gpio_set_value(ak7604->pdn_gpio, 0);
		mdelay(1);
	}

	return 0;
}

static int ak7604_resume(struct snd_soc_component *component)
{
//	struct ak7604_priv *ak7604 = snd_soc_component_get_drvdata(component);
//	unsigned int val;
//	int i, ret;
	akdbgprt("\t[ak7604] %s start\n", __func__);

//	// Register value reset
//	if (ak7604->pdn_gpio != -1) {
//		gpio_set_value(ak7604->pdn_gpio, GPO_PDN_LOW);
//		akdbgprt("\t[ak7604] %s External PDN[OFF]\n", __func__);
//		mdelay(1);
//		gpio_set_value(ak7604->pdn_gpio, GPO_PDN_HIGH);
//		akdbgprt("\t[ak7604] %s External PDN[ON]\n", __func__);
//		mdelay(1);
//	}

//	// State before suspend
//	for (i = 0; i < ARRAY_SIZE(ak7604_reg); i++) {
//		if (ak7604_writeable(NULL, ak7604_reg[i].reg)) {
//			ret = regmap_read(ak7604->regmap,
//						ak7604_reg[i].reg, &val);
//			if (ret >= 0)
//				//snd_soc_write(codec, ak7604_reg[i].reg, val);
//				snd_soc_component_write(component, ak7604_reg[i].reg, val);
//		}
//	}

	//ak7604_init_reg(component);
	//ark_ak7604_init(component);
	return 0;
}

struct snd_soc_component_driver soc_component_dev_ak7604 = {
	.probe = ak7604_probe,
	.remove = ak7604_remove,
	.suspend =	ak7604_suspend,
	.resume =	ak7604_resume,

	.read = ak7604_read_register,
	.write = ak7604_write_register,

	.idle_bias_on = false,
	.set_bias_level = ak7604_set_bias_level,
	.controls = ak7604_snd_controls,
	.num_controls = ARRAY_SIZE(ak7604_snd_controls),
	.dapm_widgets = ak7604_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(ak7604_dapm_widgets),
	.dapm_routes = ak7604_intercon,
	.num_dapm_routes = ARRAY_SIZE(ak7604_intercon),
};
EXPORT_SYMBOL_GPL(soc_component_dev_ak7604);

static const struct regmap_config ak7604_regmap = {
	.reg_bits = 16,
	.val_bits = 8,

	.max_register = AK7604_MAX_REGISTER,
	.volatile_reg = ak7604_volatile,
	.writeable_reg = ak7604_writeable,
	.readable_reg = ak7604_readable,

	.reg_defaults = ak7604_reg,
	.num_reg_defaults = ARRAY_SIZE(ak7604_reg),
	.cache_type = REGCACHE_RBTREE,
};


static const struct of_device_id ak7604_dt_ids[] = {
	{ .compatible = "akm,ak7604"},
	{   }
};
MODULE_DEVICE_TABLE(of, ak7604_dt_ids);

#ifdef AK7604_I2C_IF

//static int ak7604_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
static int ak7604_i2c_probe(struct i2c_client *i2c)
{
	struct ak7604_priv *ak7604;
	int ret = 0;

	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	ak7604 = devm_kzalloc(&i2c->dev, sizeof(struct ak7604_priv), GFP_KERNEL);
	if (ak7604 == NULL)
		return -ENOMEM;

	ak7604->regmap = devm_regmap_init_i2c(i2c, &ak7604_regmap);
	if (IS_ERR(ak7604->regmap)) {
		devm_kfree(&i2c->dev, ak7604);
		return PTR_ERR(ak7604->regmap);
	}
	regcache_cache_only(ak7604->regmap, true);

	i2c_set_clientdata(i2c, ak7604);

	ak7604->control_type = SND_SOC_I2C;
	ak7604->i2c = i2c;

	//ret = snd_soc_register_codec(&i2c->dev,
	//		&soc_codec_dev_ak7604, &ak7604_dai[0], ARRAY_SIZE(ak7604_dai));
	ret = devm_snd_soc_register_component(&i2c->dev,
			&soc_component_dev_ak7604, &ak7604_dai[0], ARRAY_SIZE(ak7604_dai));
	if (ret < 0) {
		devm_kfree(&i2c->dev, ak7604);
		akdbgprt("\t[AK7604 Error!] %s(%d)\n", __func__, __LINE__);
	}
	return ret;
}

static void ak7604_i2c_remove(struct i2c_client *client)
{
	//snd_soc_unregister_codec(&client->dev);
	snd_soc_unregister_component(&client->dev);
	return;
}

static const struct i2c_device_id ak7604_i2c_id[] = {
	{ "ak7604", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ak7604_i2c_id);

static struct i2c_driver ak7604_i2c_driver = {
	.driver = {
		.name = "ak7604",
#if (defined KERNEL_3_18_XX || defined KERNEL_4_4_XX)
		.owner = THIS_MODULE,
#endif
		.of_match_table = of_match_ptr(ak7604_dt_ids),
	},
	.probe = ak7604_i2c_probe,
	.remove = ak7604_i2c_remove,
	.id_table = ak7604_i2c_id,
};

#else

static int ak7604_spi_probe(struct spi_device *spi)
{
	struct ak7604_priv *ak7604;
	int ret;

	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

	ak7604 = devm_kzalloc(&spi->dev, sizeof(struct ak7604_priv),
			      GFP_KERNEL);
	if (ak7604 == NULL)
		return -ENOMEM;

	ak7604->regmap = devm_regmap_init_spi(spi, &ak7604_regmap);
	if (IS_ERR(ak7604->regmap)) {
		ret = PTR_ERR(ak7604->regmap);
		dev_err(&spi->dev, "Failed to allocate register map: %d\n",
			ret);
		return ret;
	}
	regcache_cache_only(ak7604->regmap, true);

	spi_set_drvdata(spi, ak7604);

	ak7604->control_type = SND_SOC_SPI;
	ak7604->spi = spi;

	ret = devm_snd_soc_register_component(&spi->dev,
			&soc_component_dev_ak7604, &ak7604_dai[0], ARRAY_SIZE(ak7604_dai));

	if (ret != 0) {
		dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
		return ret;
	}

	return 0;

}

static int  ak7604_spi_remove(struct spi_device *spi)
{
	snd_soc_unregister_component(&spi->dev);
	return 0;
}

static struct spi_driver ak7604_spi_driver = {
	.driver = {
		.name = "ak7604",
		.owner = THIS_MODULE,
		.of_match_table = of_match_ptr(ak7604_dt_ids),
	},
	.probe = ak7604_spi_probe,
	.remove = ak7604_spi_remove,
};
#endif

static int __init ak7604_modinit(void)
{
	int ret = 0;

	akdbgprt("\t[AK7604] %s(%d)\n", __func__, __LINE__);

#ifdef AK7604_I2C_IF
	ret = i2c_add_driver(&ak7604_i2c_driver);
	if (ret != 0)
		akdbgprt(KERN_ERR "Failed to register AK7604 I2C driver: %d\n", ret);
#else
	ret = spi_register_driver(&ak7604_spi_driver);
	if (ret != 0)
		akdbgprt(KERN_ERR "Failed to register AK7604 SPI driver: %d\n",  ret);
#endif

#ifdef AK7604_IO_CONTROL
	ret = misc_register(&ak7604_misc);
	if (ret < 0)
		akdbgprt(KERN_ERR "Failed to register AK7604 MISC driver: %d\n",  ret);
#endif

	return ret;
}

module_init(ak7604_modinit);

static void __exit ak7604_exit(void)
{
#ifdef AK7604_I2C_IF
	i2c_del_driver(&ak7604_i2c_driver);
#else
	spi_unregister_driver(&ak7604_spi_driver);
#endif

#ifdef AK7604_IO_CONTROL
	misc_deregister(&ak7604_misc);
#endif

}
module_exit(ak7604_exit);

MODULE_DESCRIPTION("ak7604 codec driver");
MODULE_LICENSE("GPL v2");