sst_loader.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * sst_dsp.c - Intel SST Driver for audio engine
  4. *
  5. * Copyright (C) 2008-14 Intel Corp
  6. * Authors: Vinod Koul <vinod.koul@intel.com>
  7. * Harsha Priya <priya.harsha@intel.com>
  8. * Dharageswari R <dharageswari.r@intel.com>
  9. * KP Jeeja <jeeja.kp@intel.com>
  10. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This file contains all dsp controlling functions like firmware download,
  15. * setting/resetting dsp cores, etc
  16. */
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/fs.h>
  20. #include <linux/sched.h>
  21. #include <linux/firmware.h>
  22. #include <linux/dmaengine.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/pcm.h>
  26. #include <sound/soc.h>
  27. #include <sound/compress_driver.h>
  28. #include <asm/platform_sst_audio.h>
  29. #include "../sst-mfld-platform.h"
  30. #include "sst.h"
  31. void memcpy32_toio(void __iomem *dst, const void *src, int count)
  32. {
  33. /* __iowrite32_copy uses 32-bit count values so divide by 4 for
  34. * right count in words
  35. */
  36. __iowrite32_copy(dst, src, count / 4);
  37. }
  38. void memcpy32_fromio(void *dst, const void __iomem *src, int count)
  39. {
  40. /* __ioread32_copy uses 32-bit count values so divide by 4 for
  41. * right count in words
  42. */
  43. __ioread32_copy(dst, src, count / 4);
  44. }
  45. /**
  46. * intel_sst_reset_dsp_mrfld - Resetting SST DSP
  47. * @sst_drv_ctx: intel_sst_drv context pointer
  48. *
  49. * This resets DSP in case of MRFLD platfroms
  50. */
  51. int intel_sst_reset_dsp_mrfld(struct intel_sst_drv *sst_drv_ctx)
  52. {
  53. union config_status_reg_mrfld csr;
  54. dev_dbg(sst_drv_ctx->dev, "sst: Resetting the DSP in mrfld\n");
  55. csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR);
  56. dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full);
  57. csr.full |= 0x7;
  58. sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full);
  59. csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR);
  60. dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full);
  61. csr.full &= ~(0x1);
  62. sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full);
  63. csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR);
  64. dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full);
  65. return 0;
  66. }
  67. /**
  68. * sst_start_mrfld - Start the SST DSP processor
  69. * @sst_drv_ctx: intel_sst_drv context pointer
  70. *
  71. * This starts the DSP in MERRIFIELD platfroms
  72. */
  73. int sst_start_mrfld(struct intel_sst_drv *sst_drv_ctx)
  74. {
  75. union config_status_reg_mrfld csr;
  76. dev_dbg(sst_drv_ctx->dev, "sst: Starting the DSP in mrfld LALALALA\n");
  77. csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR);
  78. dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full);
  79. csr.full |= 0x7;
  80. sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full);
  81. csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR);
  82. dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full);
  83. csr.part.xt_snoop = 1;
  84. csr.full &= ~(0x5);
  85. sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full);
  86. csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR);
  87. dev_dbg(sst_drv_ctx->dev, "sst: Starting the DSP_merrifield:%llx\n",
  88. csr.full);
  89. return 0;
  90. }
  91. static int sst_validate_fw_image(struct intel_sst_drv *ctx, unsigned long size,
  92. struct fw_module_header **module, u32 *num_modules)
  93. {
  94. struct sst_fw_header *header;
  95. const void *sst_fw_in_mem = ctx->fw_in_mem;
  96. dev_dbg(ctx->dev, "Enter\n");
  97. /* Read the header information from the data pointer */
  98. header = (struct sst_fw_header *)sst_fw_in_mem;
  99. dev_dbg(ctx->dev,
  100. "header sign=%s size=%x modules=%x fmt=%x size=%zx\n",
  101. header->signature, header->file_size, header->modules,
  102. header->file_format, sizeof(*header));
  103. /* verify FW */
  104. if ((strncmp(header->signature, SST_FW_SIGN, 4) != 0) ||
  105. (size != header->file_size + sizeof(*header))) {
  106. /* Invalid FW signature */
  107. dev_err(ctx->dev, "InvalidFW sign/filesize mismatch\n");
  108. return -EINVAL;
  109. }
  110. *num_modules = header->modules;
  111. *module = (void *)sst_fw_in_mem + sizeof(*header);
  112. return 0;
  113. }
  114. /*
  115. * sst_fill_memcpy_list - Fill the memcpy list
  116. *
  117. * @memcpy_list: List to be filled
  118. * @destn: Destination addr to be filled in the list
  119. * @src: Source addr to be filled in the list
  120. * @size: Size to be filled in the list
  121. *
  122. * Adds the node to the list after required fields
  123. * are populated in the node
  124. */
  125. static int sst_fill_memcpy_list(struct list_head *memcpy_list,
  126. void *destn, const void *src, u32 size, bool is_io)
  127. {
  128. struct sst_memcpy_list *listnode;
  129. listnode = kzalloc(sizeof(*listnode), GFP_KERNEL);
  130. if (listnode == NULL)
  131. return -ENOMEM;
  132. listnode->dstn = destn;
  133. listnode->src = src;
  134. listnode->size = size;
  135. listnode->is_io = is_io;
  136. list_add_tail(&listnode->memcpylist, memcpy_list);
  137. return 0;
  138. }
  139. /**
  140. * sst_parse_module_memcpy - Parse audio FW modules and populate the memcpy list
  141. *
  142. * @sst_drv_ctx : driver context
  143. * @module : FW module header
  144. * @memcpy_list : Pointer to the list to be populated
  145. * Create the memcpy list as the number of block to be copied
  146. * returns error or 0 if module sizes are proper
  147. */
  148. static int sst_parse_module_memcpy(struct intel_sst_drv *sst_drv_ctx,
  149. struct fw_module_header *module, struct list_head *memcpy_list)
  150. {
  151. struct fw_block_info *block;
  152. u32 count;
  153. int ret_val = 0;
  154. void __iomem *ram_iomem;
  155. dev_dbg(sst_drv_ctx->dev, "module sign %s size %x blocks %x type %x\n",
  156. module->signature, module->mod_size,
  157. module->blocks, module->type);
  158. dev_dbg(sst_drv_ctx->dev, "module entrypoint 0x%x\n", module->entry_point);
  159. block = (void *)module + sizeof(*module);
  160. for (count = 0; count < module->blocks; count++) {
  161. if (block->size <= 0) {
  162. dev_err(sst_drv_ctx->dev, "block size invalid\n");
  163. return -EINVAL;
  164. }
  165. switch (block->type) {
  166. case SST_IRAM:
  167. ram_iomem = sst_drv_ctx->iram;
  168. break;
  169. case SST_DRAM:
  170. ram_iomem = sst_drv_ctx->dram;
  171. break;
  172. case SST_DDR:
  173. ram_iomem = sst_drv_ctx->ddr;
  174. break;
  175. case SST_CUSTOM_INFO:
  176. block = (void *)block + sizeof(*block) + block->size;
  177. continue;
  178. default:
  179. dev_err(sst_drv_ctx->dev, "wrong ram type0x%x in block0x%x\n",
  180. block->type, count);
  181. return -EINVAL;
  182. }
  183. ret_val = sst_fill_memcpy_list(memcpy_list,
  184. ram_iomem + block->ram_offset,
  185. (void *)block + sizeof(*block), block->size, 1);
  186. if (ret_val)
  187. return ret_val;
  188. block = (void *)block + sizeof(*block) + block->size;
  189. }
  190. return 0;
  191. }
  192. /**
  193. * sst_parse_fw_memcpy - parse the firmware image & populate the list for memcpy
  194. *
  195. * @ctx : pointer to drv context
  196. * @size : size of the firmware
  197. * @fw_list : pointer to list_head to be populated
  198. * This function parses the FW image and saves the parsed image in the list
  199. * for memcpy
  200. */
  201. static int sst_parse_fw_memcpy(struct intel_sst_drv *ctx, unsigned long size,
  202. struct list_head *fw_list)
  203. {
  204. struct fw_module_header *module;
  205. u32 count, num_modules;
  206. int ret_val;
  207. ret_val = sst_validate_fw_image(ctx, size, &module, &num_modules);
  208. if (ret_val)
  209. return ret_val;
  210. for (count = 0; count < num_modules; count++) {
  211. ret_val = sst_parse_module_memcpy(ctx, module, fw_list);
  212. if (ret_val)
  213. return ret_val;
  214. module = (void *)module + sizeof(*module) + module->mod_size;
  215. }
  216. return 0;
  217. }
  218. /**
  219. * sst_do_memcpy - function initiates the memcpy
  220. *
  221. * @memcpy_list: Pter to memcpy list on which the memcpy needs to be initiated
  222. *
  223. * Triggers the memcpy
  224. */
  225. static void sst_do_memcpy(struct list_head *memcpy_list)
  226. {
  227. struct sst_memcpy_list *listnode;
  228. list_for_each_entry(listnode, memcpy_list, memcpylist) {
  229. if (listnode->is_io)
  230. memcpy32_toio((void __iomem *)listnode->dstn,
  231. listnode->src, listnode->size);
  232. else
  233. memcpy(listnode->dstn, listnode->src, listnode->size);
  234. }
  235. }
  236. void sst_memcpy_free_resources(struct intel_sst_drv *sst_drv_ctx)
  237. {
  238. struct sst_memcpy_list *listnode, *tmplistnode;
  239. /* Free the list */
  240. list_for_each_entry_safe(listnode, tmplistnode,
  241. &sst_drv_ctx->memcpy_list, memcpylist) {
  242. list_del(&listnode->memcpylist);
  243. kfree(listnode);
  244. }
  245. }
  246. static int sst_cache_and_parse_fw(struct intel_sst_drv *sst,
  247. const struct firmware *fw)
  248. {
  249. int retval = 0;
  250. sst->fw_in_mem = kzalloc(fw->size, GFP_KERNEL);
  251. if (!sst->fw_in_mem) {
  252. retval = -ENOMEM;
  253. goto end_release;
  254. }
  255. dev_dbg(sst->dev, "copied fw to %p", sst->fw_in_mem);
  256. dev_dbg(sst->dev, "phys: %lx", (unsigned long)virt_to_phys(sst->fw_in_mem));
  257. memcpy(sst->fw_in_mem, fw->data, fw->size);
  258. retval = sst_parse_fw_memcpy(sst, fw->size, &sst->memcpy_list);
  259. if (retval) {
  260. dev_err(sst->dev, "Failed to parse fw\n");
  261. kfree(sst->fw_in_mem);
  262. sst->fw_in_mem = NULL;
  263. }
  264. end_release:
  265. release_firmware(fw);
  266. return retval;
  267. }
  268. void sst_firmware_load_cb(const struct firmware *fw, void *context)
  269. {
  270. struct intel_sst_drv *ctx = context;
  271. dev_dbg(ctx->dev, "Enter\n");
  272. if (fw == NULL) {
  273. dev_err(ctx->dev, "request fw failed\n");
  274. return;
  275. }
  276. mutex_lock(&ctx->sst_lock);
  277. if (ctx->sst_state != SST_RESET ||
  278. ctx->fw_in_mem != NULL) {
  279. release_firmware(fw);
  280. mutex_unlock(&ctx->sst_lock);
  281. return;
  282. }
  283. dev_dbg(ctx->dev, "Request Fw completed\n");
  284. sst_cache_and_parse_fw(ctx, fw);
  285. mutex_unlock(&ctx->sst_lock);
  286. }
  287. /*
  288. * sst_request_fw - requests audio fw from kernel and saves a copy
  289. *
  290. * This function requests the SST FW from the kernel, parses it and
  291. * saves a copy in the driver context
  292. */
  293. static int sst_request_fw(struct intel_sst_drv *sst)
  294. {
  295. int retval = 0;
  296. const struct firmware *fw;
  297. retval = request_firmware(&fw, sst->firmware_name, sst->dev);
  298. if (retval) {
  299. dev_err(sst->dev, "request fw failed %d\n", retval);
  300. return retval;
  301. }
  302. if (fw == NULL) {
  303. dev_err(sst->dev, "fw is returning as null\n");
  304. return -EINVAL;
  305. }
  306. mutex_lock(&sst->sst_lock);
  307. retval = sst_cache_and_parse_fw(sst, fw);
  308. mutex_unlock(&sst->sst_lock);
  309. return retval;
  310. }
  311. /*
  312. * Writing the DDR physical base to DCCM offset
  313. * so that FW can use it to setup TLB
  314. */
  315. static void sst_dccm_config_write(void __iomem *dram_base,
  316. unsigned int ddr_base)
  317. {
  318. void __iomem *addr;
  319. u32 bss_reset = 0;
  320. addr = (void __iomem *)(dram_base + MRFLD_FW_DDR_BASE_OFFSET);
  321. memcpy32_toio(addr, (void *)&ddr_base, sizeof(u32));
  322. bss_reset |= (1 << MRFLD_FW_BSS_RESET_BIT);
  323. addr = (void __iomem *)(dram_base + MRFLD_FW_FEATURE_BASE_OFFSET);
  324. memcpy32_toio(addr, &bss_reset, sizeof(u32));
  325. }
  326. void sst_post_download_mrfld(struct intel_sst_drv *ctx)
  327. {
  328. sst_dccm_config_write(ctx->dram, ctx->ddr_base);
  329. dev_dbg(ctx->dev, "config written to DCCM\n");
  330. }
  331. /**
  332. * sst_load_fw - function to load FW into DSP
  333. * @sst_drv_ctx: intel_sst_drv context pointer
  334. *
  335. * Transfers the FW to DSP using dma/memcpy
  336. */
  337. int sst_load_fw(struct intel_sst_drv *sst_drv_ctx)
  338. {
  339. int ret_val = 0;
  340. struct sst_block *block;
  341. dev_dbg(sst_drv_ctx->dev, "sst_load_fw\n");
  342. if (sst_drv_ctx->sst_state != SST_RESET)
  343. return -EAGAIN;
  344. if (!sst_drv_ctx->fw_in_mem) {
  345. dev_dbg(sst_drv_ctx->dev, "sst: FW not in memory retry to download\n");
  346. ret_val = sst_request_fw(sst_drv_ctx);
  347. if (ret_val)
  348. return ret_val;
  349. }
  350. block = sst_create_block(sst_drv_ctx, 0, FW_DWNL_ID);
  351. if (block == NULL)
  352. return -ENOMEM;
  353. /* Prevent C-states beyond C6 */
  354. cpu_latency_qos_update_request(sst_drv_ctx->qos, 0);
  355. sst_drv_ctx->sst_state = SST_FW_LOADING;
  356. ret_val = sst_drv_ctx->ops->reset(sst_drv_ctx);
  357. if (ret_val)
  358. goto restore;
  359. sst_do_memcpy(&sst_drv_ctx->memcpy_list);
  360. /* Write the DRAM/DCCM config before enabling FW */
  361. if (sst_drv_ctx->ops->post_download)
  362. sst_drv_ctx->ops->post_download(sst_drv_ctx);
  363. /* bring sst out of reset */
  364. ret_val = sst_drv_ctx->ops->start(sst_drv_ctx);
  365. if (ret_val)
  366. goto restore;
  367. ret_val = sst_wait_timeout(sst_drv_ctx, block);
  368. if (ret_val) {
  369. dev_err(sst_drv_ctx->dev, "fw download failed %d\n" , ret_val);
  370. /* FW download failed due to timeout */
  371. ret_val = -EBUSY;
  372. }
  373. restore:
  374. /* Re-enable Deeper C-states beyond C6 */
  375. cpu_latency_qos_update_request(sst_drv_ctx->qos, PM_QOS_DEFAULT_VALUE);
  376. sst_free_block(sst_drv_ctx, block);
  377. dev_dbg(sst_drv_ctx->dev, "fw load successful!!!\n");
  378. if (sst_drv_ctx->ops->restore_dsp_context)
  379. sst_drv_ctx->ops->restore_dsp_context();
  380. sst_drv_ctx->sst_state = SST_FW_RUNNING;
  381. return ret_val;
  382. }