dockstar.c 3.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com>
  4. * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
  5. *
  6. * Based on sheevaplug.c originally written by
  7. * Prafulla Wadaskar <prafulla@marvell.com>
  8. * (C) Copyright 2009
  9. * Marvell Semiconductor <www.marvell.com>
  10. */
  11. #include <common.h>
  12. #include <bootstage.h>
  13. #include <init.h>
  14. #include <netdev.h>
  15. #include <asm/arch/soc.h>
  16. #include <asm/arch/mpp.h>
  17. #include <asm/arch/cpu.h>
  18. #include <asm/global_data.h>
  19. #include <asm/io.h>
  20. #include <asm/mach-types.h>
  21. #include <linux/bitops.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. #define DOCKSTAR_OE_LOW (~(0))
  24. #define DOCKSTAR_OE_HIGH (~(0))
  25. #define DOCKSTAR_OE_VAL_LOW BIT(29) /* USB_PWEN low */
  26. #define DOCKSTAR_OE_VAL_HIGH BIT(17) /* LED pin high */
  27. int board_early_init_f(void)
  28. {
  29. /*
  30. * default gpio configuration
  31. * There are maximum 64 gpios controlled through 2 sets of registers
  32. * the below configuration configures mainly initial LED status
  33. */
  34. mvebu_config_gpio(DOCKSTAR_OE_VAL_LOW,
  35. DOCKSTAR_OE_VAL_HIGH,
  36. DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
  37. /* Multi-Purpose Pins Functionality configuration */
  38. static const u32 kwmpp_config[] = {
  39. MPP0_NF_IO2,
  40. MPP1_NF_IO3,
  41. MPP2_NF_IO4,
  42. MPP3_NF_IO5,
  43. MPP4_NF_IO6,
  44. MPP5_NF_IO7,
  45. MPP6_SYSRST_OUTn,
  46. MPP7_GPO,
  47. MPP8_UART0_RTS,
  48. MPP9_UART0_CTS,
  49. MPP10_UART0_TXD,
  50. MPP11_UART0_RXD,
  51. MPP12_SD_CLK,
  52. MPP13_SD_CMD,
  53. MPP14_SD_D0,
  54. MPP15_SD_D1,
  55. MPP16_SD_D2,
  56. MPP17_SD_D3,
  57. MPP18_NF_IO0,
  58. MPP19_NF_IO1,
  59. MPP20_GPIO,
  60. MPP21_GPIO,
  61. MPP22_GPIO,
  62. MPP23_GPIO,
  63. MPP24_GPIO,
  64. MPP25_GPIO,
  65. MPP26_GPIO,
  66. MPP27_GPIO,
  67. MPP28_GPIO,
  68. MPP29_TSMP9,
  69. MPP30_GPIO,
  70. MPP31_GPIO,
  71. MPP32_GPIO,
  72. MPP33_GPIO,
  73. MPP34_GPIO,
  74. MPP35_GPIO,
  75. MPP36_GPIO,
  76. MPP37_GPIO,
  77. MPP38_GPIO,
  78. MPP39_GPIO,
  79. MPP40_GPIO,
  80. MPP41_GPIO,
  81. MPP42_GPIO,
  82. MPP43_GPIO,
  83. MPP44_GPIO,
  84. MPP45_GPIO,
  85. MPP46_GPIO,
  86. MPP47_GPIO,
  87. MPP48_GPIO,
  88. MPP49_GPIO,
  89. 0
  90. };
  91. kirkwood_mpp_conf(kwmpp_config, NULL);
  92. return 0;
  93. }
  94. int board_eth_init(struct bd_info *bis)
  95. {
  96. return cpu_eth_init(bis);
  97. }
  98. int board_init(void)
  99. {
  100. /*
  101. * arch number of board
  102. */
  103. gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
  104. /* address of boot parameters */
  105. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  106. return 0;
  107. }
  108. #if CONFIG_IS_ENABLED(BOOTSTAGE)
  109. #define GREEN_LED BIT(14)
  110. #define ORANGE_LED BIT(15)
  111. #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
  112. #define NEITHER_LED 0
  113. static void set_leds(u32 leds, u32 blinking)
  114. {
  115. struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
  116. u32 oe;
  117. u32 bl;
  118. oe = readl(&r->oe) | BOTH_LEDS;
  119. writel(oe & ~leds, &r->oe); /* active low */
  120. bl = readl(&r->blink_en) & ~BOTH_LEDS;
  121. writel(bl | blinking, &r->blink_en);
  122. }
  123. void show_boot_progress(int val)
  124. {
  125. switch (val) {
  126. case BOOTSTAGE_ID_RUN_OS: /* booting Linux */
  127. set_leds(BOTH_LEDS, NEITHER_LED);
  128. break;
  129. case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */
  130. set_leds(GREEN_LED, GREEN_LED);
  131. break;
  132. default:
  133. if (val < 0) /* error */
  134. set_leds(ORANGE_LED, ORANGE_LED);
  135. break;
  136. }
  137. }
  138. #endif