sf.rst 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245
  1. .. SPDX-License-Identifier: GPL-2.0+:
  2. sf command
  3. ==========
  4. Synopis
  5. -------
  6. ::
  7. sf probe [[[<bus>:]<cs>] [<hz> [<mode>]]]
  8. sf read <addr> <offset>|<partition> <len>
  9. sf write <addr> <offset>|<partition> <len>
  10. sf erase <offset>|<partition> <len>
  11. sf update <addr> <offset>|<partition> <len>
  12. sf protect lock|unlock <sector> <len>
  13. sf test <offset>|<partition> <len>
  14. Description
  15. -----------
  16. The *sf* command is used to access SPI flash, supporting read/write/erase and
  17. a few other functions.
  18. Probe
  19. -----
  20. The flash must first be probed with *sf probe* before any of the other
  21. subcommands can be used. All of the parameters are optional:
  22. bus
  23. SPI bus number containing the SPI-flash chip, e.g. 0. If you don't know
  24. the number, you can use 'dm uclass' to see all the spi devices,
  25. and check the value for 'seq' for each one (here 0 and 2)::
  26. uclass 89: spi
  27. 0 spi@0 @ 05484960, seq 0
  28. 1 spi@1 @ 05484b40, seq 2
  29. cs
  30. SPI chip-select to use for the chip. This is often 0 and can be omitted,
  31. but in some cases multiple slaves are attached to a SPI controller,
  32. selected by a chip-select line for each one.
  33. hz
  34. Speed of the SPI bus in hertz. This normally defaults to 100000, i.e.
  35. 100KHz, which is very slow. Note that if the device exists in the
  36. device tree, there might be a speed provided there, in which case this
  37. setting is ignored.
  38. mode
  39. SPI mode to use:
  40. ===== ================
  41. Mode Meaning
  42. ===== ================
  43. 0 CPOL=0, CPHA=0
  44. 1 CPOL=0, CPHA=1
  45. 2 CPOL=1, CPHA=0
  46. 3 CPOL=1, CPHA=1
  47. ===== ================
  48. Clock phase (CPHA) 0 means that data is transferred (sampled) on the
  49. first clock edge; 1 means the second.
  50. Clock polarity (CPOL) controls the idle state of the clock, 0 for low,
  51. 1 for high.
  52. The active state is the opposite of idle.
  53. You may find this `SPI documentation`_ useful.
  54. Parameters for other subcommands (described below) are as follows:
  55. addr
  56. Memory address to start transfer
  57. offset
  58. Flash offset to start transfer
  59. partition
  60. If the parameter is not numeric, it is assumed to be a partition
  61. description in the format <dev_type><dev_num>,<part_num> which is not
  62. covered here. This requires CONFIG_CMD_MTDPARTS.
  63. len
  64. Number of bytes to transfer
  65. Read
  66. ~~~~
  67. Use *sf read* to read from SPI flash to memory. The read will fail if an
  68. attempt is made to read past the end of the flash.
  69. Write
  70. ~~~~~
  71. Use *sf write* to write from memory to SPI flash. The SPI flash should be
  72. erased first, since otherwise the result is undefined.
  73. The write will fail if an attempt is made to read past the end of the flash.
  74. Erase
  75. ~~~~~
  76. Use *sf erase* to erase a region of SPI flash. The erase will fail if any part
  77. of the region to be erased is protected or lies past the end of the flash. It
  78. may also fail if the start offset or length are not aligned to an erase region
  79. (e.g. 256 bytes).
  80. Update
  81. ~~~~~~
  82. Use *sf update* to automatically erase and update a region of SPI flash from
  83. memory. This works a sector at a time (typical 4KB or 64KB). For each
  84. sector it first checks if the sector already has the right data. If so it is
  85. skipped. If not, the sector is erased and the new data written. Note that if
  86. the length is not a multiple of the erase size, the space after the data in
  87. the last sector will be erased. If the offset does not start at the beginning
  88. of an erase block, the operation will fail.
  89. Speed statistics are shown including the number of bytes that were already
  90. correct.
  91. Protect
  92. ~~~~~~~
  93. SPI-flash chips often have a protection feature where the chip is split up into
  94. regions which can be locked or unlocked. With *sf protect* it is possible to
  95. change these settings, if supported by the driver.
  96. lock|unlock
  97. Selects whether to lock or unlock the sectors
  98. <sector>
  99. Start sector number to lock/unlock. This may be the byte offset or some
  100. other value, depending on the chip.
  101. <len>
  102. Number of bytes to lock/unlock
  103. Test
  104. ~~~~
  105. A convenient and fast *sf test* subcommand provides a way to check that SPI
  106. flash is working as expected. This works in four stages:
  107. * erase - erases the entire region
  108. * check - checks that the region is erased
  109. * write - writes a test pattern to the region, consisting of the U-Boot code
  110. * read - reads back the test pattern to check that it was written correctly
  111. Memory is allocated for two buffers, each <len> bytes in size. At typical
  112. size is 64KB to 1MB. The offset and size must be aligned to an erase boundary.
  113. Note that this test will fail if any part of the SPI flash is write-protected.
  114. Examples
  115. --------
  116. This first example uses sandbox::
  117. => sf probe
  118. SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB
  119. => sf read 1000 1100 80000
  120. device 0 offset 0x1100, size 0x80000
  121. SF: 524288 bytes @ 0x1100 Read: OK
  122. => md 1000
  123. 00001000: edfe0dd0 f33a0000 78000000 84250000 ......:....x..%.
  124. 00001010: 28000000 11000000 10000000 00000000 ...(............
  125. 00001020: 6f050000 0c250000 00000000 00000000 ...o..%.........
  126. 00001030: 00000000 00000000 00000000 00000000 ................
  127. 00001040: 00000000 00000000 00000000 00000000 ................
  128. 00001050: 00000000 00000000 00000000 00000000 ................
  129. 00001060: 00000000 00000000 00000000 00000000 ................
  130. 00001070: 00000000 00000000 01000000 00000000 ................
  131. 00001080: 03000000 04000000 00000000 01000000 ................
  132. 00001090: 03000000 04000000 0f000000 01000000 ................
  133. 000010a0: 03000000 08000000 1b000000 646e6173 ............sand
  134. 000010b0: 00786f62 03000000 08000000 21000000 box............!
  135. 000010c0: 646e6173 00786f62 01000000 61696c61 sandbox.....alia
  136. 000010d0: 00736573 03000000 07000000 2c000000 ses............,
  137. 000010e0: 6332692f 00003040 03000000 07000000 /i2c@0..........
  138. 000010f0: 31000000 6963702f 00003040 03000000 ...1/pci@0......
  139. => sf erase 0 80000
  140. SF: 524288 bytes @ 0x0 Erased: OK
  141. => sf read 1000 1100 80000
  142. device 0 offset 0x1100, size 0x80000
  143. SF: 524288 bytes @ 0x1100 Read: OK
  144. => md 1000
  145. 00001000: ffffffff ffffffff ffffffff ffffffff ................
  146. 00001010: ffffffff ffffffff ffffffff ffffffff ................
  147. 00001020: ffffffff ffffffff ffffffff ffffffff ................
  148. 00001030: ffffffff ffffffff ffffffff ffffffff ................
  149. 00001040: ffffffff ffffffff ffffffff ffffffff ................
  150. 00001050: ffffffff ffffffff ffffffff ffffffff ................
  151. 00001060: ffffffff ffffffff ffffffff ffffffff ................
  152. 00001070: ffffffff ffffffff ffffffff ffffffff ................
  153. 00001080: ffffffff ffffffff ffffffff ffffffff ................
  154. 00001090: ffffffff ffffffff ffffffff ffffffff ................
  155. 000010a0: ffffffff ffffffff ffffffff ffffffff ................
  156. 000010b0: ffffffff ffffffff ffffffff ffffffff ................
  157. 000010c0: ffffffff ffffffff ffffffff ffffffff ................
  158. 000010d0: ffffffff ffffffff ffffffff ffffffff ................
  159. 000010e0: ffffffff ffffffff ffffffff ffffffff ................
  160. 000010f0: ffffffff ffffffff ffffffff ffffffff ................
  161. This second example is running on coral, an x86 Chromebook::
  162. => sf probe
  163. SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
  164. => sf erase 300000 80000
  165. SF: 524288 bytes @ 0x300000 Erased: OK
  166. => sf update 1110000 300000 80000
  167. device 0 offset 0x300000, size 0x80000
  168. 524288 bytes written, 0 bytes skipped in 0.457s, speed 1164578 B/s
  169. # This does nothing as the flash is already updated
  170. => sf update 1110000 300000 80000
  171. device 0 offset 0x300000, size 0x80000
  172. 0 bytes written, 524288 bytes skipped in 0.196s, speed 2684354 B/s
  173. => sf test 00000 80000 # try a protected region
  174. SPI flash test:
  175. Erase failed (err = -5)
  176. Test failed
  177. => sf test 800000 80000
  178. SPI flash test:
  179. 0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps
  180. 1 check: 192 ticks, 2666 KiB/s 21.328 Mbps
  181. 2 write: 227 ticks, 2255 KiB/s 18.040 Mbps
  182. 3 read: 189 ticks, 2708 KiB/s 21.664 Mbps
  183. Test passed
  184. 0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps
  185. 1 check: 192 ticks, 2666 KiB/s 21.328 Mbps
  186. 2 write: 227 ticks, 2255 KiB/s 18.040 Mbps
  187. 3 read: 189 ticks, 2708 KiB/s 21.664 Mbps
  188. .. _SPI documentation:
  189. https://en.wikipedia.org/wiki/Serial_Peripheral_Interface