firmware-zynqmp.c 9.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Xilinx Zynq MPSoC Firmware driver
  4. *
  5. * Copyright (C) 2018-2019 Xilinx, Inc.
  6. */
  7. #include <common.h>
  8. #include <cpu_func.h>
  9. #include <dm.h>
  10. #include <dm/lists.h>
  11. #include <log.h>
  12. #include <zynqmp_firmware.h>
  13. #include <asm/cache.h>
  14. #include <asm/ptrace.h>
  15. #if defined(CONFIG_ZYNQMP_IPI)
  16. #include <mailbox.h>
  17. #include <asm/arch/sys_proto.h>
  18. #define PMUFW_PAYLOAD_ARG_CNT 8
  19. #define XST_PM_NO_ACCESS 2002L
  20. #define XST_PM_ALREADY_CONFIGURED 2009L
  21. static struct zynqmp_power {
  22. struct mbox_chan tx_chan;
  23. struct mbox_chan rx_chan;
  24. } zynqmp_power __section(".data");
  25. #define NODE_ID_LOCATION 5
  26. static unsigned int xpm_configobject[] = {
  27. /**********************************************************************/
  28. /* HEADER */
  29. 2, /* Number of remaining words in the header */
  30. 1, /* Number of sections included in config object */
  31. PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
  32. /**********************************************************************/
  33. /* SLAVE SECTION */
  34. PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */
  35. 1, /* Number of slaves */
  36. 0, /* Node ID which will be changed below */
  37. PM_SLAVE_FLAG_IS_SHAREABLE,
  38. PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK |
  39. PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
  40. PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
  41. };
  42. static unsigned int xpm_configobject_close[] = {
  43. /**********************************************************************/
  44. /* HEADER */
  45. 2, /* Number of remaining words in the header */
  46. 1, /* Number of sections included in config object */
  47. PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
  48. /**********************************************************************/
  49. /* SET CONFIG SECTION */
  50. PM_CONFIG_SET_CONFIG_SECTION_ID,
  51. 0U, /* Loading permission to Overlay config object */
  52. };
  53. int zynqmp_pmufw_config_close(void)
  54. {
  55. return zynqmp_pmufw_load_config_object(xpm_configobject_close,
  56. sizeof(xpm_configobject_close));
  57. }
  58. int zynqmp_pmufw_node(u32 id)
  59. {
  60. static bool check = true;
  61. static bool permission = true;
  62. if (check) {
  63. check = false;
  64. if (zynqmp_pmufw_node(NODE_OCM_BANK_0) == -EACCES) {
  65. printf("PMUFW: No permission to change config object\n");
  66. permission = false;
  67. }
  68. }
  69. if (!permission)
  70. return 0;
  71. /* Record power domain id */
  72. xpm_configobject[NODE_ID_LOCATION] = id;
  73. return zynqmp_pmufw_load_config_object(xpm_configobject,
  74. sizeof(xpm_configobject));
  75. }
  76. static int do_pm_probe(void)
  77. {
  78. struct udevice *dev;
  79. int ret;
  80. ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
  81. DM_DRIVER_GET(zynqmp_power),
  82. &dev);
  83. if (ret)
  84. debug("%s: Probing device failed: %d\n", __func__, ret);
  85. return ret;
  86. }
  87. static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen)
  88. {
  89. struct zynqmp_ipi_msg msg;
  90. int ret;
  91. u32 buffer[PAYLOAD_ARG_CNT];
  92. if (!res)
  93. res = buffer;
  94. if (req_len > PMUFW_PAYLOAD_ARG_CNT ||
  95. res_maxlen > PMUFW_PAYLOAD_ARG_CNT)
  96. return -EINVAL;
  97. if (!(zynqmp_power.tx_chan.dev) || !(zynqmp_power.rx_chan.dev)) {
  98. ret = do_pm_probe();
  99. if (ret)
  100. return ret;
  101. }
  102. debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]);
  103. msg.buf = (u32 *)req;
  104. msg.len = req_len;
  105. ret = mbox_send(&zynqmp_power.tx_chan, &msg);
  106. if (ret) {
  107. debug("%s: Sending message failed\n", __func__);
  108. return ret;
  109. }
  110. msg.buf = res;
  111. msg.len = res_maxlen;
  112. ret = mbox_recv(&zynqmp_power.rx_chan, &msg, 100);
  113. if (ret)
  114. debug("%s: Receiving message failed\n", __func__);
  115. return ret;
  116. }
  117. unsigned int zynqmp_firmware_version(void)
  118. {
  119. int ret;
  120. u32 ret_payload[PAYLOAD_ARG_CNT];
  121. static u32 pm_api_version = ZYNQMP_PM_VERSION_INVALID;
  122. /*
  123. * Get PMU version only once and later
  124. * just return stored values instead of
  125. * asking PMUFW again.
  126. **/
  127. if (pm_api_version == ZYNQMP_PM_VERSION_INVALID) {
  128. ret = xilinx_pm_request(PM_GET_API_VERSION, 0, 0, 0, 0,
  129. ret_payload);
  130. if (ret)
  131. panic("PMUFW is not found - Please load it!\n");
  132. pm_api_version = ret_payload[1];
  133. if (pm_api_version < ZYNQMP_PM_VERSION)
  134. panic("PMUFW version error. Expected: v%d.%d\n",
  135. ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR);
  136. }
  137. return pm_api_version;
  138. };
  139. int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, u32 value)
  140. {
  141. int ret;
  142. ret = xilinx_pm_request(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
  143. config, value, NULL);
  144. if (ret)
  145. printf("%s: node %d: set_gem_config %d failed\n",
  146. __func__, node, config);
  147. return ret;
  148. }
  149. int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
  150. {
  151. int ret;
  152. ret = xilinx_pm_request(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
  153. config, value, NULL);
  154. if (ret)
  155. printf("%s: node %d: set_sd_config %d failed\n",
  156. __func__, node, config);
  157. return ret;
  158. }
  159. int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
  160. {
  161. int ret;
  162. u32 *bit_mask;
  163. u32 ret_payload[PAYLOAD_ARG_CNT];
  164. /* Input arguments validation */
  165. if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
  166. return -EINVAL;
  167. /* Check feature check API version */
  168. ret = xilinx_pm_request(PM_FEATURE_CHECK, PM_FEATURE_CHECK, 0, 0, 0,
  169. ret_payload);
  170. if (ret)
  171. return ret;
  172. /* Check if feature check version 2 is supported or not */
  173. if ((ret_payload[1] & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
  174. /*
  175. * Call feature check for IOCTL/QUERY API to get IOCTL ID or
  176. * QUERY ID feature status.
  177. */
  178. ret = xilinx_pm_request(PM_FEATURE_CHECK, api_id, 0, 0, 0,
  179. ret_payload);
  180. if (ret)
  181. return ret;
  182. bit_mask = &ret_payload[2];
  183. if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0)
  184. return -EOPNOTSUPP;
  185. } else {
  186. return -ENODATA;
  187. }
  188. return 0;
  189. }
  190. /**
  191. * Send a configuration object to the PMU firmware.
  192. *
  193. * @cfg_obj: Pointer to the configuration object
  194. * @size: Size of @cfg_obj in bytes
  195. * Return: 0 on success otherwise negative errno.
  196. */
  197. int zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size)
  198. {
  199. int err;
  200. u32 ret_payload[PAYLOAD_ARG_CNT];
  201. if (IS_ENABLED(CONFIG_SPL_BUILD))
  202. printf("Loading new PMUFW cfg obj (%ld bytes)\n", size);
  203. flush_dcache_range((ulong)cfg_obj, (ulong)(cfg_obj + size));
  204. err = xilinx_pm_request(PM_SET_CONFIGURATION, (u32)(u64)cfg_obj, 0, 0,
  205. 0, ret_payload);
  206. if (err == XST_PM_NO_ACCESS) {
  207. return -EACCES;
  208. }
  209. if (err == XST_PM_ALREADY_CONFIGURED) {
  210. debug("PMUFW Node is already configured\n");
  211. return -ENODEV;
  212. }
  213. if (err)
  214. printf("Cannot load PMUFW configuration object (%d)\n", err);
  215. if (ret_payload[0])
  216. printf("PMUFW returned 0x%08x status!\n", ret_payload[0]);
  217. if ((err || ret_payload[0]) && IS_ENABLED(CONFIG_SPL_BUILD))
  218. panic("PMUFW config object loading failed in EL3\n");
  219. return 0;
  220. }
  221. static int zynqmp_power_probe(struct udevice *dev)
  222. {
  223. int ret;
  224. debug("%s, (dev=%p)\n", __func__, dev);
  225. ret = mbox_get_by_name(dev, "tx", &zynqmp_power.tx_chan);
  226. if (ret) {
  227. debug("%s: Cannot find tx mailbox\n", __func__);
  228. return ret;
  229. }
  230. ret = mbox_get_by_name(dev, "rx", &zynqmp_power.rx_chan);
  231. if (ret) {
  232. debug("%s: Cannot find rx mailbox\n", __func__);
  233. return ret;
  234. }
  235. ret = zynqmp_firmware_version();
  236. printf("PMUFW:\tv%d.%d\n",
  237. ret >> ZYNQMP_PM_VERSION_MAJOR_SHIFT,
  238. ret & ZYNQMP_PM_VERSION_MINOR_MASK);
  239. return 0;
  240. };
  241. static const struct udevice_id zynqmp_power_ids[] = {
  242. { .compatible = "xlnx,zynqmp-power" },
  243. { }
  244. };
  245. U_BOOT_DRIVER(zynqmp_power) = {
  246. .name = "zynqmp_power",
  247. .id = UCLASS_FIRMWARE,
  248. .of_match = zynqmp_power_ids,
  249. .probe = zynqmp_power_probe,
  250. };
  251. #endif
  252. int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
  253. u32 arg3, u32 *ret_payload)
  254. {
  255. debug("%s at EL%d, API ID: 0x%0x, 0x%0x, 0x%0x, 0x%0x, 0x%0x\n",
  256. __func__, current_el(), api_id, arg0, arg1, arg2, arg3);
  257. if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) {
  258. #if defined(CONFIG_ZYNQMP_IPI)
  259. /*
  260. * Use fixed payload and arg size as the EL2 call. The firmware
  261. * is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
  262. * firmware API is limited by the SMC call size
  263. */
  264. u32 regs[] = {api_id, arg0, arg1, arg2, arg3};
  265. int ret;
  266. if (api_id == PM_FPGA_LOAD) {
  267. /* Swap addr_hi/low because of incompatibility */
  268. u32 temp = regs[1];
  269. regs[1] = regs[2];
  270. regs[2] = temp;
  271. }
  272. ret = ipi_req(regs, PAYLOAD_ARG_CNT, ret_payload,
  273. PAYLOAD_ARG_CNT);
  274. if (ret)
  275. return ret;
  276. #else
  277. return -EPERM;
  278. #endif
  279. } else {
  280. /*
  281. * Added SIP service call Function Identifier
  282. * Make sure to stay in x0 register
  283. */
  284. struct pt_regs regs;
  285. regs.regs[0] = PM_SIP_SVC | api_id;
  286. regs.regs[1] = ((u64)arg1 << 32) | arg0;
  287. regs.regs[2] = ((u64)arg3 << 32) | arg2;
  288. smc_call(&regs);
  289. if (ret_payload) {
  290. ret_payload[0] = (u32)regs.regs[0];
  291. ret_payload[1] = upper_32_bits(regs.regs[0]);
  292. ret_payload[2] = (u32)regs.regs[1];
  293. ret_payload[3] = upper_32_bits(regs.regs[1]);
  294. ret_payload[4] = (u32)regs.regs[2];
  295. }
  296. }
  297. return (ret_payload) ? ret_payload[0] : 0;
  298. }
  299. static const struct udevice_id zynqmp_firmware_ids[] = {
  300. { .compatible = "xlnx,zynqmp-firmware" },
  301. { .compatible = "xlnx,versal-firmware"},
  302. { .compatible = "xlnx,versal-net-firmware"},
  303. { }
  304. };
  305. static int zynqmp_firmware_bind(struct udevice *dev)
  306. {
  307. int ret;
  308. struct udevice *child;
  309. if ((IS_ENABLED(CONFIG_SPL_BUILD) &&
  310. IS_ENABLED(CONFIG_SPL_POWER_DOMAIN) &&
  311. IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) ||
  312. (!IS_ENABLED(CONFIG_SPL_BUILD) &&
  313. IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN))) {
  314. ret = device_bind_driver_to_node(dev, "zynqmp_power_domain",
  315. "zynqmp_power_domain",
  316. dev_ofnode(dev), &child);
  317. if (ret) {
  318. printf("zynqmp power domain driver is not bound: %d\n", ret);
  319. return ret;
  320. }
  321. }
  322. return 0;
  323. }
  324. U_BOOT_DRIVER(zynqmp_firmware) = {
  325. .id = UCLASS_FIRMWARE,
  326. .name = "zynqmp_firmware",
  327. .of_match = zynqmp_firmware_ids,
  328. .bind = zynqmp_firmware_bind,
  329. };