reset-ast2500.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2017 Google, Inc
  4. * Copyright 2020 ASPEED Technology Inc.
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <log.h>
  9. #include <misc.h>
  10. #include <reset.h>
  11. #include <reset-uclass.h>
  12. #include <linux/err.h>
  13. #include <asm/io.h>
  14. #include <asm/arch/scu_ast2500.h>
  15. struct ast2500_reset_priv {
  16. struct ast2500_scu *scu;
  17. };
  18. static int ast2500_reset_assert(struct reset_ctl *reset_ctl)
  19. {
  20. struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  21. struct ast2500_scu *scu = priv->scu;
  22. debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
  23. if (reset_ctl->id < 32)
  24. setbits_le32(&scu->sysreset_ctrl1, BIT(reset_ctl->id));
  25. else
  26. setbits_le32(&scu->sysreset_ctrl2, BIT(reset_ctl->id - 32));
  27. return 0;
  28. }
  29. static int ast2500_reset_deassert(struct reset_ctl *reset_ctl)
  30. {
  31. struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  32. struct ast2500_scu *scu = priv->scu;
  33. debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
  34. if (reset_ctl->id < 32)
  35. clrbits_le32(&scu->sysreset_ctrl1, BIT(reset_ctl->id));
  36. else
  37. clrbits_le32(&scu->sysreset_ctrl2, BIT(reset_ctl->id - 32));
  38. return 0;
  39. }
  40. static int ast2500_reset_status(struct reset_ctl *reset_ctl)
  41. {
  42. struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
  43. struct ast2500_scu *scu = priv->scu;
  44. int status;
  45. debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
  46. if (reset_ctl->id < 32)
  47. status = BIT(reset_ctl->id) & readl(&scu->sysreset_ctrl1);
  48. else
  49. status = BIT(reset_ctl->id - 32) & readl(&scu->sysreset_ctrl2);
  50. return !!status;
  51. }
  52. static int ast2500_reset_probe(struct udevice *dev)
  53. {
  54. int rc;
  55. struct ast2500_reset_priv *priv = dev_get_priv(dev);
  56. struct udevice *scu_dev;
  57. /* get SCU base from clock device */
  58. rc = uclass_get_device_by_driver(UCLASS_CLK,
  59. DM_DRIVER_GET(aspeed_ast2500_scu), &scu_dev);
  60. if (rc) {
  61. debug("%s: clock device not found, rc=%d\n", __func__, rc);
  62. return rc;
  63. }
  64. priv->scu = devfdt_get_addr_ptr(scu_dev);
  65. if (IS_ERR_OR_NULL(priv->scu)) {
  66. debug("%s: invalid SCU base pointer\n", __func__);
  67. return PTR_ERR(priv->scu);
  68. }
  69. return 0;
  70. }
  71. static const struct udevice_id ast2500_reset_ids[] = {
  72. { .compatible = "aspeed,ast2500-reset" },
  73. { }
  74. };
  75. struct reset_ops ast2500_reset_ops = {
  76. .rst_assert = ast2500_reset_assert,
  77. .rst_deassert = ast2500_reset_deassert,
  78. .rst_status = ast2500_reset_status,
  79. };
  80. U_BOOT_DRIVER(ast2500_reset) = {
  81. .name = "ast2500_reset",
  82. .id = UCLASS_RESET,
  83. .of_match = ast2500_reset_ids,
  84. .probe = ast2500_reset_probe,
  85. .ops = &ast2500_reset_ops,
  86. .priv_auto = sizeof(struct ast2500_reset_priv),
  87. };