sysreset_x86.c 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
  4. *
  5. * Generic reset driver for x86 processor
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <efi_loader.h>
  10. #include <pch.h>
  11. #include <sysreset.h>
  12. #include <acpi/acpi_s3.h>
  13. #include <asm/io.h>
  14. #include <asm/processor.h>
  15. #include <asm/sysreset.h>
  16. /*
  17. * Power down the machine by using the power management sleep control
  18. * of the chipset. This will currently only work on Intel chipsets.
  19. * However, adapting it to new chipsets is fairly simple. You will
  20. * have to find the IO address of the power management register block
  21. * in your southbridge, and look up the appropriate SLP_TYP_S5 value
  22. * from your southbridge's data sheet.
  23. *
  24. * This function never returns.
  25. */
  26. int pch_sysreset_power_off(struct udevice *dev)
  27. {
  28. struct x86_sysreset_plat *plat = dev_get_plat(dev);
  29. struct pch_pmbase_info pm;
  30. u32 reg32;
  31. int ret;
  32. if (!plat->pch)
  33. return -ENOENT;
  34. ret = pch_ioctl(plat->pch, PCH_REQ_PMBASE_INFO, &pm, sizeof(pm));
  35. if (ret)
  36. return ret;
  37. /*
  38. * Mask interrupts or system might stay in a coma, not executing code
  39. * anymore, but not powered off either.
  40. */
  41. asm("cli");
  42. /*
  43. * Avoid any GPI waking the system from S5* or the system might stay in
  44. * a coma
  45. */
  46. outl(0x00000000, pm.base + pm.gpio0_en_ofs);
  47. /* Clear Power Button Status */
  48. outw(PWRBTN_STS, pm.base + pm.pm1_sts_ofs);
  49. /* PMBASE + 4, Bit 10-12, Sleeping Type, * set to 111 -> S5, soft_off */
  50. reg32 = inl(pm.base + pm.pm1_cnt_ofs);
  51. /* Set Sleeping Type to S5 (poweroff) */
  52. reg32 &= ~(SLP_EN | SLP_TYP);
  53. reg32 |= SLP_TYP_S5;
  54. outl(reg32, pm.base + pm.pm1_cnt_ofs);
  55. /* Now set the Sleep Enable bit */
  56. reg32 |= SLP_EN;
  57. outl(reg32, pm.base + pm.pm1_cnt_ofs);
  58. for (;;)
  59. asm("hlt");
  60. }
  61. static int x86_sysreset_request(struct udevice *dev, enum sysreset_t type)
  62. {
  63. int value;
  64. int ret;
  65. switch (type) {
  66. case SYSRESET_WARM:
  67. value = SYS_RST | RST_CPU;
  68. break;
  69. case SYSRESET_COLD:
  70. value = SYS_RST | RST_CPU | FULL_RST;
  71. break;
  72. case SYSRESET_POWER_OFF:
  73. ret = pch_sysreset_power_off(dev);
  74. if (ret)
  75. return ret;
  76. return -EINPROGRESS;
  77. default:
  78. return -ENOSYS;
  79. }
  80. outb(value, IO_PORT_RESET);
  81. return -EINPROGRESS;
  82. }
  83. static int x86_sysreset_get_last(struct udevice *dev)
  84. {
  85. return SYSRESET_POWER;
  86. }
  87. #ifdef CONFIG_EFI_LOADER
  88. void __efi_runtime EFIAPI efi_reset_system(
  89. enum efi_reset_type reset_type,
  90. efi_status_t reset_status,
  91. unsigned long data_size, void *reset_data)
  92. {
  93. int value;
  94. /*
  95. * inline this code since we are not caused in the context of a
  96. * udevice and passing NULL to x86_sysreset_request() is too horrible.
  97. */
  98. if (reset_type == EFI_RESET_COLD ||
  99. reset_type == EFI_RESET_PLATFORM_SPECIFIC)
  100. value = SYS_RST | RST_CPU | FULL_RST;
  101. else /* assume EFI_RESET_WARM since we cannot return an error */
  102. value = SYS_RST | RST_CPU;
  103. outb(value, IO_PORT_RESET);
  104. /* TODO EFI_RESET_SHUTDOWN */
  105. while (1) { }
  106. }
  107. #endif
  108. static int x86_sysreset_probe(struct udevice *dev)
  109. {
  110. struct x86_sysreset_plat *plat = dev_get_plat(dev);
  111. /*
  112. * Locate the PCH if there is one. It isn't essential. Avoid this before
  113. * relocation as we shouldn't need reset then and it needs a lot of
  114. * memory for PCI enumeration.
  115. */
  116. if (gd->flags & GD_FLG_RELOC)
  117. uclass_first_device(UCLASS_PCH, &plat->pch);
  118. return 0;
  119. }
  120. static const struct udevice_id x86_sysreset_ids[] = {
  121. { .compatible = "x86,reset" },
  122. { }
  123. };
  124. static struct sysreset_ops x86_sysreset_ops = {
  125. .request = x86_sysreset_request,
  126. .get_last = x86_sysreset_get_last,
  127. };
  128. U_BOOT_DRIVER(x86_reset) = {
  129. .name = "x86_reset",
  130. .id = UCLASS_SYSRESET,
  131. .of_match = x86_sysreset_ids,
  132. .ops = &x86_sysreset_ops,
  133. .probe = x86_sysreset_probe,
  134. .plat_auto = sizeof(struct x86_sysreset_plat),
  135. };