reg-file-data-sampling.rst 4.3 KB

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  1. ==================================
  2. Register File Data Sampling (RFDS)
  3. ==================================
  4. Register File Data Sampling (RFDS) is a microarchitectural vulnerability that
  5. only affects Intel Atom parts(also branded as E-cores). RFDS may allow
  6. a malicious actor to infer data values previously used in floating point
  7. registers, vector registers, or integer registers. RFDS does not provide the
  8. ability to choose which data is inferred. CVE-2023-28746 is assigned to RFDS.
  9. Affected Processors
  10. ===================
  11. Below is the list of affected Intel processors [#f1]_:
  12. =================== ============
  13. Common name Family_Model
  14. =================== ============
  15. ATOM_GOLDMONT 06_5CH
  16. ATOM_GOLDMONT_D 06_5FH
  17. ATOM_GOLDMONT_PLUS 06_7AH
  18. ATOM_TREMONT_D 06_86H
  19. ATOM_TREMONT 06_96H
  20. ALDERLAKE 06_97H
  21. ALDERLAKE_L 06_9AH
  22. ATOM_TREMONT_L 06_9CH
  23. RAPTORLAKE 06_B7H
  24. RAPTORLAKE_P 06_BAH
  25. ATOM_GRACEMONT 06_BEH
  26. RAPTORLAKE_S 06_BFH
  27. =================== ============
  28. As an exception to this table, Intel Xeon E family parts ALDERLAKE(06_97H) and
  29. RAPTORLAKE(06_B7H) codenamed Catlow are not affected. They are reported as
  30. vulnerable in Linux because they share the same family/model with an affected
  31. part. Unlike their affected counterparts, they do not enumerate RFDS_CLEAR or
  32. CPUID.HYBRID. This information could be used to distinguish between the
  33. affected and unaffected parts, but it is deemed not worth adding complexity as
  34. the reporting is fixed automatically when these parts enumerate RFDS_NO.
  35. Mitigation
  36. ==========
  37. Intel released a microcode update that enables software to clear sensitive
  38. information using the VERW instruction. Like MDS, RFDS deploys the same
  39. mitigation strategy to force the CPU to clear the affected buffers before an
  40. attacker can extract the secrets. This is achieved by using the otherwise
  41. unused and obsolete VERW instruction in combination with a microcode update.
  42. The microcode clears the affected CPU buffers when the VERW instruction is
  43. executed.
  44. Mitigation points
  45. -----------------
  46. VERW is executed by the kernel before returning to user space, and by KVM
  47. before VMentry. None of the affected cores support SMT, so VERW is not required
  48. at C-state transitions.
  49. New bits in IA32_ARCH_CAPABILITIES
  50. ----------------------------------
  51. Newer processors and microcode update on existing affected processors added new
  52. bits to IA32_ARCH_CAPABILITIES MSR. These bits can be used to enumerate
  53. vulnerability and mitigation capability:
  54. - Bit 27 - RFDS_NO - When set, processor is not affected by RFDS.
  55. - Bit 28 - RFDS_CLEAR - When set, processor is affected by RFDS, and has the
  56. microcode that clears the affected buffers on VERW execution.
  57. Mitigation control on the kernel command line
  58. ---------------------------------------------
  59. The kernel command line allows to control RFDS mitigation at boot time with the
  60. parameter "reg_file_data_sampling=". The valid arguments are:
  61. ========== =================================================================
  62. on If the CPU is vulnerable, enable mitigation; CPU buffer clearing
  63. on exit to userspace and before entering a VM.
  64. off Disables mitigation.
  65. ========== =================================================================
  66. Mitigation default is selected by CONFIG_MITIGATION_RFDS.
  67. Mitigation status information
  68. -----------------------------
  69. The Linux kernel provides a sysfs interface to enumerate the current
  70. vulnerability status of the system: whether the system is vulnerable, and
  71. which mitigations are active. The relevant sysfs file is:
  72. /sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling
  73. The possible values in this file are:
  74. .. list-table::
  75. * - 'Not affected'
  76. - The processor is not vulnerable
  77. * - 'Vulnerable'
  78. - The processor is vulnerable, but no mitigation enabled
  79. * - 'Vulnerable: No microcode'
  80. - The processor is vulnerable but microcode is not updated.
  81. * - 'Mitigation: Clear Register File'
  82. - The processor is vulnerable and the CPU buffer clearing mitigation is
  83. enabled.
  84. References
  85. ----------
  86. .. [#f1] Affected Processors
  87. https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html