arm,pl11x.yaml 4.8 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/arm,pl11x.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Arm PrimeCell Color LCD Controller PL110/PL111
  7. maintainers:
  8. - Liviu Dudau <Liviu.Dudau@arm.com>
  9. - Andre Przywara <andre.przywara@arm.com>
  10. description:
  11. The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
  12. a framebuffer region in system memory, and creates timed signals for
  13. a variety of LCD panels.
  14. # We need a select here so we don't match all nodes with 'arm,primecell'
  15. select:
  16. properties:
  17. compatible:
  18. contains:
  19. enum:
  20. - arm,pl110
  21. - arm,pl111
  22. required:
  23. - compatible
  24. properties:
  25. compatible:
  26. items:
  27. - enum:
  28. - arm,pl110
  29. - arm,pl111
  30. - const: arm,primecell
  31. reg:
  32. maxItems: 1
  33. interrupt-names:
  34. oneOf:
  35. - const: combined
  36. description:
  37. The IP provides four individual interrupt lines, but also one
  38. combined line. If the integration only connects this line to the
  39. interrupt controller, this single interrupt is noted here.
  40. - items:
  41. - const: mbe # CLCDMBEINTR
  42. - const: vcomp # CLCDVCOMPINTR
  43. - const: lnbu # CLCDLNBUINTR
  44. - const: fuf # CLCDFUFINTR
  45. interrupts:
  46. minItems: 1
  47. maxItems: 4
  48. clock-names:
  49. items:
  50. - const: clcdclk
  51. - const: apb_pclk
  52. clocks:
  53. items:
  54. - description: The CLCDCLK reference clock for the controller.
  55. - description: The HCLK AHB slave clock for the register access.
  56. memory-region:
  57. maxItems: 1
  58. description:
  59. Phandle to a node describing memory to be used for the framebuffer.
  60. If not present, the framebuffer may be located anywhere in memory.
  61. max-memory-bandwidth:
  62. $ref: /schemas/types.yaml#/definitions/uint32
  63. description:
  64. Maximum bandwidth in bytes per second that the cell's memory interface
  65. can handle.
  66. If not present, the memory interface is fast enough to handle all
  67. possible video modes.
  68. port:
  69. $ref: /schemas/graph.yaml#/$defs/port-base
  70. additionalProperties: false
  71. description:
  72. Output endpoint of the controller, connecting the LCD panel signals.
  73. properties:
  74. endpoint:
  75. $ref: /schemas/graph.yaml#/$defs/endpoint-base
  76. unevaluatedProperties: false
  77. properties:
  78. arm,pl11x,tft-r0g0b0-pads:
  79. $ref: /schemas/types.yaml#/definitions/uint32-array
  80. items:
  81. - description: index of CLD pad used for first red bit (R0)
  82. - description: index of CLD pad used for first green bit (G0)
  83. - description: index of CLD pad used for first blue bit (G0)
  84. deprecated: true
  85. description: |
  86. DEPRECATED. An array of three 32-bit values, defining the way
  87. CLD[23:0] pads are wired up.
  88. The first value contains the index of the "CLD" external pin (pad)
  89. used as R0 (first bit of the red component), the second value for
  90. green, the third value for blue.
  91. See also "LCD panel signal multiplexing details" paragraphs in the
  92. PL110/PL111 Technical Reference Manuals.
  93. This implicitly defines available color modes, for example:
  94. - PL111 TFT 4:4:4 panel:
  95. arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
  96. - PL110 TFT (1:)5:5:5 panel:
  97. arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
  98. - PL111 TFT (1:)5:5:5 panel:
  99. arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
  100. - PL111 TFT 5:6:5 panel:
  101. arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
  102. - PL110 and PL111 TFT 8:8:8 panel:
  103. arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
  104. - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
  105. arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
  106. additionalProperties: false
  107. required:
  108. - compatible
  109. - reg
  110. - clock-names
  111. - clocks
  112. - port
  113. allOf:
  114. - if:
  115. properties:
  116. interrupts:
  117. minItems: 2
  118. required:
  119. - interrupts
  120. then:
  121. required:
  122. - interrupt-names
  123. examples:
  124. - |
  125. clcd@10020000 {
  126. compatible = "arm,pl111", "arm,primecell";
  127. reg = <0x10020000 0x1000>;
  128. interrupt-names = "combined";
  129. interrupts = <44>;
  130. clocks = <&oscclk1>, <&oscclk2>;
  131. clock-names = "clcdclk", "apb_pclk";
  132. max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
  133. port {
  134. clcd_pads: endpoint {
  135. remote-endpoint = <&clcd_panel>;
  136. };
  137. };
  138. };
  139. panel {
  140. compatible = "arm,rtsm-display";
  141. port {
  142. clcd_panel: endpoint {
  143. remote-endpoint = <&clcd_pads>;
  144. };
  145. };
  146. };
  147. ...