samsung,fimd.yaml 5.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/samsung/samsung,fimd.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Samsung S3C/S5P/Exynos SoC Fully Interactive Mobile Display (FIMD)
  7. maintainers:
  8. - Inki Dae <inki.dae@samsung.com>
  9. - Seung-Woo Kim <sw0312.kim@samsung.com>
  10. - Kyungmin Park <kyungmin.park@samsung.com>
  11. - Krzysztof Kozlowski <krzk@kernel.org>
  12. properties:
  13. compatible:
  14. enum:
  15. - samsung,s3c2443-fimd
  16. - samsung,s3c6400-fimd
  17. - samsung,s5pv210-fimd
  18. - samsung,exynos3250-fimd
  19. - samsung,exynos4210-fimd
  20. - samsung,exynos5250-fimd
  21. - samsung,exynos5420-fimd
  22. '#address-cells':
  23. const: 1
  24. clocks:
  25. maxItems: 2
  26. clock-names:
  27. items:
  28. - const: sclk_fimd
  29. - const: fimd
  30. display-timings:
  31. $ref: ../panel/display-timings.yaml#
  32. i80-if-timings:
  33. type: object
  34. additionalProperties: false
  35. description: |
  36. Timing configuration for lcd i80 interface support.
  37. The parameters are defined as::
  38. VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|??
  39. : : : : :
  40. Address Output --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX
  41. | cs-setup+1 | : : :
  42. |<---------->| : : :
  43. Chip Select ???????????????|____________:____________:____________|??
  44. | wr-setup+1 | | wr-hold+1 |
  45. |<---------->| |<---------->|
  46. Write Enable ????????????????????????????|____________|???????????????
  47. | wr-active+1|
  48. |<---------->|
  49. Video Data ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>--
  50. properties:
  51. cs-setup:
  52. $ref: /schemas/types.yaml#/definitions/uint32
  53. description:
  54. Clock cycles for the active period of address signal is enabled until
  55. chip select is enabled.
  56. default: 0
  57. wr-active:
  58. $ref: /schemas/types.yaml#/definitions/uint32
  59. description:
  60. Clock cycles for the active period of CS is enabled.
  61. default: 1
  62. wr-hold:
  63. $ref: /schemas/types.yaml#/definitions/uint32
  64. description:
  65. Clock cycles for the active period of CS is disabled until write
  66. signal is disabled.
  67. default: 0
  68. wr-setup:
  69. $ref: /schemas/types.yaml#/definitions/uint32
  70. description:
  71. Clock cycles for the active period of CS signal is enabled until
  72. write signal is enabled.
  73. default: 0
  74. iommus:
  75. minItems: 1
  76. maxItems: 2
  77. iommu-names:
  78. items:
  79. - const: m0
  80. - const: m1
  81. interrupts:
  82. items:
  83. - description: FIFO level
  84. - description: VSYNC
  85. - description: LCD system
  86. interrupt-names:
  87. items:
  88. - const: fifo
  89. - const: vsync
  90. - const: lcd_sys
  91. power-domains:
  92. maxItems: 1
  93. reg:
  94. maxItems: 1
  95. samsung,invert-vden:
  96. type: boolean
  97. description:
  98. Video enable signal is inverted.
  99. samsung,invert-vclk:
  100. type: boolean
  101. description:
  102. Video clock signal is inverted.
  103. samsung,sysreg:
  104. $ref: /schemas/types.yaml#/definitions/phandle
  105. description:
  106. Phandle to System Register syscon.
  107. '#size-cells':
  108. const: 0
  109. patternProperties:
  110. "^port@[0-4]+$":
  111. $ref: /schemas/graph.yaml#/properties/port
  112. description: |
  113. Contains ports with port with index::
  114. 0 - for CAMIF0 input,
  115. 1 - for CAMIF1 input,
  116. 2 - for CAMIF2 input,
  117. 3 - for parallel output,
  118. 4 - for write-back interface
  119. required:
  120. - compatible
  121. - clocks
  122. - clock-names
  123. - interrupts
  124. - interrupt-names
  125. - reg
  126. allOf:
  127. - if:
  128. properties:
  129. compatible:
  130. contains:
  131. const: samsung,exynos5420-fimd
  132. then:
  133. properties:
  134. iommus:
  135. minItems: 2
  136. maxItems: 2
  137. additionalProperties: false
  138. examples:
  139. - |
  140. #include <dt-bindings/clock/exynos4.h>
  141. fimd@11c00000 {
  142. compatible = "samsung,exynos4210-fimd";
  143. interrupt-parent = <&combiner>;
  144. reg = <0x11c00000 0x20000>;
  145. interrupt-names = "fifo", "vsync", "lcd_sys";
  146. interrupts = <11 0>, <11 1>, <11 2>;
  147. clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
  148. clock-names = "sclk_fimd", "fimd";
  149. power-domains = <&pd_lcd0>;
  150. iommus = <&sysmmu_fimd0>;
  151. samsung,sysreg = <&sys_reg>;
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. samsung,invert-vden;
  155. samsung,invert-vclk;
  156. pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
  157. pinctrl-names = "default";
  158. port@3 {
  159. reg = <3>;
  160. fimd_dpi_ep: endpoint {
  161. remote-endpoint = <&lcd_ep>;
  162. };
  163. };
  164. };