st,stm32mp25-lvds.yaml 3.0 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: STMicroelectronics STM32 LVDS Display Interface Transmitter
  7. maintainers:
  8. - Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
  9. - Yannick Fertre <yannick.fertre@foss.st.com>
  10. description: |
  11. The STMicroelectronics STM32 LVDS Display Interface Transmitter handles the
  12. LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC)
  13. onto the LVDS PHY.
  14. It is composed of three sub blocks:
  15. - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input
  16. pixels onto the data lanes of the PHY
  17. - LVDS PHY: parallelize the data and drives the LVDS data lanes
  18. - LVDS wrapper: handles top-level settings
  19. The LVDS controller driver supports the following high-level features:
  20. - FDP-Link-I and OpenLDI (v0.95) protocols
  21. - Single-Link or Dual-Link operation
  22. - Single-Display or Double-Display (with the same content duplicated on both)
  23. - Flexible Bit-Mapping, including JEIDA and VESA
  24. - RGB888 or RGB666 output
  25. - Synchronous design, with one input pixel per clock cycle
  26. properties:
  27. compatible:
  28. const: st,stm32mp25-lvds
  29. "#clock-cells":
  30. const: 0
  31. description:
  32. Provides the internal LVDS PHY clock to the framework.
  33. reg:
  34. maxItems: 1
  35. clocks:
  36. items:
  37. - description: APB peripheral clock
  38. - description: Reference clock for the internal PLL
  39. clock-names:
  40. items:
  41. - const: pclk
  42. - const: ref
  43. resets:
  44. maxItems: 1
  45. ports:
  46. $ref: /schemas/graph.yaml#/properties/ports
  47. properties:
  48. port@0:
  49. $ref: /schemas/graph.yaml#/properties/port
  50. description:
  51. LVDS input port node, connected to the LTDC RGB output port.
  52. port@1:
  53. $ref: /schemas/graph.yaml#/properties/port
  54. description:
  55. LVDS output port node, connected to a panel or bridge input port.
  56. required:
  57. - port@0
  58. - port@1
  59. required:
  60. - compatible
  61. - "#clock-cells"
  62. - reg
  63. - clocks
  64. - clock-names
  65. - resets
  66. - ports
  67. additionalProperties: false
  68. examples:
  69. - |
  70. #include <dt-bindings/clock/st,stm32mp25-rcc.h>
  71. #include <dt-bindings/reset/st,stm32mp25-rcc.h>
  72. lvds: lvds@48060000 {
  73. compatible = "st,stm32mp25-lvds";
  74. reg = <0x48060000 0x2000>;
  75. #clock-cells = <0>;
  76. clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>;
  77. clock-names = "pclk", "ref";
  78. resets = <&rcc LVDS_R>;
  79. ports {
  80. #address-cells = <1>;
  81. #size-cells = <0>;
  82. port@0 {
  83. reg = <0>;
  84. lvds_in: endpoint {
  85. remote-endpoint = <&ltdc_ep1_out>;
  86. };
  87. };
  88. port@1 {
  89. reg = <1>;
  90. lvds_out0: endpoint {
  91. remote-endpoint = <&lvds_panel_in>;
  92. };
  93. };
  94. };
  95. };
  96. ...