ti,k2g-dss.yaml 2.5 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. # Copyright 2019 Texas Instruments Incorporated
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: Texas Instruments K2G Display Subsystem
  8. maintainers:
  9. - Jyri Sarha <jsarha@ti.com>
  10. - Tomi Valkeinen <tomi.valkeinen@ti.com>
  11. description: |
  12. The K2G DSS is an ultra-light version of TI Keystone Display
  13. SubSystem. It has only one output port and video plane. The
  14. output is DPI.
  15. properties:
  16. compatible:
  17. const: ti,k2g-dss
  18. reg:
  19. items:
  20. - description: cfg DSS top level
  21. - description: common DISPC common
  22. - description: VID1 video plane 1
  23. - description: OVR1 overlay manager for vp1
  24. - description: VP1 video port 1
  25. reg-names:
  26. items:
  27. - const: cfg
  28. - const: common
  29. - const: vid1
  30. - const: ovr1
  31. - const: vp1
  32. clocks:
  33. items:
  34. - description: fck DSS functional clock
  35. - description: vp1 Video Port 1 pixel clock
  36. clock-names:
  37. items:
  38. - const: fck
  39. - const: vp1
  40. interrupts:
  41. maxItems: 1
  42. power-domains:
  43. maxItems: 1
  44. description: phandle to the associated power domain
  45. port:
  46. $ref: /schemas/graph.yaml#/properties/port
  47. description:
  48. The DSS DPI output port node
  49. max-memory-bandwidth:
  50. $ref: /schemas/types.yaml#/definitions/uint32
  51. description:
  52. Input memory (from main memory to dispc) bandwidth limit in
  53. bytes per second
  54. required:
  55. - compatible
  56. - reg
  57. - reg-names
  58. - clocks
  59. - clock-names
  60. - interrupts
  61. - port
  62. additionalProperties: false
  63. examples:
  64. - |
  65. #include <dt-bindings/interrupt-controller/arm-gic.h>
  66. #include <dt-bindings/interrupt-controller/irq.h>
  67. dss: dss@2540000 {
  68. compatible = "ti,k2g-dss";
  69. reg = <0x02540000 0x400>,
  70. <0x02550000 0x1000>,
  71. <0x02557000 0x1000>,
  72. <0x0255a800 0x100>,
  73. <0x0255ac00 0x100>;
  74. reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
  75. clocks = <&k2g_clks 0x2 0>,
  76. <&k2g_clks 0x2 1>;
  77. clock-names = "fck", "vp1";
  78. interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
  79. power-domains = <&k2g_pds 0x2>;
  80. max-memory-bandwidth = <230000000>;
  81. port {
  82. dpi_out: endpoint {
  83. remote-endpoint = <&sii9022_in>;
  84. };
  85. };
  86. };