gpio-davinci.yaml 5.5 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: GPIO controller for Davinci and keystone devices
  7. maintainers:
  8. - Keerthy <j-keerthy@ti.com>
  9. properties:
  10. compatible:
  11. oneOf:
  12. - items:
  13. - enum:
  14. - ti,k2g-gpio
  15. - ti,am654-gpio
  16. - ti,j721e-gpio
  17. - ti,am64-gpio
  18. - const: ti,keystone-gpio
  19. - items:
  20. - enum:
  21. - ti,dm6441-gpio
  22. - ti,keystone-gpio
  23. reg:
  24. maxItems: 1
  25. gpio-controller: true
  26. gpio-ranges: true
  27. gpio-reserved-ranges: true
  28. gpio-line-names:
  29. description: strings describing the names of each gpio line.
  30. minItems: 1
  31. maxItems: 144
  32. "#gpio-cells":
  33. const: 2
  34. description:
  35. first cell is the pin number and second cell is used to specify optional parameters (unused).
  36. interrupts:
  37. description:
  38. The interrupts are specified as per the interrupt parent. Only banked
  39. or unbanked IRQs are supported at a time. If the interrupts are
  40. banked then provide list of interrupts corresponding to each bank, else
  41. provide the list of interrupts for each gpio.
  42. minItems: 1
  43. maxItems: 100
  44. ti,ngpio:
  45. $ref: /schemas/types.yaml#/definitions/uint32
  46. description: The number of GPIO pins supported consecutively.
  47. minimum: 1
  48. ti,davinci-gpio-unbanked:
  49. $ref: /schemas/types.yaml#/definitions/uint32
  50. description: The number of GPIOs that have an individual interrupt line to processor.
  51. minimum: 0
  52. clocks:
  53. maxItems: 1
  54. clock-names:
  55. const: gpio
  56. interrupt-controller: true
  57. power-domains:
  58. maxItems: 1
  59. "#interrupt-cells":
  60. const: 2
  61. patternProperties:
  62. "^(.+-hog(-[0-9]+)?)$":
  63. type: object
  64. required:
  65. - gpio-hog
  66. required:
  67. - compatible
  68. - reg
  69. - gpio-controller
  70. - "#gpio-cells"
  71. - interrupts
  72. - ti,ngpio
  73. - ti,davinci-gpio-unbanked
  74. - clocks
  75. - clock-names
  76. additionalProperties: false
  77. examples:
  78. - |
  79. #include<dt-bindings/interrupt-controller/arm-gic.h>
  80. gpio0: gpio@2603000 {
  81. compatible = "ti,k2g-gpio", "ti,keystone-gpio";
  82. reg = <0x02603000 0x100>;
  83. gpio-controller;
  84. #gpio-cells = <2>;
  85. interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
  86. <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
  87. <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
  88. <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
  89. <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
  90. <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
  91. <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
  92. <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
  93. <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
  94. interrupt-controller;
  95. #interrupt-cells = <2>;
  96. ti,ngpio = <144>;
  97. ti,davinci-gpio-unbanked = <0>;
  98. clocks = <&k2g_clks 0x001b 0x0>;
  99. clock-names = "gpio";
  100. };
  101. - |
  102. #include<dt-bindings/interrupt-controller/arm-gic.h>
  103. gpio1: gpio@260bf00 {
  104. compatible = "ti,keystone-gpio";
  105. reg = <0x0260bf00 0x100>;
  106. gpio-controller;
  107. #gpio-cells = <2>;
  108. /* HW Interrupts mapped to GPIO pins */
  109. interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
  110. <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
  111. <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
  112. <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
  113. <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
  114. <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
  115. <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
  116. <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
  117. <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
  118. <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
  119. <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
  120. <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
  121. <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
  122. <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
  123. <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
  124. <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
  125. <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
  126. <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
  127. <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
  128. <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
  129. <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
  130. <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
  131. <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
  132. <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
  133. <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
  134. <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
  135. <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
  136. <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
  137. <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
  138. <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
  139. <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
  140. <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
  141. clocks = <&clkgpio>;
  142. clock-names = "gpio";
  143. ti,ngpio = <32>;
  144. ti,davinci-gpio-unbanked = <32>;
  145. };
  146. - |
  147. wkup_gpio0: gpio0@42110000 {
  148. compatible = "ti,am654-gpio", "ti,keystone-gpio";
  149. reg = <0x42110000 0x100>;
  150. gpio-controller;
  151. #gpio-cells = <2>;
  152. interrupt-parent = <&intr_wkup_gpio>;
  153. interrupts = <60>, <61>, <62>, <63>;
  154. interrupt-controller;
  155. #interrupt-cells = <2>;
  156. ti,ngpio = <56>;
  157. ti,davinci-gpio-unbanked = <0>;
  158. clocks = <&k3_clks 59 0>;
  159. clock-names = "gpio";
  160. };