qcom-ipcc.yaml 2.4 KB

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  1. # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller
  7. maintainers:
  8. - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  9. description:
  10. The Inter-Processor Communication Controller (IPCC) is a centralized hardware
  11. to route interrupts across various subsystems. It involves a three-level
  12. addressing scheme called protocol, client and signal. For example, consider an
  13. entity on the Application Processor Subsystem (APSS) that wants to listen to
  14. Modem's interrupts via Shared Memory Point to Point (SMP2P) interface. In such
  15. a case, the client would be Modem (client-id is 2) and the signal would be
  16. SMP2P (signal-id is 2). The SMP2P itself falls under the Multiprocessor (MPROC)
  17. protocol (protocol-id is 0). Refer include/dt-bindings/mailbox/qcom-ipcc.h
  18. for the list of such IDs.
  19. properties:
  20. compatible:
  21. items:
  22. - enum:
  23. - qcom,qcs8300-ipcc
  24. - qcom,qdu1000-ipcc
  25. - qcom,sa8255p-ipcc
  26. - qcom,sa8775p-ipcc
  27. - qcom,sc7280-ipcc
  28. - qcom,sc8280xp-ipcc
  29. - qcom,sdx75-ipcc
  30. - qcom,sm6350-ipcc
  31. - qcom,sm6375-ipcc
  32. - qcom,sm8250-ipcc
  33. - qcom,sm8350-ipcc
  34. - qcom,sm8450-ipcc
  35. - qcom,sm8550-ipcc
  36. - qcom,sm8650-ipcc
  37. - qcom,x1e80100-ipcc
  38. - const: qcom,ipcc
  39. reg:
  40. maxItems: 1
  41. interrupts:
  42. maxItems: 1
  43. interrupt-controller: true
  44. "#interrupt-cells":
  45. const: 3
  46. description:
  47. The first cell is the client-id, the second cell is the signal-id and the
  48. third cell is the interrupt type.
  49. "#mbox-cells":
  50. const: 2
  51. description:
  52. The first cell is the client-id, and the second cell is the signal-id.
  53. required:
  54. - compatible
  55. - reg
  56. - interrupts
  57. - interrupt-controller
  58. - "#interrupt-cells"
  59. - "#mbox-cells"
  60. additionalProperties: false
  61. examples:
  62. - |
  63. #include <dt-bindings/interrupt-controller/arm-gic.h>
  64. #include <dt-bindings/mailbox/qcom-ipcc.h>
  65. mailbox@408000 {
  66. compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
  67. reg = <0x408000 0x1000>;
  68. interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
  69. interrupt-controller;
  70. #interrupt-cells = <3>;
  71. #mbox-cells = <2>;
  72. };