mmc-controller.yaml 12 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: MMC Controller Common Properties
  7. maintainers:
  8. - Ulf Hansson <ulf.hansson@linaro.org>
  9. description: |
  10. These properties are common to multiple MMC host controllers. Any host
  11. that requires the respective functionality should implement them using
  12. these definitions.
  13. It is possible to assign a fixed index mmcN to an MMC host controller
  14. (and the corresponding mmcblkN devices) by defining an alias in the
  15. /aliases device tree node.
  16. properties:
  17. $nodename:
  18. pattern: "^mmc(@.*)?$"
  19. "#address-cells":
  20. const: 1
  21. description: |
  22. The cell is the SDIO function number if a function subnode is used.
  23. "#size-cells":
  24. const: 0
  25. # Card Detection.
  26. # If none of these properties are supplied, the host native card
  27. # detect will be used. Only one of them should be provided.
  28. broken-cd:
  29. $ref: /schemas/types.yaml#/definitions/flag
  30. description:
  31. There is no card detection available; polling must be used.
  32. cd-gpios:
  33. maxItems: 1
  34. description:
  35. The card detection will be done using the GPIO provided.
  36. non-removable:
  37. $ref: /schemas/types.yaml#/definitions/flag
  38. description:
  39. Non-removable slot (like eMMC); assume always present.
  40. # *NOTE* on CD and WP polarity. To use common for all SD/MMC host
  41. # controllers line polarity properties, we have to fix the meaning
  42. # of the "normal" and "inverted" line levels. We choose to follow
  43. # the SDHCI standard, which specifies both those lines as "active
  44. # low." Therefore, using the "cd-inverted" property means, that the
  45. # CD line is active high, i.e. it is high, when a card is
  46. # inserted. Similar logic applies to the "wp-inverted" property.
  47. #
  48. # CD and WP lines can be implemented on the hardware in one of two
  49. # ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or
  50. # as dedicated pins. Polarity of dedicated pins can be specified,
  51. # using *-inverted properties. GPIO polarity can also be specified
  52. # using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the
  53. # latter case. We choose to use the XOR logic for GPIO CD and WP
  54. # lines. This means, the two properties are "superimposed," for
  55. # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the
  56. # respective *-inverted property property results in a
  57. # double-inversion and actually means the "normal" line polarity is
  58. # in effect.
  59. wp-inverted:
  60. $ref: /schemas/types.yaml#/definitions/flag
  61. description:
  62. The Write Protect line polarity is inverted.
  63. cd-inverted:
  64. $ref: /schemas/types.yaml#/definitions/flag
  65. description:
  66. The CD line polarity is inverted.
  67. # Other properties
  68. bus-width:
  69. description:
  70. Number of data lines.
  71. $ref: /schemas/types.yaml#/definitions/uint32
  72. enum: [1, 4, 8]
  73. default: 1
  74. max-frequency:
  75. description: |
  76. Maximum operating frequency of the bus:
  77. - for eMMC, the maximum supported frequency is 200MHz,
  78. - for SD/SDIO cards the SDR104 mode has a max supported
  79. frequency of 208MHz,
  80. - some mmc host controllers do support a max frequency upto
  81. 384MHz.
  82. So, lets keep the maximum supported value here.
  83. $ref: /schemas/types.yaml#/definitions/uint32
  84. minimum: 400000
  85. maximum: 384000000
  86. disable-wp:
  87. $ref: /schemas/types.yaml#/definitions/flag
  88. description:
  89. When set, no physical write-protect line is present. This
  90. property should only be specified when the controller has a
  91. dedicated write-protect detection logic. If a GPIO is always used
  92. for the write-protect detection logic, it is sufficient to not
  93. specify the wp-gpios property in the absence of a write-protect
  94. line. Not used in combination with eMMC or SDIO.
  95. wp-gpios:
  96. maxItems: 1
  97. description:
  98. GPIO to use for the write-protect detection.
  99. cd-debounce-delay-ms:
  100. description:
  101. Set delay time before detecting card after card insert
  102. interrupt.
  103. no-1-8-v:
  104. $ref: /schemas/types.yaml#/definitions/flag
  105. description:
  106. When specified, denotes that 1.8V card voltage is not supported
  107. on this system, even if the controller claims it.
  108. cap-sd-highspeed:
  109. $ref: /schemas/types.yaml#/definitions/flag
  110. description:
  111. SD high-speed timing is supported.
  112. cap-mmc-highspeed:
  113. $ref: /schemas/types.yaml#/definitions/flag
  114. description:
  115. MMC high-speed timing is supported.
  116. sd-uhs-sdr12:
  117. $ref: /schemas/types.yaml#/definitions/flag
  118. description:
  119. SD UHS SDR12 speed is supported.
  120. sd-uhs-sdr25:
  121. $ref: /schemas/types.yaml#/definitions/flag
  122. description:
  123. SD UHS SDR25 speed is supported.
  124. sd-uhs-sdr50:
  125. $ref: /schemas/types.yaml#/definitions/flag
  126. description:
  127. SD UHS SDR50 speed is supported.
  128. sd-uhs-sdr104:
  129. $ref: /schemas/types.yaml#/definitions/flag
  130. description:
  131. SD UHS SDR104 speed is supported.
  132. sd-uhs-ddr50:
  133. $ref: /schemas/types.yaml#/definitions/flag
  134. description:
  135. SD UHS DDR50 speed is supported.
  136. cap-power-off-card:
  137. $ref: /schemas/types.yaml#/definitions/flag
  138. description:
  139. Powering off the card is safe.
  140. cap-mmc-hw-reset:
  141. $ref: /schemas/types.yaml#/definitions/flag
  142. description:
  143. eMMC hardware reset is supported
  144. cap-sdio-irq:
  145. $ref: /schemas/types.yaml#/definitions/flag
  146. description:
  147. enable SDIO IRQ signalling on this interface
  148. full-pwr-cycle:
  149. $ref: /schemas/types.yaml#/definitions/flag
  150. description:
  151. Full power cycle of the card is supported.
  152. full-pwr-cycle-in-suspend:
  153. $ref: /schemas/types.yaml#/definitions/flag
  154. description:
  155. Full power cycle of the card in suspend is supported.
  156. mmc-ddr-1_2v:
  157. $ref: /schemas/types.yaml#/definitions/flag
  158. description:
  159. eMMC high-speed DDR mode (1.2V I/O) is supported.
  160. mmc-ddr-1_8v:
  161. $ref: /schemas/types.yaml#/definitions/flag
  162. description:
  163. eMMC high-speed DDR mode (1.8V I/O) is supported.
  164. mmc-ddr-3_3v:
  165. $ref: /schemas/types.yaml#/definitions/flag
  166. description:
  167. eMMC high-speed DDR mode (3.3V I/O) is supported.
  168. mmc-hs200-1_2v:
  169. $ref: /schemas/types.yaml#/definitions/flag
  170. description:
  171. eMMC HS200 mode (1.2V I/O) is supported.
  172. mmc-hs200-1_8v:
  173. $ref: /schemas/types.yaml#/definitions/flag
  174. description:
  175. eMMC HS200 mode (1.8V I/O) is supported.
  176. mmc-hs400-1_2v:
  177. $ref: /schemas/types.yaml#/definitions/flag
  178. description:
  179. eMMC HS400 mode (1.2V I/O) is supported.
  180. mmc-hs400-1_8v:
  181. $ref: /schemas/types.yaml#/definitions/flag
  182. description:
  183. eMMC HS400 mode (1.8V I/O) is supported.
  184. mmc-hs400-enhanced-strobe:
  185. $ref: /schemas/types.yaml#/definitions/flag
  186. description:
  187. eMMC HS400 enhanced strobe mode is supported
  188. no-mmc-hs400:
  189. $ref: /schemas/types.yaml#/definitions/flag
  190. description:
  191. All eMMC HS400 modes are not supported.
  192. dsr:
  193. description:
  194. Value the card Driver Stage Register (DSR) should be programmed
  195. with.
  196. $ref: /schemas/types.yaml#/definitions/uint32
  197. minimum: 0
  198. maximum: 0xffff
  199. no-sdio:
  200. $ref: /schemas/types.yaml#/definitions/flag
  201. description:
  202. Controller is limited to send SDIO commands during
  203. initialization.
  204. no-sd:
  205. $ref: /schemas/types.yaml#/definitions/flag
  206. description:
  207. Controller is limited to send SD commands during initialization.
  208. no-mmc:
  209. $ref: /schemas/types.yaml#/definitions/flag
  210. description:
  211. Controller is limited to send MMC commands during
  212. initialization.
  213. fixed-emmc-driver-type:
  214. description:
  215. For non-removable eMMC, enforce this driver type. The value is
  216. the driver type as specified in the eMMC specification (table
  217. 206 in spec version 5.1)
  218. $ref: /schemas/types.yaml#/definitions/uint32
  219. minimum: 0
  220. maximum: 4
  221. post-power-on-delay-ms:
  222. description:
  223. It was invented for MMC pwrseq-simple which could be referred to
  224. mmc-pwrseq-simple.yaml. But now it\'s reused as a tunable delay
  225. waiting for I/O signalling and card power supply to be stable,
  226. regardless of whether pwrseq-simple is used. Default to 10ms if
  227. no available.
  228. default: 10
  229. supports-cqe:
  230. $ref: /schemas/types.yaml#/definitions/flag
  231. description:
  232. The presence of this property indicates that the corresponding
  233. MMC host controller supports HW command queue feature.
  234. disable-cqe-dcmd:
  235. $ref: /schemas/types.yaml#/definitions/flag
  236. description:
  237. The presence of this property indicates that the MMC
  238. controller\'s command queue engine (CQE) does not support direct
  239. commands (DCMDs).
  240. keep-power-in-suspend:
  241. $ref: /schemas/types.yaml#/definitions/flag
  242. description:
  243. SDIO only. Preserves card power during a suspend/resume cycle.
  244. wakeup-source:
  245. $ref: /schemas/types.yaml#/definitions/flag
  246. description:
  247. SDIO only. Enables wake up of host system on SDIO IRQ assertion.
  248. vmmc-supply:
  249. description:
  250. Supply for the card power
  251. vqmmc-supply:
  252. description:
  253. Supply for the bus IO line power, such as a level shifter.
  254. If the level shifter is controlled by a GPIO line, this shall
  255. be modeled as a "regulator-fixed" with a GPIO line for
  256. switching the level shifter on/off.
  257. mmc-pwrseq:
  258. $ref: /schemas/types.yaml#/definitions/phandle
  259. description:
  260. System-on-Chip designs may specify a specific MMC power
  261. sequence. To successfully detect an (e)MMC/SD/SDIO card, that
  262. power sequence must be maintained while initializing the card.
  263. patternProperties:
  264. "^.*@[0-9]+$":
  265. type: object
  266. description: |
  267. On embedded systems the cards connected to a host may need
  268. additional properties. These can be specified in subnodes to the
  269. host controller node. The subnodes are identified by the
  270. standard \'reg\' property. Which information exactly can be
  271. specified depends on the bindings for the SDIO function driver
  272. for the subnode, as specified by the compatible string.
  273. properties:
  274. compatible:
  275. description: |
  276. Name of SDIO function following generic names recommended
  277. practice
  278. reg:
  279. items:
  280. - minimum: 0
  281. maximum: 7
  282. description:
  283. Must contain the SDIO function number of the function this
  284. subnode describes. A value of 0 denotes the memory SD
  285. function, values from 1 to 7 denote the SDIO functions.
  286. required:
  287. - reg
  288. "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
  289. $ref: /schemas/types.yaml#/definitions/uint32-array
  290. minItems: 2
  291. maxItems: 2
  292. items:
  293. minimum: 0
  294. maximum: 359
  295. description:
  296. Set the clock (phase) delays which are to be configured in the
  297. controller while switching to particular speed mode. These values
  298. are in pair of degrees.
  299. dependencies:
  300. cd-debounce-delay-ms: [ cd-gpios ]
  301. fixed-emmc-driver-type: [ non-removable ]
  302. additionalProperties: true
  303. examples:
  304. - |
  305. mmc3: mmc@1c12000 {
  306. #address-cells = <1>;
  307. #size-cells = <0>;
  308. reg = <0x1c12000 0x200>;
  309. pinctrl-names = "default";
  310. pinctrl-0 = <&mmc3_pins_a>;
  311. vmmc-supply = <&reg_vmmc3>;
  312. bus-width = <4>;
  313. non-removable;
  314. mmc-pwrseq = <&sdhci0_pwrseq>;
  315. brcmf: wifi@1 {
  316. reg = <1>;
  317. compatible = "brcm,bcm4329-fmac";
  318. interrupt-parent = <&pio>;
  319. interrupts = <10 8>;
  320. interrupt-names = "host-wake";
  321. };
  322. };