intel,lgm-emmc-phy.yaml 1.6 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Intel Lightning Mountain(LGM) eMMC PHY
  7. maintainers:
  8. - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
  9. description: |+
  10. Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
  11. node is used to reference the base address of eMMC phy registers.
  12. The eMMC PHY node should be the child of a syscon node with the
  13. required property:
  14. - compatible: Should be one of the following:
  15. "intel,lgm-syscon", "syscon"
  16. - reg:
  17. maxItems: 1
  18. properties:
  19. compatible:
  20. enum:
  21. - intel,lgm-emmc-phy
  22. - intel,keembay-emmc-phy
  23. "#phy-cells":
  24. const: 0
  25. reg:
  26. maxItems: 1
  27. clocks:
  28. maxItems: 1
  29. clock-names:
  30. items:
  31. - const: emmcclk
  32. required:
  33. - "#phy-cells"
  34. - compatible
  35. - reg
  36. - clocks
  37. additionalProperties: false
  38. examples:
  39. - |
  40. sysconf: chiptop@e0200000 {
  41. compatible = "intel,lgm-syscon", "syscon";
  42. reg = <0xe0200000 0x100>;
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. emmc_phy: emmc-phy@a8 {
  46. compatible = "intel,lgm-emmc-phy";
  47. reg = <0x00a8 0x10>;
  48. clocks = <&emmc>;
  49. #phy-cells = <0>;
  50. };
  51. };
  52. - |
  53. phy@20290000 {
  54. compatible = "intel,keembay-emmc-phy";
  55. reg = <0x20290000 0x54>;
  56. clocks = <&emmc>;
  57. clock-names = "emmcclk";
  58. #phy-cells = <0>;
  59. };
  60. ...