marvell,armada-cp110-utmi-phy.yaml 2.5 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Marvell Armada CP110/CP115 UTMI PHY
  7. maintainers:
  8. - Konstantin Porotchkin <kostap@marvell.com>
  9. description:
  10. On Armada 7k/8k and CN913x, there are two host and one device USB controllers.
  11. Each of two exiting UTMI PHYs could be connected to either USB host or USB device
  12. controller.
  13. The USB device controller can only be connected to a single UTMI PHY port
  14. 0.H----- USB HOST0
  15. UTMI PHY0 --------/
  16. 0.D-----0
  17. \------ USB DEVICE
  18. 1.D-----1
  19. UTMI PHY1 --------\
  20. 1.H----- USB HOST1
  21. properties:
  22. compatible:
  23. const: marvell,cp110-utmi-phy
  24. reg:
  25. maxItems: 1
  26. "#address-cells":
  27. const: 1
  28. "#size-cells":
  29. const: 0
  30. marvell,system-controller:
  31. description:
  32. Phandle to the system controller node
  33. $ref: /schemas/types.yaml#/definitions/phandle
  34. swap-dx-lanes:
  35. $ref: /schemas/types.yaml#/definitions/uint32-array
  36. description: |
  37. Specifies the ports which will swap the differential-pair (D+/D-),
  38. default is not-swapped.
  39. # Required child nodes:
  40. patternProperties:
  41. "^usb-phy@[0|1]$":
  42. type: object
  43. description:
  44. Each UTMI PHY port must be represented as a sub-node.
  45. properties:
  46. reg:
  47. description: phy port index.
  48. maxItems: 1
  49. "#phy-cells":
  50. const: 0
  51. required:
  52. - reg
  53. - "#phy-cells"
  54. additionalProperties: false
  55. required:
  56. - compatible
  57. - reg
  58. - "#address-cells"
  59. - "#size-cells"
  60. - marvell,system-controller
  61. additionalProperties: false
  62. examples:
  63. - |
  64. cp0_utmi: utmi@580000 {
  65. compatible = "marvell,cp110-utmi-phy";
  66. reg = <0x580000 0x2000>;
  67. marvell,system-controller = <&cp0_syscon0>;
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. cp0_utmi0: usb-phy@0 {
  71. reg = <0>;
  72. #phy-cells = <0>;
  73. };
  74. cp0_utmi1: usb-phy@1 {
  75. reg = <1>;
  76. #phy-cells = <0>;
  77. };
  78. };
  79. cp0_usb3_0 {
  80. usb-phy = <&cp0_usb3_0_phy0>;
  81. phys = <&cp0_utmi0>;
  82. phy-names = "utmi";
  83. /* UTMI0 is connected to USB host controller (default mode) */
  84. dr_mode = "host";
  85. };
  86. cp0_usb3_1 {
  87. usb-phy = <&cp0_usb3_0_phy1>;
  88. phys = <&cp0_utmi1>;
  89. phy-names = "utmi";
  90. /* UTMI1 is connected to USB device controller */
  91. dr_mode = "peripheral";
  92. };