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- # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
- # Copyright (c) 2023 MediaTek, BayLibre
- %YAML 1.2
- ---
- $id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
- $schema: http://devicetree.org/meta-schemas/core.yaml#
- title: Mediatek Sensor Interface MIPI CSI CD-PHY
- maintainers:
- - Julien Stephan <jstephan@baylibre.com>
- - Andy Hsieh <andy.hsieh@mediatek.com>
- description:
- The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
- receivers. The number of PHYs depends on the SoC model.
- Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
- capable.
- properties:
- compatible:
- enum:
- - mediatek,mt8365-csi-rx
- reg:
- maxItems: 1
- num-lanes:
- enum: [2, 3, 4]
- '#phy-cells':
- enum: [0, 1]
- description: |
- If the PHY doesn't support mode selection then #phy-cells must be 0 and
- PHY mode is described using phy-type property.
- If the PHY supports mode selection, then #phy-cells must be 1 and mode
- is set in the PHY cells. Supported modes are:
- - PHY_TYPE_DPHY
- - PHY_TYPE_CPHY
- See include/dt-bindings/phy/phy.h for constants.
- phy-type:
- description:
- If the PHY doesn't support mode selection then this set the operating mode.
- See include/dt-bindings/phy/phy.h for constants.
- const: 10
- $ref: /schemas/types.yaml#/definitions/uint32
- required:
- - compatible
- - reg
- - num-lanes
- - '#phy-cells'
- additionalProperties: false
- examples:
- - |
- #include <dt-bindings/phy/phy.h>
- soc {
- #address-cells = <2>;
- #size-cells = <2>;
- csi0_rx: phy@11c10000 {
- compatible = "mediatek,mt8365-csi-rx";
- reg = <0 0x11c10000 0 0x2000>;
- num-lanes = <2>;
- #phy-cells = <1>;
- };
- csi1_rx: phy@11c12000 {
- compatible = "mediatek,mt8365-csi-rx";
- reg = <0 0x11c12000 0 0x2000>;
- phy-type = <PHY_TYPE_DPHY>;
- num-lanes = <2>;
- #phy-cells = <0>;
- };
- };
- ...
|