nvidia,tegra210-xusb-padctl.yaml 25 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: NVIDIA Tegra210 XUSB pad controller
  7. maintainers:
  8. - Thierry Reding <thierry.reding@gmail.com>
  9. - Jon Hunter <jonathanh@nvidia.com>
  10. description: |
  11. The Tegra XUSB pad controller manages a set of I/O lanes (with differential
  12. signals) which connect directly to pins/pads on the SoC package. Each lane
  13. is controlled by a HW block referred to as a "pad" in the Tegra hardware
  14. documentation. Each such "pad" may control either one or multiple lanes,
  15. and thus contains any logic common to all its lanes. Each lane can be
  16. separately configured and powered up.
  17. Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
  18. super-speed USB. Other lanes are for various types of low-speed, full-speed
  19. or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
  20. contains a software-configurable mux that sits between the I/O controller
  21. ports (e.g. PCIe) and the lanes.
  22. In addition to per-lane configuration, USB 3.0 ports may require additional
  23. settings on a per-board basis.
  24. Pads will be represented as children of the top-level XUSB pad controller
  25. device tree node. Each lane exposed by the pad will be represented by its
  26. own subnode and can be referenced by users of the lane using the standard
  27. PHY bindings, as described by the phy-bindings.txt file in this directory.
  28. The Tegra hardware documentation refers to the connection between the XUSB
  29. pad controller and the XUSB controller as "ports". This is confusing since
  30. "port" is typically used to denote the physical USB receptacle. The device
  31. tree binding in this document uses the term "port" to refer to the logical
  32. abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
  33. for the USB signal, the VBUS power supply, the USB 2.0 companion port for
  34. USB 3.0 receptacles, ...).
  35. properties:
  36. compatible:
  37. const: nvidia,tegra210-xusb-padctl
  38. reg:
  39. maxItems: 1
  40. resets:
  41. items:
  42. - description: pad controller reset
  43. interrupts:
  44. items:
  45. - description: XUSB pad controller interrupt
  46. reset-names:
  47. items:
  48. - const: padctl
  49. avdd-pll-utmip-supply:
  50. description: UTMI PLL power supply. Must supply 1.8 V.
  51. avdd-pll-uerefe-supply:
  52. description: PLLE reference PLL power supply. Must supply 1.05 V.
  53. dvdd-pex-pll-supply:
  54. description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
  55. hvdd-pex-pll-e-supply:
  56. description: High-voltage PLLE power supply. Must supply 1.8 V.
  57. nvidia,pmc:
  58. description: phandle to the Tegra Power Management Controller (PMC) node
  59. $ref: /schemas/types.yaml#/definitions/phandle
  60. pads:
  61. description: A required child node named "pads" contains a list of
  62. subnodes, one for each of the pads exposed by the XUSB pad controller.
  63. Each pad may need additional resources that can be referenced in its
  64. pad node.
  65. The "status" property is used to enable or disable the use of a pad.
  66. If set to "disabled", the pad will not be used on the given board. In
  67. order to use the pad and any of its lanes, this property must be set
  68. to "okay" or be absent.
  69. type: object
  70. additionalProperties: false
  71. properties:
  72. usb2:
  73. type: object
  74. additionalProperties: false
  75. properties:
  76. clocks:
  77. items:
  78. - description: USB2 tracking clock
  79. clock-names:
  80. items:
  81. - const: trk
  82. lanes:
  83. type: object
  84. additionalProperties: false
  85. properties:
  86. usb2-0:
  87. type: object
  88. additionalProperties: false
  89. properties:
  90. "#phy-cells":
  91. const: 0
  92. nvidia,function:
  93. description: Function selection for this lane.
  94. $ref: /schemas/types.yaml#/definitions/string
  95. enum: [ snps, xusb, uart ]
  96. usb2-1:
  97. type: object
  98. additionalProperties: false
  99. properties:
  100. "#phy-cells":
  101. const: 0
  102. nvidia,function:
  103. description: Function selection for this lane.
  104. $ref: /schemas/types.yaml#/definitions/string
  105. enum: [ snps, xusb, uart ]
  106. usb2-2:
  107. type: object
  108. additionalProperties: false
  109. properties:
  110. "#phy-cells":
  111. const: 0
  112. nvidia,function:
  113. description: Function selection for this lane.
  114. $ref: /schemas/types.yaml#/definitions/string
  115. enum: [ snps, xusb, uart ]
  116. usb2-3:
  117. type: object
  118. additionalProperties: false
  119. properties:
  120. "#phy-cells":
  121. const: 0
  122. nvidia,function:
  123. description: Function selection for this lane.
  124. $ref: /schemas/types.yaml#/definitions/string
  125. enum: [ snps, xusb, uart ]
  126. hsic:
  127. type: object
  128. additionalProperties: false
  129. properties:
  130. clocks:
  131. items:
  132. - description: HSIC tracking clock
  133. clock-names:
  134. items:
  135. - const: trk
  136. lanes:
  137. type: object
  138. additionalProperties: false
  139. properties:
  140. hsic-0:
  141. type: object
  142. additionalProperties: false
  143. properties:
  144. "#phy-cells":
  145. const: 0
  146. nvidia,function:
  147. description: Function selection for this lane.
  148. $ref: /schemas/types.yaml#/definitions/string
  149. enum: [ snps, xusb ]
  150. hsic-1:
  151. type: object
  152. additionalProperties: false
  153. properties:
  154. "#phy-cells":
  155. const: 0
  156. nvidia,function:
  157. description: Function selection for this lane.
  158. $ref: /schemas/types.yaml#/definitions/string
  159. enum: [ snps, xusb ]
  160. pcie:
  161. type: object
  162. additionalProperties: false
  163. properties:
  164. clocks:
  165. items:
  166. - description: PCIe PLL clock source
  167. clock-names:
  168. items:
  169. - const: pll
  170. resets:
  171. items:
  172. - description: PCIe PHY reset
  173. reset-names:
  174. items:
  175. - const: phy
  176. lanes:
  177. type: object
  178. additionalProperties: false
  179. properties:
  180. pcie-0:
  181. type: object
  182. additionalProperties: false
  183. properties:
  184. "#phy-cells":
  185. const: 0
  186. nvidia,function:
  187. description: Function selection for this lane.
  188. $ref: /schemas/types.yaml#/definitions/string
  189. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  190. pcie-1:
  191. type: object
  192. additionalProperties: false
  193. properties:
  194. "#phy-cells":
  195. const: 0
  196. nvidia,function:
  197. description: Function selection for this lane.
  198. $ref: /schemas/types.yaml#/definitions/string
  199. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  200. pcie-2:
  201. type: object
  202. additionalProperties: false
  203. properties:
  204. "#phy-cells":
  205. const: 0
  206. nvidia,function:
  207. description: Function selection for this lane.
  208. $ref: /schemas/types.yaml#/definitions/string
  209. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  210. pcie-3:
  211. type: object
  212. additionalProperties: false
  213. properties:
  214. "#phy-cells":
  215. const: 0
  216. nvidia,function:
  217. description: Function selection for this lane.
  218. $ref: /schemas/types.yaml#/definitions/string
  219. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  220. pcie-4:
  221. type: object
  222. additionalProperties: false
  223. properties:
  224. "#phy-cells":
  225. const: 0
  226. nvidia,function:
  227. description: Function selection for this lane.
  228. $ref: /schemas/types.yaml#/definitions/string
  229. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  230. pcie-5:
  231. type: object
  232. additionalProperties: false
  233. properties:
  234. "#phy-cells":
  235. const: 0
  236. nvidia,function:
  237. description: Function selection for this lane.
  238. $ref: /schemas/types.yaml#/definitions/string
  239. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  240. pcie-6:
  241. type: object
  242. additionalProperties: false
  243. properties:
  244. "#phy-cells":
  245. const: 0
  246. nvidia,function:
  247. description: Function selection for this lane.
  248. $ref: /schemas/types.yaml#/definitions/string
  249. enum: [ pcie-x1, usb3-ss, pcie-x4 ]
  250. sata:
  251. type: object
  252. additionalProperties: false
  253. properties:
  254. clocks:
  255. items:
  256. - description: SATA PLL clock source
  257. clock-names:
  258. items:
  259. - const: pll
  260. resets:
  261. items:
  262. - description: SATA PHY reset
  263. reset-names:
  264. items:
  265. - const: phy
  266. lanes:
  267. type: object
  268. additionalProperties: false
  269. properties:
  270. sata-0:
  271. type: object
  272. additionalProperties: false
  273. properties:
  274. "#phy-cells":
  275. const: 0
  276. nvidia,function:
  277. description: Function selection for this lane.
  278. $ref: /schemas/types.yaml#/definitions/string
  279. enum: [ usb3-ss, sata ]
  280. ports:
  281. description: A required child node named "ports" contains a list of
  282. subnodes, one for each of the ports exposed by the XUSB pad controller.
  283. Each port may need additional resources that can be referenced in its
  284. port node.
  285. The "status" property is used to enable or disable the use of a port.
  286. If set to "disabled", the port will not be used on the given board. In
  287. order to use the port, this property must be set to "okay".
  288. type: object
  289. additionalProperties: false
  290. properties:
  291. usb2-0:
  292. type: object
  293. additionalProperties: false
  294. properties:
  295. # no need to further describe this because the connector will
  296. # match on gpio-usb-b-connector or usb-b-connector and cause
  297. # that binding to be selected for the subnode
  298. connector:
  299. type: object
  300. mode:
  301. description: A string that determines the mode in which to
  302. run the port.
  303. $ref: /schemas/types.yaml#/definitions/string
  304. enum: [ host, peripheral, otg ]
  305. nvidia,internal:
  306. description: A boolean property whose presence determines
  307. that a port is internal. In the absence of this property
  308. the port is considered to be external.
  309. $ref: /schemas/types.yaml#/definitions/flag
  310. usb-role-switch:
  311. description: |
  312. A boolean property whole presence indicates that the port
  313. supports OTG or peripheral mode. If present, the port
  314. supports switching between USB host and peripheral roles.
  315. A connector must be added as a subnode in that case.
  316. See ../connector/usb-connector.yaml.
  317. vbus-supply:
  318. description: A phandle to the regulator supplying the VBUS
  319. voltage.
  320. dependencies:
  321. usb-role-switch: [ connector ]
  322. usb2-1:
  323. type: object
  324. additionalProperties: false
  325. properties:
  326. # no need to further describe this because the connector will
  327. # match on gpio-usb-b-connector or usb-b-connector and cause
  328. # that binding to be selected for the subnode
  329. connector:
  330. type: object
  331. mode:
  332. description: A string that determines the mode in which to
  333. run the port.
  334. $ref: /schemas/types.yaml#/definitions/string
  335. enum: [ host, peripheral, otg ]
  336. nvidia,internal:
  337. description: A boolean property whose presence determines
  338. that a port is internal. In the absence of this property
  339. the port is considered to be external.
  340. $ref: /schemas/types.yaml#/definitions/flag
  341. usb-role-switch:
  342. description: |
  343. A boolean property whole presence indicates that the port
  344. supports OTG or peripheral mode. If present, the port
  345. supports switching between USB host and peripheral roles.
  346. A connector must be added as a subnode in that case.
  347. See ../connector/usb-connector.yaml.
  348. vbus-supply:
  349. description: A phandle to the regulator supplying the VBUS
  350. voltage.
  351. dependencies:
  352. usb-role-switch: [ connector ]
  353. usb2-2:
  354. type: object
  355. additionalProperties: false
  356. properties:
  357. # no need to further describe this because the connector will
  358. # match on gpio-usb-b-connector or usb-b-connector and cause
  359. # that binding to be selected for the subnode
  360. connector:
  361. type: object
  362. mode:
  363. description: A string that determines the mode in which to
  364. run the port.
  365. $ref: /schemas/types.yaml#/definitions/string
  366. enum: [ host, peripheral, otg ]
  367. nvidia,internal:
  368. description: A boolean property whose presence determines
  369. that a port is internal. In the absence of this property
  370. the port is considered to be external.
  371. $ref: /schemas/types.yaml#/definitions/flag
  372. usb-role-switch:
  373. description: |
  374. A boolean property whole presence indicates that the port
  375. supports OTG or peripheral mode. If present, the port
  376. supports switching between USB host and peripheral roles.
  377. A connector must be added as a subnode in that case.
  378. See ../connector/usb-connector.yaml.
  379. vbus-supply:
  380. description: A phandle to the regulator supplying the VBUS
  381. voltage.
  382. dependencies:
  383. usb-role-switch: [ connector ]
  384. usb2-3:
  385. type: object
  386. additionalProperties: false
  387. properties:
  388. # no need to further describe this because the connector will
  389. # match on gpio-usb-b-connector or usb-b-connector and cause
  390. # that binding to be selected for the subnode
  391. connector:
  392. type: object
  393. mode:
  394. description: A string that determines the mode in which to
  395. run the port.
  396. $ref: /schemas/types.yaml#/definitions/string
  397. enum: [ host, peripheral, otg ]
  398. nvidia,internal:
  399. description: A boolean property whose presence determines
  400. that a port is internal. In the absence of this property
  401. the port is considered to be external.
  402. $ref: /schemas/types.yaml#/definitions/flag
  403. usb-role-switch:
  404. description: |
  405. A boolean property whole presence indicates that the port
  406. supports OTG or peripheral mode. If present, the port
  407. supports switching between USB host and peripheral roles.
  408. A connector must be added as a subnode in that case.
  409. See ../connector/usb-connector.yaml.
  410. vbus-supply:
  411. description: A phandle to the regulator supplying the VBUS
  412. voltage.
  413. dependencies:
  414. usb-role-switch: [ connector ]
  415. hsic-0:
  416. type: object
  417. additionalProperties: false
  418. properties:
  419. vbus-supply:
  420. description: A phandle to the regulator supplying the VBUS
  421. voltage.
  422. hsic-1:
  423. type: object
  424. additionalProperties: false
  425. properties:
  426. vbus-supply:
  427. description: A phandle to the regulator supplying the VBUS
  428. voltage.
  429. usb3-0:
  430. type: object
  431. additionalProperties: false
  432. properties:
  433. nvidia,internal:
  434. description: A boolean property whose presence determines
  435. that a port is internal. In the absence of this property
  436. the port is considered to be external.
  437. $ref: /schemas/types.yaml#/definitions/flag
  438. nvidia,usb2-companion:
  439. description: A single cell that specifies the physical port
  440. number to map this super-speed USB port to. The range of
  441. valid port numbers varies with the SoC generation.
  442. $ref: /schemas/types.yaml#/definitions/uint32
  443. enum: [ 0, 1, 2, 3 ]
  444. vbus-supply:
  445. description: A phandle to the regulator supplying the VBUS
  446. voltage.
  447. usb3-1:
  448. type: object
  449. additionalProperties: false
  450. properties:
  451. nvidia,internal:
  452. description: A boolean property whose presence determines
  453. that a port is internal. In the absence of this property
  454. the port is considered to be external.
  455. $ref: /schemas/types.yaml#/definitions/flag
  456. nvidia,usb2-companion:
  457. description: A single cell that specifies the physical port
  458. number to map this super-speed USB port to. The range of
  459. valid port numbers varies with the SoC generation.
  460. $ref: /schemas/types.yaml#/definitions/uint32
  461. enum: [ 0, 1, 2, 3 ]
  462. vbus-supply:
  463. description: A phandle to the regulator supplying the VBUS
  464. voltage.
  465. usb3-2:
  466. type: object
  467. additionalProperties: false
  468. properties:
  469. nvidia,internal:
  470. description: A boolean property whose presence determines
  471. that a port is internal. In the absence of this property
  472. the port is considered to be external.
  473. $ref: /schemas/types.yaml#/definitions/flag
  474. nvidia,usb2-companion:
  475. description: A single cell that specifies the physical port
  476. number to map this super-speed USB port to. The range of
  477. valid port numbers varies with the SoC generation.
  478. $ref: /schemas/types.yaml#/definitions/uint32
  479. enum: [ 0, 1, 2, 3 ]
  480. vbus-supply:
  481. description: A phandle to the regulator supplying the VBUS
  482. voltage.
  483. usb3-3:
  484. type: object
  485. additionalProperties: false
  486. properties:
  487. nvidia,internal:
  488. description: A boolean property whose presence determines
  489. that a port is internal. In the absence of this property
  490. the port is considered to be external.
  491. $ref: /schemas/types.yaml#/definitions/flag
  492. nvidia,usb2-companion:
  493. description: A single cell that specifies the physical port
  494. number to map this super-speed USB port to. The range of
  495. valid port numbers varies with the SoC generation.
  496. $ref: /schemas/types.yaml#/definitions/uint32
  497. enum: [ 0, 1, 2, 3 ]
  498. vbus-supply:
  499. description: A phandle to the regulator supplying the VBUS
  500. voltage.
  501. additionalProperties: false
  502. required:
  503. - avdd-pll-utmip-supply
  504. - avdd-pll-uerefe-supply
  505. - dvdd-pex-pll-supply
  506. - hvdd-pex-pll-e-supply
  507. examples:
  508. - |
  509. #include <dt-bindings/clock/tegra210-car.h>
  510. #include <dt-bindings/gpio/tegra-gpio.h>
  511. #include <dt-bindings/interrupt-controller/arm-gic.h>
  512. padctl@7009f000 {
  513. compatible = "nvidia,tegra210-xusb-padctl";
  514. reg = <0x7009f000 0x1000>;
  515. interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
  516. resets = <&tegra_car 142>;
  517. reset-names = "padctl";
  518. avdd-pll-utmip-supply = <&vdd_1v8>;
  519. avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
  520. dvdd-pex-pll-supply = <&vdd_pex_1v05>;
  521. hvdd-pex-pll-e-supply = <&vdd_1v8>;
  522. pads {
  523. usb2 {
  524. clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>;
  525. clock-names = "trk";
  526. lanes {
  527. usb2-0 {
  528. nvidia,function = "xusb";
  529. #phy-cells = <0>;
  530. };
  531. usb2-1 {
  532. nvidia,function = "xusb";
  533. #phy-cells = <0>;
  534. };
  535. usb2-2 {
  536. nvidia,function = "xusb";
  537. #phy-cells = <0>;
  538. };
  539. usb2-3 {
  540. nvidia,function = "xusb";
  541. #phy-cells = <0>;
  542. };
  543. };
  544. };
  545. hsic {
  546. clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>;
  547. clock-names = "trk";
  548. status = "disabled";
  549. lanes {
  550. hsic-0 {
  551. status = "disabled";
  552. #phy-cells = <0>;
  553. };
  554. hsic-1 {
  555. status = "disabled";
  556. #phy-cells = <0>;
  557. };
  558. };
  559. };
  560. pcie {
  561. clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
  562. clock-names = "pll";
  563. resets = <&tegra_car 205>;
  564. reset-names = "phy";
  565. lanes {
  566. pcie-0 {
  567. nvidia,function = "pcie-x1";
  568. #phy-cells = <0>;
  569. };
  570. pcie-1 {
  571. nvidia,function = "pcie-x4";
  572. #phy-cells = <0>;
  573. };
  574. pcie-2 {
  575. nvidia,function = "pcie-x4";
  576. #phy-cells = <0>;
  577. };
  578. pcie-3 {
  579. nvidia,function = "pcie-x4";
  580. #phy-cells = <0>;
  581. };
  582. pcie-4 {
  583. nvidia,function = "pcie-x4";
  584. #phy-cells = <0>;
  585. };
  586. pcie-5 {
  587. nvidia,function = "usb3-ss";
  588. #phy-cells = <0>;
  589. };
  590. pcie-6 {
  591. nvidia,function = "usb3-ss";
  592. #phy-cells = <0>;
  593. };
  594. };
  595. };
  596. sata {
  597. clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
  598. clock-names = "pll";
  599. resets = <&tegra_car 204>;
  600. reset-names = "phy";
  601. lanes {
  602. sata-0 {
  603. nvidia,function = "sata";
  604. #phy-cells = <0>;
  605. };
  606. };
  607. };
  608. };
  609. ports {
  610. usb2-0 {
  611. mode = "peripheral";
  612. usb-role-switch;
  613. connector {
  614. compatible = "gpio-usb-b-connector",
  615. "usb-b-connector";
  616. label = "micro-USB";
  617. type = "micro";
  618. vbus-gpios = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_LOW>;
  619. };
  620. };
  621. usb2-1 {
  622. vbus-supply = <&vdd_5v0_rtl>;
  623. mode = "host";
  624. };
  625. usb2-2 {
  626. vbus-supply = <&vdd_usb_vbus>;
  627. mode = "host";
  628. };
  629. usb2-3 {
  630. mode = "host";
  631. };
  632. hsic-0 {
  633. status = "disabled";
  634. };
  635. hsic-1 {
  636. status = "disabled";
  637. };
  638. usb3-0 {
  639. nvidia,usb2-companion = <1>;
  640. };
  641. usb3-1 {
  642. nvidia,usb2-companion = <2>;
  643. };
  644. usb3-2 {
  645. status = "disabled";
  646. };
  647. usb3-3 {
  648. status = "disabled";
  649. };
  650. };
  651. };