qcom,msm8998-qmp-usb3-phy.yaml 3.8 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-usb3-phy.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm QMP PHY controller (USB, MSM8998)
  7. maintainers:
  8. - Vinod Koul <vkoul@kernel.org>
  9. description:
  10. The QMP PHY controller supports physical layer functionality for USB-C on
  11. several Qualcomm chipsets.
  12. properties:
  13. compatible:
  14. enum:
  15. - qcom,msm8998-qmp-usb3-phy
  16. - qcom,qcm2290-qmp-usb3-phy
  17. - qcom,sdm660-qmp-usb3-phy
  18. - qcom,sm6115-qmp-usb3-phy
  19. reg:
  20. maxItems: 1
  21. clocks:
  22. maxItems: 4
  23. clock-names:
  24. maxItems: 4
  25. resets:
  26. maxItems: 2
  27. reset-names:
  28. items:
  29. - const: phy
  30. - const: phy_phy
  31. vdda-phy-supply: true
  32. vdda-pll-supply: true
  33. "#clock-cells":
  34. const: 0
  35. clock-output-names:
  36. maxItems: 1
  37. "#phy-cells":
  38. const: 0
  39. orientation-switch:
  40. description:
  41. Flag the PHY as possible handler of USB Type-C orientation switching
  42. type: boolean
  43. qcom,tcsr-reg:
  44. $ref: /schemas/types.yaml#/definitions/phandle-array
  45. items:
  46. - items:
  47. - description: phandle to TCSR hardware block
  48. - description: offset of the VLS CLAMP register
  49. description: Clamp register present in the TCSR
  50. ports:
  51. $ref: /schemas/graph.yaml#/properties/ports
  52. properties:
  53. port@0:
  54. $ref: /schemas/graph.yaml#/properties/port
  55. description: Output endpoint of the PHY
  56. port@1:
  57. $ref: /schemas/graph.yaml#/properties/port
  58. description: Incoming endpoint from the USB controller
  59. required:
  60. - compatible
  61. - reg
  62. - clocks
  63. - clock-names
  64. - resets
  65. - reset-names
  66. - vdda-phy-supply
  67. - vdda-pll-supply
  68. - "#clock-cells"
  69. - clock-output-names
  70. - "#phy-cells"
  71. - qcom,tcsr-reg
  72. allOf:
  73. - if:
  74. properties:
  75. compatible:
  76. contains:
  77. enum:
  78. - qcom,msm8998-qmp-usb3-phy
  79. - qcom,sdm660-qmp-usb3-phy
  80. then:
  81. properties:
  82. clocks:
  83. maxItems: 4
  84. clock-names:
  85. items:
  86. - const: aux
  87. - const: ref
  88. - const: cfg_ahb
  89. - const: pipe
  90. - if:
  91. properties:
  92. compatible:
  93. contains:
  94. enum:
  95. - qcom,qcm2290-qmp-usb3-phy
  96. - qcom,sm6115-qmp-usb3-phy
  97. then:
  98. properties:
  99. clocks:
  100. maxItems: 4
  101. clock-names:
  102. items:
  103. - const: cfg_ahb
  104. - const: ref
  105. - const: com_aux
  106. - const: pipe
  107. additionalProperties: false
  108. examples:
  109. - |
  110. #include <dt-bindings/clock/qcom,gcc-msm8998.h>
  111. #include <dt-bindings/clock/qcom,rpmh.h>
  112. phy@c010000 {
  113. compatible = "qcom,msm8998-qmp-usb3-phy";
  114. reg = <0x0c010000 0x1000>;
  115. clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
  116. <&gcc GCC_USB3_CLKREF_CLK>,
  117. <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
  118. <&gcc GCC_USB3_PHY_PIPE_CLK>;
  119. clock-names = "aux",
  120. "ref",
  121. "cfg_ahb",
  122. "pipe";
  123. clock-output-names = "usb3_phy_pipe_clk_src";
  124. #clock-cells = <0>;
  125. #phy-cells = <0>;
  126. resets = <&gcc GCC_USB3_PHY_BCR>,
  127. <&gcc GCC_USB3PHY_PHY_BCR>;
  128. reset-names = "phy",
  129. "phy_phy";
  130. vdda-phy-supply = <&vreg_l1a_0p875>;
  131. vdda-pll-supply = <&vreg_l2a_1p2>;
  132. orientation-switch;
  133. qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>;
  134. ports {
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. port@0 {
  138. reg = <0>;
  139. endpoint {
  140. remote-endpoint = <&pmic_typec_mux_in>;
  141. };
  142. };
  143. port@1 {
  144. reg = <1>;
  145. endpoint {
  146. remote-endpoint = <&usb_dwc3_ss>;
  147. };
  148. };
  149. };
  150. };