qcom,sc8280xp-qmp-ufs-phy.yaml 3.8 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Qualcomm QMP PHY controller (UFS, SC8280XP)
  7. maintainers:
  8. - Vinod Koul <vkoul@kernel.org>
  9. description:
  10. The QMP PHY controller supports physical layer functionality for a number of
  11. controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
  12. properties:
  13. compatible:
  14. enum:
  15. - qcom,msm8996-qmp-ufs-phy
  16. - qcom,msm8998-qmp-ufs-phy
  17. - qcom,sa8775p-qmp-ufs-phy
  18. - qcom,sc7180-qmp-ufs-phy
  19. - qcom,sc7280-qmp-ufs-phy
  20. - qcom,sc8180x-qmp-ufs-phy
  21. - qcom,sc8280xp-qmp-ufs-phy
  22. - qcom,sdm845-qmp-ufs-phy
  23. - qcom,sm6115-qmp-ufs-phy
  24. - qcom,sm6125-qmp-ufs-phy
  25. - qcom,sm6350-qmp-ufs-phy
  26. - qcom,sm7150-qmp-ufs-phy
  27. - qcom,sm8150-qmp-ufs-phy
  28. - qcom,sm8250-qmp-ufs-phy
  29. - qcom,sm8350-qmp-ufs-phy
  30. - qcom,sm8450-qmp-ufs-phy
  31. - qcom,sm8475-qmp-ufs-phy
  32. - qcom,sm8550-qmp-ufs-phy
  33. - qcom,sm8650-qmp-ufs-phy
  34. reg:
  35. maxItems: 1
  36. clocks:
  37. minItems: 2
  38. maxItems: 3
  39. clock-names:
  40. minItems: 2
  41. maxItems: 3
  42. power-domains:
  43. maxItems: 1
  44. resets:
  45. maxItems: 1
  46. reset-names:
  47. items:
  48. - const: ufsphy
  49. vdda-phy-supply: true
  50. vdda-pll-supply: true
  51. "#clock-cells":
  52. const: 1
  53. "#phy-cells":
  54. const: 0
  55. required:
  56. - compatible
  57. - reg
  58. - clocks
  59. - clock-names
  60. - resets
  61. - reset-names
  62. - vdda-phy-supply
  63. - vdda-pll-supply
  64. - "#phy-cells"
  65. allOf:
  66. - if:
  67. properties:
  68. compatible:
  69. contains:
  70. enum:
  71. - qcom,msm8998-qmp-ufs-phy
  72. - qcom,sa8775p-qmp-ufs-phy
  73. - qcom,sc7180-qmp-ufs-phy
  74. - qcom,sc7280-qmp-ufs-phy
  75. - qcom,sc8180x-qmp-ufs-phy
  76. - qcom,sc8280xp-qmp-ufs-phy
  77. - qcom,sdm845-qmp-ufs-phy
  78. - qcom,sm6115-qmp-ufs-phy
  79. - qcom,sm6125-qmp-ufs-phy
  80. - qcom,sm6350-qmp-ufs-phy
  81. - qcom,sm7150-qmp-ufs-phy
  82. - qcom,sm8150-qmp-ufs-phy
  83. - qcom,sm8250-qmp-ufs-phy
  84. - qcom,sm8350-qmp-ufs-phy
  85. - qcom,sm8450-qmp-ufs-phy
  86. - qcom,sm8475-qmp-ufs-phy
  87. - qcom,sm8550-qmp-ufs-phy
  88. - qcom,sm8650-qmp-ufs-phy
  89. then:
  90. properties:
  91. clocks:
  92. minItems: 3
  93. maxItems: 3
  94. clock-names:
  95. items:
  96. - const: ref
  97. - const: ref_aux
  98. - const: qref
  99. - if:
  100. properties:
  101. compatible:
  102. contains:
  103. enum:
  104. - qcom,msm8996-qmp-ufs-phy
  105. then:
  106. properties:
  107. clocks:
  108. minItems: 2
  109. maxItems: 2
  110. clock-names:
  111. items:
  112. - const: ref
  113. - const: qref
  114. - if:
  115. properties:
  116. compatible:
  117. contains:
  118. enum:
  119. - qcom,msm8996-qmp-ufs-phy
  120. - qcom,msm8998-qmp-ufs-phy
  121. then:
  122. properties:
  123. power-domains:
  124. false
  125. else:
  126. required:
  127. - power-domains
  128. additionalProperties: false
  129. examples:
  130. - |
  131. #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
  132. #include <dt-bindings/clock/qcom,rpmh.h>
  133. ufs_mem_phy: phy@1d87000 {
  134. compatible = "qcom,sc8280xp-qmp-ufs-phy";
  135. reg = <0x01d87000 0x1000>;
  136. clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
  137. <&gcc GCC_UFS_REF_CLKREF_CLK>;
  138. clock-names = "ref", "ref_aux", "qref";
  139. power-domains = <&gcc UFS_PHY_GDSC>;
  140. resets = <&ufs_mem_hc 0>;
  141. reset-names = "ufsphy";
  142. vdda-phy-supply = <&vreg_l6b>;
  143. vdda-pll-supply = <&vreg_l3b>;
  144. #phy-cells = <0>;
  145. };