imx-pwm.yaml 1.8 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Freescale i.MX PWM controller
  7. maintainers:
  8. - Philipp Zabel <p.zabel@pengutronix.de>
  9. allOf:
  10. - $ref: pwm.yaml#
  11. properties:
  12. "#pwm-cells":
  13. description:
  14. The only third cell flag supported by this binding is
  15. PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
  16. const: 3
  17. compatible:
  18. oneOf:
  19. - enum:
  20. - fsl,imx1-pwm
  21. - fsl,imx27-pwm
  22. - items:
  23. - enum:
  24. - fsl,imx25-pwm
  25. - fsl,imx31-pwm
  26. - fsl,imx50-pwm
  27. - fsl,imx51-pwm
  28. - fsl,imx53-pwm
  29. - fsl,imx6q-pwm
  30. - fsl,imx6sl-pwm
  31. - fsl,imx6sll-pwm
  32. - fsl,imx6sx-pwm
  33. - fsl,imx6ul-pwm
  34. - fsl,imx7d-pwm
  35. - fsl,imx8mm-pwm
  36. - fsl,imx8mn-pwm
  37. - fsl,imx8mp-pwm
  38. - fsl,imx8mq-pwm
  39. - fsl,imx8qxp-pwm
  40. - const: fsl,imx27-pwm
  41. reg:
  42. maxItems: 1
  43. clocks:
  44. items:
  45. - description: SoC PWM ipg clock
  46. - description: SoC PWM per clock
  47. clock-names:
  48. items:
  49. - const: ipg
  50. - const: per
  51. interrupts:
  52. maxItems: 1
  53. power-domains:
  54. maxItems: 1
  55. required:
  56. - compatible
  57. - reg
  58. - clocks
  59. - clock-names
  60. additionalProperties: false
  61. examples:
  62. - |
  63. #include <dt-bindings/clock/imx5-clock.h>
  64. pwm@53fb4000 {
  65. #pwm-cells = <3>;
  66. compatible = "fsl,imx27-pwm";
  67. reg = <0x53fb4000 0x4000>;
  68. clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
  69. <&clks IMX5_CLK_PWM1_HF_GATE>;
  70. clock-names = "ipg", "per";
  71. interrupts = <61>;
  72. };