pwm-sifive.yaml 1.9 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. # Copyright (C) 2020 SiFive, Inc.
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: SiFive PWM controller
  8. maintainers:
  9. - Paul Walmsley <paul.walmsley@sifive.com>
  10. description:
  11. Unlike most other PWM controllers, the SiFive PWM controller currently
  12. only supports one period for all channels in the PWM. All PWMs need to
  13. run at the same period. The period also has significant restrictions on
  14. the values it can achieve, which the driver rounds to the nearest
  15. achievable period. PWM RTL that corresponds to the IP block version
  16. numbers can be found here -
  17. https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
  18. allOf:
  19. - $ref: pwm.yaml#
  20. properties:
  21. compatible:
  22. items:
  23. - enum:
  24. - sifive,fu540-c000-pwm
  25. - sifive,fu740-c000-pwm
  26. - const: sifive,pwm0
  27. description:
  28. Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
  29. compatible strings are "sifive,fu540-c000-pwm" and
  30. "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
  31. SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
  32. SiFive PWM v0 IP block with no chip integration tweaks.
  33. Please refer to sifive-blocks-ip-versioning.txt for details.
  34. reg:
  35. maxItems: 1
  36. clocks:
  37. maxItems: 1
  38. "#pwm-cells":
  39. const: 3
  40. interrupts:
  41. maxItems: 4
  42. description:
  43. Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
  44. required:
  45. - compatible
  46. - reg
  47. - clocks
  48. - interrupts
  49. additionalProperties: false
  50. examples:
  51. - |
  52. pwm: pwm@10020000 {
  53. compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
  54. reg = <0x10020000 0x1000>;
  55. clocks = <&tlclk>;
  56. interrupt-parent = <&plic>;
  57. interrupts = <42>, <43>, <44>, <45>;
  58. #pwm-cells = <3>;
  59. };