socionext,uniphier-sdctrl.yaml 1.5 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Socionext UniPhier SD interface logic
  7. maintainers:
  8. - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
  9. description: |+
  10. SD interface logic implemented on Socionext UniPhier SoCs is
  11. attached outside SDHC, and has some SD related functions such as
  12. clock control, reset control, mode switch, and so on.
  13. properties:
  14. compatible:
  15. items:
  16. - enum:
  17. - socionext,uniphier-pro5-sdctrl
  18. - socionext,uniphier-pxs2-sdctrl
  19. - socionext,uniphier-ld11-sdctrl
  20. - socionext,uniphier-ld20-sdctrl
  21. - socionext,uniphier-pxs3-sdctrl
  22. - socionext,uniphier-nx1-sdctrl
  23. - const: simple-mfd
  24. - const: syscon
  25. reg:
  26. maxItems: 1
  27. clock-controller:
  28. $ref: /schemas/clock/socionext,uniphier-clock.yaml#
  29. reset-controller:
  30. $ref: /schemas/reset/socionext,uniphier-reset.yaml#
  31. required:
  32. - compatible
  33. - reg
  34. additionalProperties: false
  35. examples:
  36. - |
  37. syscon@59810000 {
  38. compatible = "socionext,uniphier-ld20-sdctrl",
  39. "simple-mfd", "syscon";
  40. reg = <0x59810000 0x400>;
  41. clock-controller {
  42. compatible = "socionext,uniphier-ld20-sd-clock";
  43. #clock-cells = <1>;
  44. };
  45. reset-controller {
  46. compatible = "socionext,uniphier-ld20-sd-reset";
  47. #reset-cells = <1>;
  48. };
  49. };