stm32mp135f-dk.dts 11 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
  4. * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
  5. */
  6. /dts-v1/;
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/input/input.h>
  9. #include <dt-bindings/leds/common.h>
  10. #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
  11. #include "stm32mp135.dtsi"
  12. #include "stm32mp13xf.dtsi"
  13. #include "stm32mp13-pinctrl.dtsi"
  14. / {
  15. model = "STMicroelectronics STM32MP135F-DK Discovery Board";
  16. compatible = "st,stm32mp135f-dk", "st,stm32mp135";
  17. aliases {
  18. ethernet0 = &ethernet1;
  19. serial0 = &uart4;
  20. serial1 = &usart1;
  21. serial2 = &uart8;
  22. serial3 = &usart2;
  23. };
  24. chosen {
  25. stdout-path = "serial0:115200n8";
  26. };
  27. clocks {
  28. clk_ext_camera: clk-ext-camera {
  29. #clock-cells = <0>;
  30. compatible = "fixed-clock";
  31. clock-frequency = <24000000>;
  32. };
  33. clk_mco1: clk-mco1 {
  34. #clock-cells = <0>;
  35. compatible = "fixed-clock";
  36. clock-frequency = <24000000>;
  37. };
  38. };
  39. memory@c0000000 {
  40. device_type = "memory";
  41. reg = <0xc0000000 0x20000000>;
  42. };
  43. reserved-memory {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. ranges;
  47. optee@dd000000 {
  48. reg = <0xdd000000 0x3000000>;
  49. no-map;
  50. };
  51. };
  52. gpio-keys {
  53. compatible = "gpio-keys";
  54. button-user {
  55. label = "User-PA13";
  56. linux,code = <BTN_1>;
  57. gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
  58. };
  59. };
  60. leds {
  61. compatible = "gpio-leds";
  62. led-blue {
  63. function = LED_FUNCTION_HEARTBEAT;
  64. color = <LED_COLOR_ID_BLUE>;
  65. gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
  66. linux,default-trigger = "heartbeat";
  67. default-state = "off";
  68. };
  69. };
  70. panel_backlight: panel-backlight {
  71. compatible = "gpio-backlight";
  72. gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>;
  73. default-on;
  74. status = "okay";
  75. };
  76. panel_rgb: panel-rgb {
  77. compatible = "rocktech,rk043fn48h";
  78. enable-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>;
  79. backlight = <&panel_backlight>;
  80. power-supply = <&scmi_v3v3_sw>;
  81. status = "okay";
  82. width-mm = <105>;
  83. height-mm = <67>;
  84. panel-timing {
  85. clock-frequency = <10000000>;
  86. hactive = <480>;
  87. hback-porch = <43>;
  88. hfront-porch = <10>;
  89. hsync-len = <1>;
  90. hsync-active = <0>;
  91. vactive = <272>;
  92. vback-porch = <26>;
  93. vfront-porch = <4>;
  94. vsync-len = <10>;
  95. vsync-active = <0>;
  96. de-active = <1>;
  97. pixelclk-active = <1>;
  98. };
  99. port {
  100. panel_in_rgb: endpoint {
  101. remote-endpoint = <&ltdc_out_rgb>;
  102. };
  103. };
  104. };
  105. };
  106. &adc_1 {
  107. pinctrl-names = "default";
  108. pinctrl-0 = <&adc1_usb_cc_pins_a>;
  109. vdda-supply = <&scmi_vdd_adc>;
  110. vref-supply = <&scmi_vdd_adc>;
  111. status = "okay";
  112. adc1: adc@0 {
  113. status = "okay";
  114. /*
  115. * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in6 & in12.
  116. * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
  117. * 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
  118. * Use arbitrary margin here (e.g. 5us).
  119. */
  120. channel@6 {
  121. reg = <6>;
  122. st,min-sample-time-ns = <5000>;
  123. };
  124. channel@12 {
  125. reg = <12>;
  126. st,min-sample-time-ns = <5000>;
  127. };
  128. };
  129. };
  130. &crc1 {
  131. status = "okay";
  132. };
  133. &cryp {
  134. status = "okay";
  135. };
  136. &dcmipp {
  137. pinctrl-names = "default", "sleep";
  138. pinctrl-0 = <&dcmipp_pins_a>;
  139. pinctrl-1 = <&dcmipp_sleep_pins_a>;
  140. status = "okay";
  141. port {
  142. dcmipp_0: endpoint {
  143. remote-endpoint = <&mipid02_2>;
  144. bus-width = <8>;
  145. hsync-active = <0>;
  146. vsync-active = <0>;
  147. pclk-sample = <0>;
  148. };
  149. };
  150. };
  151. &ethernet1 {
  152. status = "okay";
  153. pinctrl-0 = <&eth1_rmii_pins_a>;
  154. pinctrl-1 = <&eth1_rmii_sleep_pins_a>;
  155. pinctrl-names = "default", "sleep";
  156. phy-mode = "rmii";
  157. phy-handle = <&phy0_eth1>;
  158. mdio {
  159. #address-cells = <1>;
  160. #size-cells = <0>;
  161. compatible = "snps,dwmac-mdio";
  162. phy0_eth1: ethernet-phy@0 {
  163. compatible = "ethernet-phy-id0007.c131";
  164. reg = <0>;
  165. reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
  166. wakeup-source;
  167. };
  168. };
  169. };
  170. &i2c1 {
  171. pinctrl-names = "default", "sleep";
  172. pinctrl-0 = <&i2c1_pins_a>;
  173. pinctrl-1 = <&i2c1_sleep_pins_a>;
  174. i2c-scl-rising-time-ns = <96>;
  175. i2c-scl-falling-time-ns = <3>;
  176. clock-frequency = <1000000>;
  177. status = "okay";
  178. /* spare dmas for other usage */
  179. /delete-property/dmas;
  180. /delete-property/dma-names;
  181. mcp23017: pinctrl@21 {
  182. compatible = "microchip,mcp23017";
  183. reg = <0x21>;
  184. gpio-controller;
  185. #gpio-cells = <2>;
  186. interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
  187. interrupt-parent = <&gpiog>;
  188. pinctrl-names = "default";
  189. pinctrl-0 = <&mcp23017_pins_a>;
  190. interrupt-controller;
  191. #interrupt-cells = <2>;
  192. microchip,irq-mirror;
  193. };
  194. typec@53 {
  195. compatible = "st,stm32g0-typec";
  196. reg = <0x53>;
  197. /* Alert pin on PI2 */
  198. interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
  199. interrupt-parent = <&gpioi>;
  200. /* Internal pull-up on PI2 */
  201. pinctrl-names = "default";
  202. pinctrl-0 = <&stm32g0_intn_pins_a>;
  203. firmware-name = "stm32g0-ucsi.mp135f-dk.fw";
  204. connector {
  205. compatible = "usb-c-connector";
  206. label = "USB-C";
  207. port {
  208. con_usb_c_g0_ep: endpoint {
  209. remote-endpoint = <&usbotg_hs_ep>;
  210. };
  211. };
  212. };
  213. };
  214. };
  215. &i2c5 {
  216. pinctrl-names = "default", "sleep";
  217. pinctrl-0 = <&i2c5_pins_a>;
  218. pinctrl-1 = <&i2c5_sleep_pins_a>;
  219. i2c-scl-rising-time-ns = <170>;
  220. i2c-scl-falling-time-ns = <5>;
  221. clock-frequency = <400000>;
  222. status = "okay";
  223. /* spare dmas for other usage */
  224. /delete-property/dmas;
  225. /delete-property/dma-names;
  226. stmipi: csi2rx@14 {
  227. compatible = "st,st-mipid02";
  228. reg = <0x14>;
  229. clocks = <&clk_mco1>;
  230. clock-names = "xclk";
  231. VDDE-supply = <&scmi_v1v8_periph>;
  232. VDDIN-supply = <&scmi_v1v8_periph>;
  233. reset-gpios = <&mcp23017 2 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
  234. status = "okay";
  235. ports {
  236. #address-cells = <1>;
  237. #size-cells = <0>;
  238. port@0 {
  239. reg = <0>;
  240. mipid02_0: endpoint {
  241. data-lanes = <1 2>;
  242. lane-polarities = <0 0 0>;
  243. remote-endpoint = <&gc2145_ep>;
  244. };
  245. };
  246. port@2 {
  247. reg = <2>;
  248. mipid02_2: endpoint {
  249. bus-width = <8>;
  250. hsync-active = <0>;
  251. vsync-active = <0>;
  252. pclk-sample = <0>;
  253. remote-endpoint = <&dcmipp_0>;
  254. };
  255. };
  256. };
  257. };
  258. gc2145: camera@3c {
  259. compatible = "galaxycore,gc2145";
  260. reg = <0x3c>;
  261. clocks = <&clk_ext_camera>;
  262. iovdd-supply = <&scmi_v3v3_sw>;
  263. avdd-supply = <&scmi_v3v3_sw>;
  264. dvdd-supply = <&scmi_v3v3_sw>;
  265. powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
  266. reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
  267. status = "okay";
  268. port {
  269. gc2145_ep: endpoint {
  270. remote-endpoint = <&mipid02_0>;
  271. data-lanes = <1 2>;
  272. link-frequencies = /bits/ 64 <120000000 192000000 240000000>;
  273. };
  274. };
  275. };
  276. goodix: goodix-ts@5d {
  277. compatible = "goodix,gt911";
  278. reg = <0x5d>;
  279. pinctrl-names = "default";
  280. pinctrl-0 = <&goodix_pins_a>;
  281. interrupt-parent = <&gpiof>;
  282. interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  283. AVDD28-supply = <&scmi_v3v3_sw>;
  284. VDDIO-supply = <&scmi_v3v3_sw>;
  285. touchscreen-size-x = <480>;
  286. touchscreen-size-y = <272>;
  287. status = "okay" ;
  288. };
  289. };
  290. &iwdg2 {
  291. timeout-sec = <32>;
  292. status = "okay";
  293. };
  294. &ltdc {
  295. pinctrl-names = "default", "sleep";
  296. pinctrl-0 = <&ltdc_pins_a>;
  297. pinctrl-1 = <&ltdc_sleep_pins_a>;
  298. status = "okay";
  299. port {
  300. ltdc_out_rgb: endpoint {
  301. remote-endpoint = <&panel_in_rgb>;
  302. };
  303. };
  304. };
  305. &rtc {
  306. status = "okay";
  307. };
  308. &scmi_regu {
  309. scmi_vdd_adc: regulator@10 {
  310. reg = <VOLTD_SCMI_STPMIC1_LDO1>;
  311. regulator-name = "vdd_adc";
  312. };
  313. scmi_vdd_usb: regulator@13 {
  314. reg = <VOLTD_SCMI_STPMIC1_LDO4>;
  315. regulator-name = "vdd_usb";
  316. };
  317. scmi_vdd_sd: regulator@14 {
  318. reg = <VOLTD_SCMI_STPMIC1_LDO5>;
  319. regulator-name = "vdd_sd";
  320. };
  321. scmi_v1v8_periph: regulator@15 {
  322. reg = <VOLTD_SCMI_STPMIC1_LDO6>;
  323. regulator-name = "v1v8_periph";
  324. };
  325. scmi_v3v3_sw: regulator@19 {
  326. reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>;
  327. regulator-name = "v3v3_sw";
  328. };
  329. };
  330. &sdmmc1 {
  331. pinctrl-names = "default", "opendrain", "sleep";
  332. pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
  333. pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
  334. pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
  335. cd-gpios = <&gpioh 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
  336. disable-wp;
  337. st,neg-edge;
  338. bus-width = <4>;
  339. vmmc-supply = <&scmi_vdd_sd>;
  340. status = "okay";
  341. };
  342. &spi5 {
  343. pinctrl-names = "default", "sleep";
  344. pinctrl-0 = <&spi5_pins_a>;
  345. pinctrl-1 = <&spi5_sleep_pins_a>;
  346. status = "disabled";
  347. };
  348. &timers3 {
  349. /delete-property/dmas;
  350. /delete-property/dma-names;
  351. status = "disabled";
  352. pwm {
  353. /* PWM output on pin 7 of the expansion connector (CN8.7) using TIM3_CH4 func */
  354. pinctrl-0 = <&pwm3_pins_a>;
  355. pinctrl-1 = <&pwm3_sleep_pins_a>;
  356. pinctrl-names = "default", "sleep";
  357. status = "okay";
  358. };
  359. timer@2 {
  360. status = "okay";
  361. };
  362. };
  363. &timers4 {
  364. /delete-property/dmas;
  365. /delete-property/dma-names;
  366. status = "disabled";
  367. pwm {
  368. /* PWM output on pin 31 of the expansion connector (CN8.31) using TIM4_CH2 func */
  369. pinctrl-0 = <&pwm4_pins_a>;
  370. pinctrl-1 = <&pwm4_sleep_pins_a>;
  371. pinctrl-names = "default", "sleep";
  372. status = "okay";
  373. };
  374. timer@3 {
  375. status = "okay";
  376. };
  377. };
  378. &timers8 {
  379. /delete-property/dmas;
  380. /delete-property/dma-names;
  381. status = "disabled";
  382. pwm {
  383. /* PWM output on pin 32 of the expansion connector (CN8.32) using TIM8_CH3 func */
  384. pinctrl-0 = <&pwm8_pins_a>;
  385. pinctrl-1 = <&pwm8_sleep_pins_a>;
  386. pinctrl-names = "default", "sleep";
  387. status = "okay";
  388. };
  389. timer@7 {
  390. status = "okay";
  391. };
  392. };
  393. &timers14 {
  394. status = "disabled";
  395. pwm {
  396. /* PWM output on pin 33 of the expansion connector (CN8.33) using TIM14_CH1 func */
  397. pinctrl-0 = <&pwm14_pins_a>;
  398. pinctrl-1 = <&pwm14_sleep_pins_a>;
  399. pinctrl-names = "default", "sleep";
  400. status = "okay";
  401. };
  402. timer@13 {
  403. status = "okay";
  404. };
  405. };
  406. &uart4 {
  407. pinctrl-names = "default", "sleep", "idle";
  408. pinctrl-0 = <&uart4_pins_a>;
  409. pinctrl-1 = <&uart4_sleep_pins_a>;
  410. pinctrl-2 = <&uart4_idle_pins_a>;
  411. /delete-property/dmas;
  412. /delete-property/dma-names;
  413. status = "okay";
  414. };
  415. &uart8 {
  416. pinctrl-names = "default", "sleep", "idle";
  417. pinctrl-0 = <&uart8_pins_a>;
  418. pinctrl-1 = <&uart8_sleep_pins_a>;
  419. pinctrl-2 = <&uart8_idle_pins_a>;
  420. /delete-property/dmas;
  421. /delete-property/dma-names;
  422. status = "disabled";
  423. };
  424. &usart1 {
  425. pinctrl-names = "default", "sleep", "idle";
  426. pinctrl-0 = <&usart1_pins_a>;
  427. pinctrl-1 = <&usart1_sleep_pins_a>;
  428. pinctrl-2 = <&usart1_idle_pins_a>;
  429. uart-has-rtscts;
  430. status = "disabled";
  431. };
  432. /* Bluetooth */
  433. &usart2 {
  434. pinctrl-names = "default", "sleep", "idle";
  435. pinctrl-0 = <&usart2_pins_a>;
  436. pinctrl-1 = <&usart2_sleep_pins_a>;
  437. pinctrl-2 = <&usart2_idle_pins_a>;
  438. uart-has-rtscts;
  439. status = "okay";
  440. };
  441. &usbh_ehci {
  442. phys = <&usbphyc_port0>;
  443. status = "okay";
  444. #address-cells = <1>;
  445. #size-cells = <0>;
  446. /* onboard HUB */
  447. hub@1 {
  448. compatible = "usb424,2514";
  449. reg = <1>;
  450. vdd-supply = <&scmi_v3v3_sw>;
  451. };
  452. };
  453. &usbotg_hs {
  454. phys = <&usbphyc_port1 0>;
  455. phy-names = "usb2-phy";
  456. usb-role-switch;
  457. status = "okay";
  458. port {
  459. usbotg_hs_ep: endpoint {
  460. remote-endpoint = <&con_usb_c_g0_ep>;
  461. };
  462. };
  463. };
  464. &usbphyc {
  465. status = "okay";
  466. };
  467. &usbphyc_port0 {
  468. phy-supply = <&scmi_vdd_usb>;
  469. st,current-boost-microamp = <1000>;
  470. st,decrease-hs-slew-rate;
  471. st,tune-hs-dc-level = <2>;
  472. st,enable-hs-rftime-reduction;
  473. st,trim-hs-current = <11>;
  474. st,trim-hs-impedance = <2>;
  475. st,tune-squelch-level = <1>;
  476. st,enable-hs-rx-gain-eq;
  477. st,no-hs-ftime-ctrl;
  478. st,no-lsfs-sc;
  479. };
  480. &usbphyc_port1 {
  481. phy-supply = <&scmi_vdd_usb>;
  482. st,current-boost-microamp = <1000>;
  483. st,decrease-hs-slew-rate;
  484. st,tune-hs-dc-level = <2>;
  485. st,enable-hs-rftime-reduction;
  486. st,trim-hs-current = <11>;
  487. st,trim-hs-impedance = <2>;
  488. st,tune-squelch-level = <1>;
  489. st,enable-hs-rx-gain-eq;
  490. st,no-hs-ftime-ctrl;
  491. st,no-lsfs-sc;
  492. };