mt8183-pumpkin.dts 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2021 BayLibre, SAS.
  4. * Author: Fabien Parent <fparent@baylibre.com>
  5. */
  6. /dts-v1/;
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/input/input.h>
  9. #include "mt8183.dtsi"
  10. #include "mt6358.dtsi"
  11. / {
  12. model = "Pumpkin MT8183";
  13. compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
  14. aliases {
  15. serial0 = &uart0;
  16. };
  17. memory@40000000 {
  18. device_type = "memory";
  19. reg = <0 0x40000000 0 0x80000000>;
  20. };
  21. chosen {
  22. stdout-path = "serial0:921600n8";
  23. };
  24. reserved-memory {
  25. #address-cells = <2>;
  26. #size-cells = <2>;
  27. ranges;
  28. scp_mem_reserved: scp-mem@50000000 {
  29. compatible = "shared-dma-pool";
  30. reg = <0 0x50000000 0 0x2900000>;
  31. no-map;
  32. };
  33. };
  34. leds {
  35. compatible = "gpio-leds";
  36. led-red {
  37. label = "red";
  38. gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
  39. default-state = "off";
  40. };
  41. led-green {
  42. label = "green";
  43. gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
  44. default-state = "off";
  45. };
  46. };
  47. thermistor {
  48. compatible = "murata,ncp03wf104";
  49. pullup-uv = <1800000>;
  50. pullup-ohm = <390000>;
  51. pulldown-ohm = <0>;
  52. io-channels = <&auxadc 0>;
  53. };
  54. connector {
  55. compatible = "hdmi-connector";
  56. label = "hdmi";
  57. type = "d";
  58. port {
  59. hdmi_connector_in: endpoint {
  60. remote-endpoint = <&hdmi_connector_out>;
  61. };
  62. };
  63. };
  64. };
  65. &auxadc {
  66. status = "okay";
  67. };
  68. &gpu {
  69. mali-supply = <&mt6358_vgpu_reg>;
  70. };
  71. &i2c0 {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&i2c_pins_0>;
  74. status = "okay";
  75. clock-frequency = <100000>;
  76. };
  77. &i2c1 {
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&i2c_pins_1>;
  80. status = "okay";
  81. clock-frequency = <100000>;
  82. };
  83. &i2c2 {
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&i2c_pins_2>;
  86. status = "okay";
  87. clock-frequency = <100000>;
  88. };
  89. &i2c3 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&i2c_pins_3>;
  92. status = "okay";
  93. clock-frequency = <100000>;
  94. };
  95. &i2c4 {
  96. pinctrl-names = "default";
  97. pinctrl-0 = <&i2c_pins_4>;
  98. status = "okay";
  99. clock-frequency = <100000>;
  100. };
  101. &i2c5 {
  102. pinctrl-names = "default";
  103. pinctrl-0 = <&i2c_pins_5>;
  104. status = "okay";
  105. clock-frequency = <100000>;
  106. };
  107. &i2c6 {
  108. pinctrl-names = "default";
  109. pinctrl-0 = <&i2c6_pins>;
  110. status = "okay";
  111. clock-frequency = <100000>;
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. it66121hdmitx: hdmitx@4c {
  115. compatible = "ite,it66121";
  116. reg = <0x4c>;
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&ite_pins>;
  119. reset-gpios = <&pio 160 GPIO_ACTIVE_LOW>;
  120. interrupt-parent = <&pio>;
  121. interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
  122. vcn33-supply = <&mt6358_vcn33_reg>;
  123. vcn18-supply = <&mt6358_vcn18_reg>;
  124. vrf12-supply = <&mt6358_vrf12_reg>;
  125. ports {
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. port@0 {
  129. reg = <0>;
  130. it66121_in: endpoint {
  131. bus-width = <12>;
  132. remote-endpoint = <&dpi_out>;
  133. };
  134. };
  135. port@1 {
  136. reg = <1>;
  137. hdmi_connector_out: endpoint {
  138. remote-endpoint = <&hdmi_connector_in>;
  139. };
  140. };
  141. };
  142. };
  143. };
  144. &keyboard {
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&keyboard_pins>;
  147. status = "okay";
  148. linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN)
  149. MATRIX_KEY(0x01, 0x00, KEY_VOLUMEUP)>;
  150. keypad,num-rows = <2>;
  151. keypad,num-columns = <1>;
  152. debounce-delay-ms = <32>;
  153. mediatek,keys-per-group = <2>;
  154. };
  155. &mmc0 {
  156. status = "okay";
  157. pinctrl-names = "default", "state_uhs";
  158. pinctrl-0 = <&mmc0_pins_default>;
  159. pinctrl-1 = <&mmc0_pins_uhs>;
  160. bus-width = <8>;
  161. max-frequency = <200000000>;
  162. cap-mmc-highspeed;
  163. mmc-hs200-1_8v;
  164. mmc-hs400-1_8v;
  165. cap-mmc-hw-reset;
  166. no-sdio;
  167. no-sd;
  168. hs400-ds-delay = <0x12814>;
  169. vmmc-supply = <&mt6358_vemc_reg>;
  170. vqmmc-supply = <&mt6358_vio18_reg>;
  171. assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
  172. assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
  173. non-removable;
  174. };
  175. &mmc1 {
  176. status = "okay";
  177. pinctrl-names = "default", "state_uhs";
  178. pinctrl-0 = <&mmc1_pins_default>;
  179. pinctrl-1 = <&mmc1_pins_uhs>;
  180. bus-width = <4>;
  181. max-frequency = <200000000>;
  182. cap-sd-highspeed;
  183. sd-uhs-sdr50;
  184. sd-uhs-sdr104;
  185. cap-sdio-irq;
  186. no-mmc;
  187. no-sd;
  188. vmmc-supply = <&mt6358_vmch_reg>;
  189. vqmmc-supply = <&mt6358_vmc_reg>;
  190. keep-power-in-suspend;
  191. wakeup-source;
  192. non-removable;
  193. };
  194. &mt6358_vgpu_reg {
  195. regulator-min-microvolt = <625000>;
  196. regulator-max-microvolt = <900000>;
  197. regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
  198. regulator-coupled-max-spread = <100000>;
  199. };
  200. &mt6358_vsram_gpu_reg {
  201. regulator-min-microvolt = <850000>;
  202. regulator-max-microvolt = <1000000>;
  203. regulator-coupled-with = <&mt6358_vgpu_reg>;
  204. regulator-coupled-max-spread = <100000>;
  205. };
  206. &pio {
  207. i2c_pins_0: i2c0 {
  208. pins_i2c {
  209. pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
  210. <PINMUX_GPIO83__FUNC_SCL0>;
  211. mediatek,pull-up-adv = <3>;
  212. };
  213. };
  214. i2c_pins_1: i2c1 {
  215. pins_i2c {
  216. pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
  217. <PINMUX_GPIO84__FUNC_SCL1>;
  218. mediatek,pull-up-adv = <3>;
  219. };
  220. };
  221. i2c_pins_2: i2c2 {
  222. pins_i2c {
  223. pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
  224. <PINMUX_GPIO104__FUNC_SDA2>;
  225. mediatek,pull-up-adv = <3>;
  226. };
  227. };
  228. i2c_pins_3: i2c3 {
  229. pins_i2c {
  230. pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
  231. <PINMUX_GPIO51__FUNC_SDA3>;
  232. mediatek,pull-up-adv = <3>;
  233. };
  234. };
  235. i2c_pins_4: i2c4 {
  236. pins_i2c {
  237. pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
  238. <PINMUX_GPIO106__FUNC_SDA4>;
  239. mediatek,pull-up-adv = <3>;
  240. };
  241. };
  242. i2c_pins_5: i2c5 {
  243. pins_i2c {
  244. pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
  245. <PINMUX_GPIO49__FUNC_SDA5>;
  246. mediatek,pull-up-adv = <3>;
  247. };
  248. };
  249. i2c6_pins: i2c6 {
  250. pins_cmd_dat {
  251. pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
  252. <PINMUX_GPIO114__FUNC_SDA6>;
  253. mediatek,pull-up-adv = <3>;
  254. };
  255. };
  256. keyboard_pins: keyboard {
  257. pins_keyboard {
  258. pinmux = <PINMUX_GPIO91__FUNC_KPROW1>,
  259. <PINMUX_GPIO92__FUNC_KPROW0>,
  260. <PINMUX_GPIO93__FUNC_KPCOL0>;
  261. };
  262. };
  263. mmc0_pins_default: mmc0-pins-default {
  264. pins_cmd_dat {
  265. pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
  266. <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
  267. <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
  268. <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
  269. <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
  270. <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
  271. <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
  272. <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
  273. <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
  274. input-enable;
  275. drive-strength = <MTK_DRIVE_14mA>;
  276. mediatek,pull-up-adv = <01>;
  277. };
  278. pins_clk {
  279. pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
  280. drive-strength = <MTK_DRIVE_14mA>;
  281. mediatek,pull-down-adv = <10>;
  282. };
  283. pins_rst {
  284. pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
  285. drive-strength = <MTK_DRIVE_14mA>;
  286. mediatek,pull-down-adv = <01>;
  287. };
  288. };
  289. mmc0_pins_uhs: mmc0-pins-uhs {
  290. pins_cmd_dat {
  291. pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
  292. <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
  293. <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
  294. <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
  295. <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
  296. <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
  297. <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
  298. <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
  299. <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
  300. input-enable;
  301. drive-strength = <MTK_DRIVE_14mA>;
  302. mediatek,pull-up-adv = <01>;
  303. };
  304. pins_clk {
  305. pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
  306. drive-strength = <MTK_DRIVE_14mA>;
  307. mediatek,pull-down-adv = <10>;
  308. };
  309. pins_ds {
  310. pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
  311. drive-strength = <MTK_DRIVE_14mA>;
  312. mediatek,pull-down-adv = <10>;
  313. };
  314. pins_rst {
  315. pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
  316. drive-strength = <MTK_DRIVE_14mA>;
  317. mediatek,pull-up-adv = <01>;
  318. };
  319. };
  320. mmc1_pins_default: mmc1-pins-default {
  321. pins_cmd_dat {
  322. pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
  323. <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
  324. <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
  325. <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
  326. <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
  327. input-enable;
  328. mediatek,pull-up-adv = <10>;
  329. };
  330. pins_clk {
  331. pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
  332. input-enable;
  333. mediatek,pull-down-adv = <10>;
  334. };
  335. pins_pmu {
  336. pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
  337. output-high;
  338. };
  339. };
  340. mmc1_pins_uhs: mmc1-pins-uhs {
  341. pins_cmd_dat {
  342. pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
  343. <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
  344. <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
  345. <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
  346. <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
  347. drive-strength = <6>;
  348. input-enable;
  349. mediatek,pull-up-adv = <10>;
  350. };
  351. pins_clk {
  352. pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
  353. drive-strength = <8>;
  354. mediatek,pull-down-adv = <10>;
  355. input-enable;
  356. };
  357. };
  358. ite_pins: ite-pins {
  359. pins-irq {
  360. pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
  361. input-enable;
  362. bias-pull-up;
  363. };
  364. pins-rst {
  365. pinmux = <PINMUX_GPIO160__FUNC_GPIO160>;
  366. output-high;
  367. };
  368. };
  369. dpi_func_pins: dpi-func-pins {
  370. pins-dpi {
  371. pinmux = <PINMUX_GPIO12__FUNC_I2S5_BCK>,
  372. <PINMUX_GPIO46__FUNC_I2S5_LRCK>,
  373. <PINMUX_GPIO47__FUNC_I2S5_DO>,
  374. <PINMUX_GPIO13__FUNC_DBPI_D0>,
  375. <PINMUX_GPIO14__FUNC_DBPI_D1>,
  376. <PINMUX_GPIO15__FUNC_DBPI_D2>,
  377. <PINMUX_GPIO16__FUNC_DBPI_D3>,
  378. <PINMUX_GPIO17__FUNC_DBPI_D4>,
  379. <PINMUX_GPIO18__FUNC_DBPI_D5>,
  380. <PINMUX_GPIO19__FUNC_DBPI_D6>,
  381. <PINMUX_GPIO20__FUNC_DBPI_D7>,
  382. <PINMUX_GPIO21__FUNC_DBPI_D8>,
  383. <PINMUX_GPIO22__FUNC_DBPI_D9>,
  384. <PINMUX_GPIO23__FUNC_DBPI_D10>,
  385. <PINMUX_GPIO24__FUNC_DBPI_D11>,
  386. <PINMUX_GPIO25__FUNC_DBPI_HSYNC>,
  387. <PINMUX_GPIO26__FUNC_DBPI_VSYNC>,
  388. <PINMUX_GPIO27__FUNC_DBPI_DE>,
  389. <PINMUX_GPIO28__FUNC_DBPI_CK>;
  390. };
  391. };
  392. dpi_idle_pins: dpi-idle-pins {
  393. pins-idle {
  394. pinmux = <PINMUX_GPIO12__FUNC_GPIO12>,
  395. <PINMUX_GPIO46__FUNC_GPIO46>,
  396. <PINMUX_GPIO47__FUNC_GPIO47>,
  397. <PINMUX_GPIO13__FUNC_GPIO13>,
  398. <PINMUX_GPIO14__FUNC_GPIO14>,
  399. <PINMUX_GPIO15__FUNC_GPIO15>,
  400. <PINMUX_GPIO16__FUNC_GPIO16>,
  401. <PINMUX_GPIO17__FUNC_GPIO17>,
  402. <PINMUX_GPIO18__FUNC_GPIO18>,
  403. <PINMUX_GPIO19__FUNC_GPIO19>,
  404. <PINMUX_GPIO20__FUNC_GPIO20>,
  405. <PINMUX_GPIO21__FUNC_GPIO21>,
  406. <PINMUX_GPIO22__FUNC_GPIO22>,
  407. <PINMUX_GPIO23__FUNC_GPIO23>,
  408. <PINMUX_GPIO24__FUNC_GPIO24>,
  409. <PINMUX_GPIO25__FUNC_GPIO25>,
  410. <PINMUX_GPIO26__FUNC_GPIO26>,
  411. <PINMUX_GPIO27__FUNC_GPIO27>,
  412. <PINMUX_GPIO28__FUNC_GPIO28>;
  413. };
  414. };
  415. };
  416. &pmic {
  417. interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
  418. };
  419. &mfg {
  420. domain-supply = <&mt6358_vgpu_reg>;
  421. };
  422. &cpu0 {
  423. proc-supply = <&mt6358_vproc12_reg>;
  424. };
  425. &cpu1 {
  426. proc-supply = <&mt6358_vproc12_reg>;
  427. };
  428. &cpu2 {
  429. proc-supply = <&mt6358_vproc12_reg>;
  430. };
  431. &cpu3 {
  432. proc-supply = <&mt6358_vproc12_reg>;
  433. };
  434. &cpu4 {
  435. proc-supply = <&mt6358_vproc11_reg>;
  436. };
  437. &cpu5 {
  438. proc-supply = <&mt6358_vproc11_reg>;
  439. };
  440. &cpu6 {
  441. proc-supply = <&mt6358_vproc11_reg>;
  442. };
  443. &cpu7 {
  444. proc-supply = <&mt6358_vproc11_reg>;
  445. };
  446. &uart0 {
  447. status = "okay";
  448. };
  449. &scp {
  450. status = "okay";
  451. };
  452. &dpi0 {
  453. pinctrl-names = "default", "sleep";
  454. pinctrl-0 = <&dpi_func_pins>;
  455. pinctrl-1 = <&dpi_idle_pins>;
  456. status = "okay";
  457. port {
  458. dpi_out: endpoint {
  459. remote-endpoint = <&it66121_in>;
  460. };
  461. };
  462. };