pgtable_32.h 11 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _SPARC_PGTABLE_H
  3. #define _SPARC_PGTABLE_H
  4. /* asm/pgtable.h: Defines and functions used to work
  5. * with Sparc page tables.
  6. *
  7. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  8. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  9. */
  10. #include <linux/const.h>
  11. #define PMD_SHIFT 18
  12. #define PMD_SIZE (1UL << PMD_SHIFT)
  13. #define PMD_MASK (~(PMD_SIZE-1))
  14. #define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK)
  15. #define PGDIR_SHIFT 24
  16. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  17. #define PGDIR_MASK (~(PGDIR_SIZE-1))
  18. #define PGDIR_ALIGN(__addr) (((__addr) + ~PGDIR_MASK) & PGDIR_MASK)
  19. #ifndef __ASSEMBLY__
  20. #include <asm-generic/pgtable-nopud.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/mm_types.h>
  23. #include <asm/types.h>
  24. #include <asm/pgtsrmmu.h>
  25. #include <asm/vaddrs.h>
  26. #include <asm/oplib.h>
  27. #include <asm/cpu_type.h>
  28. struct vm_area_struct;
  29. struct page;
  30. void load_mmu(void);
  31. unsigned long calc_highpages(void);
  32. unsigned long __init bootmem_init(unsigned long *pages_avail);
  33. #define pte_ERROR(e) __builtin_trap()
  34. #define pmd_ERROR(e) __builtin_trap()
  35. #define pgd_ERROR(e) __builtin_trap()
  36. #define PTRS_PER_PTE 64
  37. #define PTRS_PER_PMD 64
  38. #define PTRS_PER_PGD 256
  39. #define USER_PTRS_PER_PGD PAGE_OFFSET / PGDIR_SIZE
  40. #define PTE_SIZE (PTRS_PER_PTE*4)
  41. #define PAGE_NONE SRMMU_PAGE_NONE
  42. #define PAGE_SHARED SRMMU_PAGE_SHARED
  43. #define PAGE_COPY SRMMU_PAGE_COPY
  44. #define PAGE_READONLY SRMMU_PAGE_RDONLY
  45. #define PAGE_KERNEL SRMMU_PAGE_KERNEL
  46. /* Top-level page directory - dummy used by init-mm.
  47. * srmmu.c will assign the real one (which is dynamically sized) */
  48. #define swapper_pg_dir NULL
  49. void paging_init(void);
  50. extern unsigned long ptr_in_current_pgd;
  51. /* First physical page can be anywhere, the following is needed so that
  52. * va-->pa and vice versa conversions work properly without performance
  53. * hit for all __pa()/__va() operations.
  54. */
  55. extern unsigned long phys_base;
  56. extern unsigned long pfn_base;
  57. /*
  58. * ZERO_PAGE is a global shared page that is always zero: used
  59. * for zero-mapped memory areas etc..
  60. */
  61. extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  62. #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  63. /*
  64. * In general all page table modifications should use the V8 atomic
  65. * swap instruction. This insures the mmu and the cpu are in sync
  66. * with respect to ref/mod bits in the page tables.
  67. */
  68. static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)
  69. {
  70. __asm__ __volatile__("swap [%2], %0" :
  71. "=&r" (value) : "0" (value), "r" (addr) : "memory");
  72. return value;
  73. }
  74. /* Certain architectures need to do special things when pte's
  75. * within a page table are directly modified. Thus, the following
  76. * hook is made available.
  77. */
  78. static inline void set_pte(pte_t *ptep, pte_t pteval)
  79. {
  80. srmmu_swap((unsigned long *)ptep, pte_val(pteval));
  81. }
  82. static inline int srmmu_device_memory(unsigned long x)
  83. {
  84. return ((x & 0xF0000000) != 0);
  85. }
  86. static inline unsigned long pmd_pfn(pmd_t pmd)
  87. {
  88. return (pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4);
  89. }
  90. static inline struct page *pmd_page(pmd_t pmd)
  91. {
  92. if (srmmu_device_memory(pmd_val(pmd)))
  93. BUG();
  94. return pfn_to_page(pmd_pfn(pmd));
  95. }
  96. static inline unsigned long __pmd_page(pmd_t pmd)
  97. {
  98. unsigned long v;
  99. if (srmmu_device_memory(pmd_val(pmd)))
  100. BUG();
  101. v = pmd_val(pmd) & SRMMU_PTD_PMASK;
  102. return (unsigned long)__nocache_va(v << 4);
  103. }
  104. static inline unsigned long pmd_page_vaddr(pmd_t pmd)
  105. {
  106. unsigned long v = pmd_val(pmd) & SRMMU_PTD_PMASK;
  107. return (unsigned long)__nocache_va(v << 4);
  108. }
  109. static inline pmd_t *pud_pgtable(pud_t pud)
  110. {
  111. if (srmmu_device_memory(pud_val(pud))) {
  112. return (pmd_t *)~0;
  113. } else {
  114. unsigned long v = pud_val(pud) & SRMMU_PTD_PMASK;
  115. return (pmd_t *)__nocache_va(v << 4);
  116. }
  117. }
  118. static inline int pte_present(pte_t pte)
  119. {
  120. return ((pte_val(pte) & SRMMU_ET_MASK) == SRMMU_ET_PTE);
  121. }
  122. static inline int pte_none(pte_t pte)
  123. {
  124. return !pte_val(pte);
  125. }
  126. static inline void __pte_clear(pte_t *ptep)
  127. {
  128. set_pte(ptep, __pte(0));
  129. }
  130. static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  131. {
  132. __pte_clear(ptep);
  133. }
  134. static inline int pmd_bad(pmd_t pmd)
  135. {
  136. return (pmd_val(pmd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
  137. }
  138. static inline int pmd_present(pmd_t pmd)
  139. {
  140. return ((pmd_val(pmd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
  141. }
  142. static inline int pmd_none(pmd_t pmd)
  143. {
  144. return !pmd_val(pmd);
  145. }
  146. static inline void pmd_clear(pmd_t *pmdp)
  147. {
  148. set_pte((pte_t *)&pmd_val(*pmdp), __pte(0));
  149. }
  150. static inline int pud_none(pud_t pud)
  151. {
  152. return !(pud_val(pud) & 0xFFFFFFF);
  153. }
  154. static inline int pud_bad(pud_t pud)
  155. {
  156. return (pud_val(pud) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
  157. }
  158. static inline int pud_present(pud_t pud)
  159. {
  160. return ((pud_val(pud) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
  161. }
  162. static inline void pud_clear(pud_t *pudp)
  163. {
  164. set_pte((pte_t *)pudp, __pte(0));
  165. }
  166. /*
  167. * The following only work if pte_present() is true.
  168. * Undefined behaviour if not..
  169. */
  170. static inline int pte_write(pte_t pte)
  171. {
  172. return pte_val(pte) & SRMMU_WRITE;
  173. }
  174. static inline int pte_dirty(pte_t pte)
  175. {
  176. return pte_val(pte) & SRMMU_DIRTY;
  177. }
  178. static inline int pte_young(pte_t pte)
  179. {
  180. return pte_val(pte) & SRMMU_REF;
  181. }
  182. static inline pte_t pte_wrprotect(pte_t pte)
  183. {
  184. return __pte(pte_val(pte) & ~SRMMU_WRITE);
  185. }
  186. static inline pte_t pte_mkclean(pte_t pte)
  187. {
  188. return __pte(pte_val(pte) & ~SRMMU_DIRTY);
  189. }
  190. static inline pte_t pte_mkold(pte_t pte)
  191. {
  192. return __pte(pte_val(pte) & ~SRMMU_REF);
  193. }
  194. static inline pte_t pte_mkwrite_novma(pte_t pte)
  195. {
  196. return __pte(pte_val(pte) | SRMMU_WRITE);
  197. }
  198. static inline pte_t pte_mkdirty(pte_t pte)
  199. {
  200. return __pte(pte_val(pte) | SRMMU_DIRTY);
  201. }
  202. static inline pte_t pte_mkyoung(pte_t pte)
  203. {
  204. return __pte(pte_val(pte) | SRMMU_REF);
  205. }
  206. #define PFN_PTE_SHIFT (PAGE_SHIFT - 4)
  207. #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot)
  208. static inline unsigned long pte_pfn(pte_t pte)
  209. {
  210. if (srmmu_device_memory(pte_val(pte))) {
  211. /* Just return something that will cause
  212. * pfn_valid() to return false. This makes
  213. * copy_one_pte() to just directly copy to
  214. * PTE over.
  215. */
  216. return ~0UL;
  217. }
  218. return (pte_val(pte) & SRMMU_PTE_PMASK) >> PFN_PTE_SHIFT;
  219. }
  220. #define pte_page(pte) pfn_to_page(pte_pfn(pte))
  221. /*
  222. * Conversion functions: convert a page and protection to a page entry,
  223. * and a page entry and page directory to the page they refer to.
  224. */
  225. static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
  226. {
  227. return __pte((page_to_pfn(page) << (PAGE_SHIFT-4)) | pgprot_val(pgprot));
  228. }
  229. static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot)
  230. {
  231. return __pte(((page) >> 4) | pgprot_val(pgprot));
  232. }
  233. static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space)
  234. {
  235. return __pte(((page) >> 4) | (space << 28) | pgprot_val(pgprot));
  236. }
  237. #define pgprot_noncached pgprot_noncached
  238. static inline pgprot_t pgprot_noncached(pgprot_t prot)
  239. {
  240. pgprot_val(prot) &= ~pgprot_val(__pgprot(SRMMU_CACHE));
  241. return prot;
  242. }
  243. static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
  244. static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
  245. {
  246. return __pte((pte_val(pte) & SRMMU_CHG_MASK) |
  247. pgprot_val(newprot));
  248. }
  249. /* only used by the huge vmap code, should never be called */
  250. #define pud_page(pud) NULL
  251. struct seq_file;
  252. void mmu_info(struct seq_file *m);
  253. /* Fault handler stuff... */
  254. #define FAULT_CODE_PROT 0x1
  255. #define FAULT_CODE_WRITE 0x2
  256. #define FAULT_CODE_USER 0x4
  257. #define update_mmu_cache(vma, address, ptep) do { } while (0)
  258. #define update_mmu_cache_range(vmf, vma, address, ptep, nr) do { } while (0)
  259. void srmmu_mapiorange(unsigned int bus, unsigned long xpa,
  260. unsigned long xva, unsigned int len);
  261. void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len);
  262. /*
  263. * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
  264. * are !pte_none() && !pte_present().
  265. *
  266. * Format of swap PTEs:
  267. *
  268. * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
  269. * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
  270. * <-------------- offset ---------------> < type -> E 0 0 0 0 0 0
  271. */
  272. static inline unsigned long __swp_type(swp_entry_t entry)
  273. {
  274. return (entry.val >> SRMMU_SWP_TYPE_SHIFT) & SRMMU_SWP_TYPE_MASK;
  275. }
  276. static inline unsigned long __swp_offset(swp_entry_t entry)
  277. {
  278. return (entry.val >> SRMMU_SWP_OFF_SHIFT) & SRMMU_SWP_OFF_MASK;
  279. }
  280. static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
  281. {
  282. return (swp_entry_t) {
  283. (type & SRMMU_SWP_TYPE_MASK) << SRMMU_SWP_TYPE_SHIFT
  284. | (offset & SRMMU_SWP_OFF_MASK) << SRMMU_SWP_OFF_SHIFT };
  285. }
  286. #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
  287. #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
  288. static inline int pte_swp_exclusive(pte_t pte)
  289. {
  290. return pte_val(pte) & SRMMU_SWP_EXCLUSIVE;
  291. }
  292. static inline pte_t pte_swp_mkexclusive(pte_t pte)
  293. {
  294. return __pte(pte_val(pte) | SRMMU_SWP_EXCLUSIVE);
  295. }
  296. static inline pte_t pte_swp_clear_exclusive(pte_t pte)
  297. {
  298. return __pte(pte_val(pte) & ~SRMMU_SWP_EXCLUSIVE);
  299. }
  300. static inline unsigned long
  301. __get_phys (unsigned long addr)
  302. {
  303. switch (sparc_cpu_model){
  304. case sun4m:
  305. case sun4d:
  306. return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
  307. default:
  308. return 0;
  309. }
  310. }
  311. static inline int
  312. __get_iospace (unsigned long addr)
  313. {
  314. switch (sparc_cpu_model){
  315. case sun4m:
  316. case sun4d:
  317. return (srmmu_get_pte (addr) >> 28);
  318. default:
  319. return -1;
  320. }
  321. }
  322. /*
  323. * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
  324. * its high 4 bits. These macros/functions put it there or get it from there.
  325. */
  326. #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4)))
  327. #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
  328. #define GET_PFN(pfn) (pfn & 0x0fffffffUL)
  329. int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
  330. unsigned long, pgprot_t);
  331. static inline int io_remap_pfn_range(struct vm_area_struct *vma,
  332. unsigned long from, unsigned long pfn,
  333. unsigned long size, pgprot_t prot)
  334. {
  335. unsigned long long offset, space, phys_base;
  336. offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT;
  337. space = GET_IOSPACE(pfn);
  338. phys_base = offset | (space << 32ULL);
  339. return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
  340. }
  341. #define io_remap_pfn_range io_remap_pfn_range
  342. #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
  343. #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
  344. ({ \
  345. int __changed = !pte_same(*(__ptep), __entry); \
  346. if (__changed) { \
  347. set_pte(__ptep, __entry); \
  348. flush_tlb_page(__vma, __address); \
  349. } \
  350. __changed; \
  351. })
  352. #endif /* !(__ASSEMBLY__) */
  353. #define VMALLOC_START _AC(0xfe600000,UL)
  354. #define VMALLOC_END _AC(0xffc00000,UL)
  355. #define MODULES_VADDR VMALLOC_START
  356. #define MODULES_END VMALLOC_END
  357. /* We provide our own get_unmapped_area to cope with VA holes for userland */
  358. #define HAVE_ARCH_UNMAPPED_AREA
  359. #define pmd_pgtable(pmd) ((pgtable_t)__pmd_page(pmd))
  360. #endif /* !(_SPARC_PGTABLE_H) */