hci_intel.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. *
  4. * Bluetooth HCI UART driver for Intel devices
  5. *
  6. * Copyright (C) 2015 Intel Corporation
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/errno.h>
  10. #include <linux/skbuff.h>
  11. #include <linux/firmware.h>
  12. #include <linux/module.h>
  13. #include <linux/wait.h>
  14. #include <linux/tty.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/gpio/consumer.h>
  17. #include <linux/acpi.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/pm_runtime.h>
  20. #include <net/bluetooth/bluetooth.h>
  21. #include <net/bluetooth/hci_core.h>
  22. #include "hci_uart.h"
  23. #include "btintel.h"
  24. #define STATE_BOOTLOADER 0
  25. #define STATE_DOWNLOADING 1
  26. #define STATE_FIRMWARE_LOADED 2
  27. #define STATE_FIRMWARE_FAILED 3
  28. #define STATE_BOOTING 4
  29. #define STATE_LPM_ENABLED 5
  30. #define STATE_TX_ACTIVE 6
  31. #define STATE_SUSPENDED 7
  32. #define STATE_LPM_TRANSACTION 8
  33. #define HCI_LPM_WAKE_PKT 0xf0
  34. #define HCI_LPM_PKT 0xf1
  35. #define HCI_LPM_MAX_SIZE 10
  36. #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE
  37. #define LPM_OP_TX_NOTIFY 0x00
  38. #define LPM_OP_SUSPEND_ACK 0x02
  39. #define LPM_OP_RESUME_ACK 0x03
  40. #define LPM_SUSPEND_DELAY_MS 1000
  41. struct hci_lpm_pkt {
  42. __u8 opcode;
  43. __u8 dlen;
  44. __u8 data[];
  45. } __packed;
  46. struct intel_device {
  47. struct list_head list;
  48. struct platform_device *pdev;
  49. struct gpio_desc *reset;
  50. struct hci_uart *hu;
  51. struct mutex hu_lock;
  52. int irq;
  53. };
  54. static LIST_HEAD(intel_device_list);
  55. static DEFINE_MUTEX(intel_device_list_lock);
  56. struct intel_data {
  57. struct sk_buff *rx_skb;
  58. struct sk_buff_head txq;
  59. struct work_struct busy_work;
  60. struct hci_uart *hu;
  61. unsigned long flags;
  62. };
  63. static u8 intel_convert_speed(unsigned int speed)
  64. {
  65. switch (speed) {
  66. case 9600:
  67. return 0x00;
  68. case 19200:
  69. return 0x01;
  70. case 38400:
  71. return 0x02;
  72. case 57600:
  73. return 0x03;
  74. case 115200:
  75. return 0x04;
  76. case 230400:
  77. return 0x05;
  78. case 460800:
  79. return 0x06;
  80. case 921600:
  81. return 0x07;
  82. case 1843200:
  83. return 0x08;
  84. case 3250000:
  85. return 0x09;
  86. case 2000000:
  87. return 0x0a;
  88. case 3000000:
  89. return 0x0b;
  90. default:
  91. return 0xff;
  92. }
  93. }
  94. static int intel_wait_booting(struct hci_uart *hu)
  95. {
  96. struct intel_data *intel = hu->priv;
  97. int err;
  98. err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING,
  99. TASK_INTERRUPTIBLE,
  100. msecs_to_jiffies(1000));
  101. if (err == -EINTR) {
  102. bt_dev_err(hu->hdev, "Device boot interrupted");
  103. return -EINTR;
  104. }
  105. if (err) {
  106. bt_dev_err(hu->hdev, "Device boot timeout");
  107. return -ETIMEDOUT;
  108. }
  109. return err;
  110. }
  111. #ifdef CONFIG_PM
  112. static int intel_wait_lpm_transaction(struct hci_uart *hu)
  113. {
  114. struct intel_data *intel = hu->priv;
  115. int err;
  116. err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION,
  117. TASK_INTERRUPTIBLE,
  118. msecs_to_jiffies(1000));
  119. if (err == -EINTR) {
  120. bt_dev_err(hu->hdev, "LPM transaction interrupted");
  121. return -EINTR;
  122. }
  123. if (err) {
  124. bt_dev_err(hu->hdev, "LPM transaction timeout");
  125. return -ETIMEDOUT;
  126. }
  127. return err;
  128. }
  129. static int intel_lpm_suspend(struct hci_uart *hu)
  130. {
  131. static const u8 suspend[] = { 0x01, 0x01, 0x01 };
  132. struct intel_data *intel = hu->priv;
  133. struct sk_buff *skb;
  134. if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
  135. test_bit(STATE_SUSPENDED, &intel->flags))
  136. return 0;
  137. if (test_bit(STATE_TX_ACTIVE, &intel->flags))
  138. return -EAGAIN;
  139. bt_dev_dbg(hu->hdev, "Suspending");
  140. skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL);
  141. if (!skb) {
  142. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  143. return -ENOMEM;
  144. }
  145. skb_put_data(skb, suspend, sizeof(suspend));
  146. hci_skb_pkt_type(skb) = HCI_LPM_PKT;
  147. set_bit(STATE_LPM_TRANSACTION, &intel->flags);
  148. /* LPM flow is a priority, enqueue packet at list head */
  149. skb_queue_head(&intel->txq, skb);
  150. hci_uart_tx_wakeup(hu);
  151. intel_wait_lpm_transaction(hu);
  152. /* Even in case of failure, continue and test the suspended flag */
  153. clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
  154. if (!test_bit(STATE_SUSPENDED, &intel->flags)) {
  155. bt_dev_err(hu->hdev, "Device suspend error");
  156. return -EINVAL;
  157. }
  158. bt_dev_dbg(hu->hdev, "Suspended");
  159. hci_uart_set_flow_control(hu, true);
  160. return 0;
  161. }
  162. static int intel_lpm_resume(struct hci_uart *hu)
  163. {
  164. struct intel_data *intel = hu->priv;
  165. struct sk_buff *skb;
  166. if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
  167. !test_bit(STATE_SUSPENDED, &intel->flags))
  168. return 0;
  169. bt_dev_dbg(hu->hdev, "Resuming");
  170. hci_uart_set_flow_control(hu, false);
  171. skb = bt_skb_alloc(0, GFP_KERNEL);
  172. if (!skb) {
  173. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  174. return -ENOMEM;
  175. }
  176. hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT;
  177. set_bit(STATE_LPM_TRANSACTION, &intel->flags);
  178. /* LPM flow is a priority, enqueue packet at list head */
  179. skb_queue_head(&intel->txq, skb);
  180. hci_uart_tx_wakeup(hu);
  181. intel_wait_lpm_transaction(hu);
  182. /* Even in case of failure, continue and test the suspended flag */
  183. clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
  184. if (test_bit(STATE_SUSPENDED, &intel->flags)) {
  185. bt_dev_err(hu->hdev, "Device resume error");
  186. return -EINVAL;
  187. }
  188. bt_dev_dbg(hu->hdev, "Resumed");
  189. return 0;
  190. }
  191. #endif /* CONFIG_PM */
  192. static int intel_lpm_host_wake(struct hci_uart *hu)
  193. {
  194. static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 };
  195. struct intel_data *intel = hu->priv;
  196. struct sk_buff *skb;
  197. hci_uart_set_flow_control(hu, false);
  198. clear_bit(STATE_SUSPENDED, &intel->flags);
  199. skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL);
  200. if (!skb) {
  201. bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
  202. return -ENOMEM;
  203. }
  204. skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack));
  205. hci_skb_pkt_type(skb) = HCI_LPM_PKT;
  206. /* LPM flow is a priority, enqueue packet at list head */
  207. skb_queue_head(&intel->txq, skb);
  208. hci_uart_tx_wakeup(hu);
  209. bt_dev_dbg(hu->hdev, "Resumed by controller");
  210. return 0;
  211. }
  212. static irqreturn_t intel_irq(int irq, void *dev_id)
  213. {
  214. struct intel_device *idev = dev_id;
  215. dev_info(&idev->pdev->dev, "hci_intel irq\n");
  216. mutex_lock(&idev->hu_lock);
  217. if (idev->hu)
  218. intel_lpm_host_wake(idev->hu);
  219. mutex_unlock(&idev->hu_lock);
  220. /* Host/Controller are now LPM resumed, trigger a new delayed suspend */
  221. pm_runtime_get(&idev->pdev->dev);
  222. pm_runtime_mark_last_busy(&idev->pdev->dev);
  223. pm_runtime_put_autosuspend(&idev->pdev->dev);
  224. return IRQ_HANDLED;
  225. }
  226. static int intel_set_power(struct hci_uart *hu, bool powered)
  227. {
  228. struct intel_device *idev;
  229. int err = -ENODEV;
  230. if (!hu->tty->dev)
  231. return err;
  232. mutex_lock(&intel_device_list_lock);
  233. list_for_each_entry(idev, &intel_device_list, list) {
  234. /* tty device and pdev device should share the same parent
  235. * which is the UART port.
  236. */
  237. if (hu->tty->dev->parent != idev->pdev->dev.parent)
  238. continue;
  239. if (!idev->reset) {
  240. err = -ENOTSUPP;
  241. break;
  242. }
  243. BT_INFO("hu %p, Switching compatible pm device (%s) to %u",
  244. hu, dev_name(&idev->pdev->dev), powered);
  245. gpiod_set_value(idev->reset, powered);
  246. /* Provide to idev a hu reference which is used to run LPM
  247. * transactions (lpm suspend/resume) from PM callbacks.
  248. * hu needs to be protected against concurrent removing during
  249. * these PM ops.
  250. */
  251. mutex_lock(&idev->hu_lock);
  252. idev->hu = powered ? hu : NULL;
  253. mutex_unlock(&idev->hu_lock);
  254. if (idev->irq < 0)
  255. break;
  256. if (powered && device_can_wakeup(&idev->pdev->dev)) {
  257. err = devm_request_threaded_irq(&idev->pdev->dev,
  258. idev->irq, NULL,
  259. intel_irq,
  260. IRQF_ONESHOT,
  261. "bt-host-wake", idev);
  262. if (err) {
  263. BT_ERR("hu %p, unable to allocate irq-%d",
  264. hu, idev->irq);
  265. break;
  266. }
  267. device_wakeup_enable(&idev->pdev->dev);
  268. pm_runtime_set_active(&idev->pdev->dev);
  269. pm_runtime_use_autosuspend(&idev->pdev->dev);
  270. pm_runtime_set_autosuspend_delay(&idev->pdev->dev,
  271. LPM_SUSPEND_DELAY_MS);
  272. pm_runtime_enable(&idev->pdev->dev);
  273. } else if (!powered && device_may_wakeup(&idev->pdev->dev)) {
  274. devm_free_irq(&idev->pdev->dev, idev->irq, idev);
  275. device_wakeup_disable(&idev->pdev->dev);
  276. pm_runtime_disable(&idev->pdev->dev);
  277. }
  278. }
  279. mutex_unlock(&intel_device_list_lock);
  280. return err;
  281. }
  282. static void intel_busy_work(struct work_struct *work)
  283. {
  284. struct intel_data *intel = container_of(work, struct intel_data,
  285. busy_work);
  286. struct intel_device *idev;
  287. if (!intel->hu->tty->dev)
  288. return;
  289. /* Link is busy, delay the suspend */
  290. mutex_lock(&intel_device_list_lock);
  291. list_for_each_entry(idev, &intel_device_list, list) {
  292. if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) {
  293. pm_runtime_get(&idev->pdev->dev);
  294. pm_runtime_mark_last_busy(&idev->pdev->dev);
  295. pm_runtime_put_autosuspend(&idev->pdev->dev);
  296. break;
  297. }
  298. }
  299. mutex_unlock(&intel_device_list_lock);
  300. }
  301. static int intel_open(struct hci_uart *hu)
  302. {
  303. struct intel_data *intel;
  304. BT_DBG("hu %p", hu);
  305. if (!hci_uart_has_flow_control(hu))
  306. return -EOPNOTSUPP;
  307. intel = kzalloc(sizeof(*intel), GFP_KERNEL);
  308. if (!intel)
  309. return -ENOMEM;
  310. skb_queue_head_init(&intel->txq);
  311. INIT_WORK(&intel->busy_work, intel_busy_work);
  312. intel->hu = hu;
  313. hu->priv = intel;
  314. if (!intel_set_power(hu, true))
  315. set_bit(STATE_BOOTING, &intel->flags);
  316. return 0;
  317. }
  318. static int intel_close(struct hci_uart *hu)
  319. {
  320. struct intel_data *intel = hu->priv;
  321. BT_DBG("hu %p", hu);
  322. cancel_work_sync(&intel->busy_work);
  323. intel_set_power(hu, false);
  324. skb_queue_purge(&intel->txq);
  325. kfree_skb(intel->rx_skb);
  326. kfree(intel);
  327. hu->priv = NULL;
  328. return 0;
  329. }
  330. static int intel_flush(struct hci_uart *hu)
  331. {
  332. struct intel_data *intel = hu->priv;
  333. BT_DBG("hu %p", hu);
  334. skb_queue_purge(&intel->txq);
  335. return 0;
  336. }
  337. static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode)
  338. {
  339. struct sk_buff *skb;
  340. struct hci_event_hdr *hdr;
  341. struct hci_ev_cmd_complete *evt;
  342. skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);
  343. if (!skb)
  344. return -ENOMEM;
  345. hdr = skb_put(skb, sizeof(*hdr));
  346. hdr->evt = HCI_EV_CMD_COMPLETE;
  347. hdr->plen = sizeof(*evt) + 1;
  348. evt = skb_put(skb, sizeof(*evt));
  349. evt->ncmd = 0x01;
  350. evt->opcode = cpu_to_le16(opcode);
  351. skb_put_u8(skb, 0x00);
  352. hci_skb_pkt_type(skb) = HCI_EVENT_PKT;
  353. return hci_recv_frame(hdev, skb);
  354. }
  355. static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed)
  356. {
  357. struct intel_data *intel = hu->priv;
  358. struct hci_dev *hdev = hu->hdev;
  359. u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 };
  360. struct sk_buff *skb;
  361. int err;
  362. /* This can be the first command sent to the chip, check
  363. * that the controller is ready.
  364. */
  365. err = intel_wait_booting(hu);
  366. clear_bit(STATE_BOOTING, &intel->flags);
  367. /* In case of timeout, try to continue anyway */
  368. if (err && err != -ETIMEDOUT)
  369. return err;
  370. bt_dev_info(hdev, "Change controller speed to %d", speed);
  371. speed_cmd[3] = intel_convert_speed(speed);
  372. if (speed_cmd[3] == 0xff) {
  373. bt_dev_err(hdev, "Unsupported speed");
  374. return -EINVAL;
  375. }
  376. /* Device will not accept speed change if Intel version has not been
  377. * previously requested.
  378. */
  379. skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT);
  380. if (IS_ERR(skb)) {
  381. bt_dev_err(hdev, "Reading Intel version information failed (%ld)",
  382. PTR_ERR(skb));
  383. return PTR_ERR(skb);
  384. }
  385. kfree_skb(skb);
  386. skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL);
  387. if (!skb) {
  388. bt_dev_err(hdev, "Failed to alloc memory for baudrate packet");
  389. return -ENOMEM;
  390. }
  391. skb_put_data(skb, speed_cmd, sizeof(speed_cmd));
  392. hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
  393. hci_uart_set_flow_control(hu, true);
  394. skb_queue_tail(&intel->txq, skb);
  395. hci_uart_tx_wakeup(hu);
  396. /* wait 100ms to change baudrate on controller side */
  397. msleep(100);
  398. hci_uart_set_baudrate(hu, speed);
  399. hci_uart_set_flow_control(hu, false);
  400. return 0;
  401. }
  402. static int intel_setup(struct hci_uart *hu)
  403. {
  404. struct intel_data *intel = hu->priv;
  405. struct hci_dev *hdev = hu->hdev;
  406. struct sk_buff *skb;
  407. struct intel_version ver;
  408. struct intel_boot_params params;
  409. struct intel_device *idev;
  410. const struct firmware *fw;
  411. char fwname[64];
  412. u32 boot_param;
  413. ktime_t calltime, delta, rettime;
  414. unsigned long long duration;
  415. unsigned int init_speed, oper_speed;
  416. int speed_change = 0;
  417. int err;
  418. bt_dev_dbg(hdev, "");
  419. hu->hdev->set_diag = btintel_set_diag;
  420. hu->hdev->set_bdaddr = btintel_set_bdaddr;
  421. /* Set the default boot parameter to 0x0 and it is updated to
  422. * SKU specific boot parameter after reading Intel_Write_Boot_Params
  423. * command while downloading the firmware.
  424. */
  425. boot_param = 0x00000000;
  426. calltime = ktime_get();
  427. if (hu->init_speed)
  428. init_speed = hu->init_speed;
  429. else
  430. init_speed = hu->proto->init_speed;
  431. if (hu->oper_speed)
  432. oper_speed = hu->oper_speed;
  433. else
  434. oper_speed = hu->proto->oper_speed;
  435. if (oper_speed && init_speed && oper_speed != init_speed)
  436. speed_change = 1;
  437. /* Check that the controller is ready */
  438. err = intel_wait_booting(hu);
  439. clear_bit(STATE_BOOTING, &intel->flags);
  440. /* In case of timeout, try to continue anyway */
  441. if (err && err != -ETIMEDOUT)
  442. return err;
  443. set_bit(STATE_BOOTLOADER, &intel->flags);
  444. /* Read the Intel version information to determine if the device
  445. * is in bootloader mode or if it already has operational firmware
  446. * loaded.
  447. */
  448. err = btintel_read_version(hdev, &ver);
  449. if (err)
  450. return err;
  451. /* The hardware platform number has a fixed value of 0x37 and
  452. * for now only accept this single value.
  453. */
  454. if (ver.hw_platform != 0x37) {
  455. bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)",
  456. ver.hw_platform);
  457. return -EINVAL;
  458. }
  459. /* Check for supported iBT hardware variants of this firmware
  460. * loading method.
  461. *
  462. * This check has been put in place to ensure correct forward
  463. * compatibility options when newer hardware variants come along.
  464. */
  465. switch (ver.hw_variant) {
  466. case 0x0b: /* LnP */
  467. case 0x0c: /* WsP */
  468. case 0x12: /* ThP */
  469. break;
  470. default:
  471. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  472. ver.hw_variant);
  473. return -EINVAL;
  474. }
  475. btintel_version_info(hdev, &ver);
  476. /* The firmware variant determines if the device is in bootloader
  477. * mode or is running operational firmware. The value 0x06 identifies
  478. * the bootloader and the value 0x23 identifies the operational
  479. * firmware.
  480. *
  481. * When the operational firmware is already present, then only
  482. * the check for valid Bluetooth device address is needed. This
  483. * determines if the device will be added as configured or
  484. * unconfigured controller.
  485. *
  486. * It is not possible to use the Secure Boot Parameters in this
  487. * case since that command is only available in bootloader mode.
  488. */
  489. if (ver.fw_variant == 0x23) {
  490. clear_bit(STATE_BOOTLOADER, &intel->flags);
  491. btintel_check_bdaddr(hdev);
  492. return 0;
  493. }
  494. /* If the device is not in bootloader mode, then the only possible
  495. * choice is to return an error and abort the device initialization.
  496. */
  497. if (ver.fw_variant != 0x06) {
  498. bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)",
  499. ver.fw_variant);
  500. return -ENODEV;
  501. }
  502. /* Read the secure boot parameters to identify the operating
  503. * details of the bootloader.
  504. */
  505. err = btintel_read_boot_params(hdev, &params);
  506. if (err)
  507. return err;
  508. /* It is required that every single firmware fragment is acknowledged
  509. * with a command complete event. If the boot parameters indicate
  510. * that this bootloader does not send them, then abort the setup.
  511. */
  512. if (params.limited_cce != 0x00) {
  513. bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)",
  514. params.limited_cce);
  515. return -EINVAL;
  516. }
  517. /* If the OTP has no valid Bluetooth device address, then there will
  518. * also be no valid address for the operational firmware.
  519. */
  520. if (!bacmp(&params.otp_bdaddr, BDADDR_ANY)) {
  521. bt_dev_info(hdev, "No device address configured");
  522. set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
  523. }
  524. /* With this Intel bootloader only the hardware variant and device
  525. * revision information are used to select the right firmware for SfP
  526. * and WsP.
  527. *
  528. * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi.
  529. *
  530. * Currently the supported hardware variants are:
  531. * 11 (0x0b) for iBT 3.0 (LnP/SfP)
  532. * 12 (0x0c) for iBT 3.5 (WsP)
  533. *
  534. * For ThP/JfP and for future SKU's, the FW name varies based on HW
  535. * variant, HW revision and FW revision, as these are dependent on CNVi
  536. * and RF Combination.
  537. *
  538. * 18 (0x12) for iBT3.5 (ThP/JfP)
  539. *
  540. * The firmware file name for these will be
  541. * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi.
  542. *
  543. */
  544. switch (ver.hw_variant) {
  545. case 0x0b: /* SfP */
  546. case 0x0c: /* WsP */
  547. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi",
  548. ver.hw_variant, le16_to_cpu(params.dev_revid));
  549. break;
  550. case 0x12: /* ThP */
  551. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi",
  552. ver.hw_variant, ver.hw_revision, ver.fw_revision);
  553. break;
  554. default:
  555. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  556. ver.hw_variant);
  557. return -EINVAL;
  558. }
  559. err = request_firmware(&fw, fwname, &hdev->dev);
  560. if (err < 0) {
  561. bt_dev_err(hdev, "Failed to load Intel firmware file (%d)",
  562. err);
  563. return err;
  564. }
  565. bt_dev_info(hdev, "Found device firmware: %s", fwname);
  566. /* Save the DDC file name for later */
  567. switch (ver.hw_variant) {
  568. case 0x0b: /* SfP */
  569. case 0x0c: /* WsP */
  570. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc",
  571. ver.hw_variant, le16_to_cpu(params.dev_revid));
  572. break;
  573. case 0x12: /* ThP */
  574. snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc",
  575. ver.hw_variant, ver.hw_revision, ver.fw_revision);
  576. break;
  577. default:
  578. bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
  579. ver.hw_variant);
  580. return -EINVAL;
  581. }
  582. if (fw->size < 644) {
  583. bt_dev_err(hdev, "Invalid size of firmware file (%zu)",
  584. fw->size);
  585. err = -EBADF;
  586. goto done;
  587. }
  588. set_bit(STATE_DOWNLOADING, &intel->flags);
  589. /* Start firmware downloading and get boot parameter */
  590. err = btintel_download_firmware(hdev, &ver, fw, &boot_param);
  591. if (err < 0)
  592. goto done;
  593. set_bit(STATE_FIRMWARE_LOADED, &intel->flags);
  594. bt_dev_info(hdev, "Waiting for firmware download to complete");
  595. /* Before switching the device into operational mode and with that
  596. * booting the loaded firmware, wait for the bootloader notification
  597. * that all fragments have been successfully received.
  598. *
  599. * When the event processing receives the notification, then the
  600. * STATE_DOWNLOADING flag will be cleared.
  601. *
  602. * The firmware loading should not take longer than 5 seconds
  603. * and thus just timeout if that happens and fail the setup
  604. * of this device.
  605. */
  606. err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING,
  607. TASK_INTERRUPTIBLE,
  608. msecs_to_jiffies(5000));
  609. if (err == -EINTR) {
  610. bt_dev_err(hdev, "Firmware loading interrupted");
  611. err = -EINTR;
  612. goto done;
  613. }
  614. if (err) {
  615. bt_dev_err(hdev, "Firmware loading timeout");
  616. err = -ETIMEDOUT;
  617. goto done;
  618. }
  619. if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) {
  620. bt_dev_err(hdev, "Firmware loading failed");
  621. err = -ENOEXEC;
  622. goto done;
  623. }
  624. rettime = ktime_get();
  625. delta = ktime_sub(rettime, calltime);
  626. duration = (unsigned long long)ktime_to_ns(delta) >> 10;
  627. bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);
  628. done:
  629. release_firmware(fw);
  630. /* Check if there was an error and if is not -EALREADY which means the
  631. * firmware has already been loaded.
  632. */
  633. if (err < 0 && err != -EALREADY)
  634. return err;
  635. /* We need to restore the default speed before Intel reset */
  636. if (speed_change) {
  637. err = intel_set_baudrate(hu, init_speed);
  638. if (err)
  639. return err;
  640. }
  641. calltime = ktime_get();
  642. set_bit(STATE_BOOTING, &intel->flags);
  643. err = btintel_send_intel_reset(hdev, boot_param);
  644. if (err)
  645. return err;
  646. /* The bootloader will not indicate when the device is ready. This
  647. * is done by the operational firmware sending bootup notification.
  648. *
  649. * Booting into operational firmware should not take longer than
  650. * 1 second. However if that happens, then just fail the setup
  651. * since something went wrong.
  652. */
  653. bt_dev_info(hdev, "Waiting for device to boot");
  654. err = intel_wait_booting(hu);
  655. if (err)
  656. return err;
  657. clear_bit(STATE_BOOTING, &intel->flags);
  658. rettime = ktime_get();
  659. delta = ktime_sub(rettime, calltime);
  660. duration = (unsigned long long)ktime_to_ns(delta) >> 10;
  661. bt_dev_info(hdev, "Device booted in %llu usecs", duration);
  662. /* Enable LPM if matching pdev with wakeup enabled, set TX active
  663. * until further LPM TX notification.
  664. */
  665. mutex_lock(&intel_device_list_lock);
  666. list_for_each_entry(idev, &intel_device_list, list) {
  667. if (!hu->tty->dev)
  668. break;
  669. if (hu->tty->dev->parent == idev->pdev->dev.parent) {
  670. if (device_may_wakeup(&idev->pdev->dev)) {
  671. set_bit(STATE_LPM_ENABLED, &intel->flags);
  672. set_bit(STATE_TX_ACTIVE, &intel->flags);
  673. }
  674. break;
  675. }
  676. }
  677. mutex_unlock(&intel_device_list_lock);
  678. /* Ignore errors, device can work without DDC parameters */
  679. btintel_load_ddc_config(hdev, fwname);
  680. skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT);
  681. if (IS_ERR(skb))
  682. return PTR_ERR(skb);
  683. kfree_skb(skb);
  684. if (speed_change) {
  685. err = intel_set_baudrate(hu, oper_speed);
  686. if (err)
  687. return err;
  688. }
  689. bt_dev_info(hdev, "Setup complete");
  690. clear_bit(STATE_BOOTLOADER, &intel->flags);
  691. return 0;
  692. }
  693. static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
  694. {
  695. struct hci_uart *hu = hci_get_drvdata(hdev);
  696. struct intel_data *intel = hu->priv;
  697. struct hci_event_hdr *hdr;
  698. if (!test_bit(STATE_BOOTLOADER, &intel->flags) &&
  699. !test_bit(STATE_BOOTING, &intel->flags))
  700. goto recv;
  701. hdr = (void *)skb->data;
  702. /* When the firmware loading completes the device sends
  703. * out a vendor specific event indicating the result of
  704. * the firmware loading.
  705. */
  706. if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 &&
  707. skb->data[2] == 0x06) {
  708. if (skb->data[3] != 0x00)
  709. set_bit(STATE_FIRMWARE_FAILED, &intel->flags);
  710. if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) &&
  711. test_bit(STATE_FIRMWARE_LOADED, &intel->flags))
  712. wake_up_bit(&intel->flags, STATE_DOWNLOADING);
  713. /* When switching to the operational firmware the device
  714. * sends a vendor specific event indicating that the bootup
  715. * completed.
  716. */
  717. } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 &&
  718. skb->data[2] == 0x02) {
  719. if (test_and_clear_bit(STATE_BOOTING, &intel->flags))
  720. wake_up_bit(&intel->flags, STATE_BOOTING);
  721. }
  722. recv:
  723. return hci_recv_frame(hdev, skb);
  724. }
  725. static void intel_recv_lpm_notify(struct hci_dev *hdev, int value)
  726. {
  727. struct hci_uart *hu = hci_get_drvdata(hdev);
  728. struct intel_data *intel = hu->priv;
  729. bt_dev_dbg(hdev, "TX idle notification (%d)", value);
  730. if (value) {
  731. set_bit(STATE_TX_ACTIVE, &intel->flags);
  732. schedule_work(&intel->busy_work);
  733. } else {
  734. clear_bit(STATE_TX_ACTIVE, &intel->flags);
  735. }
  736. }
  737. static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb)
  738. {
  739. struct hci_lpm_pkt *lpm = (void *)skb->data;
  740. struct hci_uart *hu = hci_get_drvdata(hdev);
  741. struct intel_data *intel = hu->priv;
  742. switch (lpm->opcode) {
  743. case LPM_OP_TX_NOTIFY:
  744. if (lpm->dlen < 1) {
  745. bt_dev_err(hu->hdev, "Invalid LPM notification packet");
  746. break;
  747. }
  748. intel_recv_lpm_notify(hdev, lpm->data[0]);
  749. break;
  750. case LPM_OP_SUSPEND_ACK:
  751. set_bit(STATE_SUSPENDED, &intel->flags);
  752. if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags))
  753. wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
  754. break;
  755. case LPM_OP_RESUME_ACK:
  756. clear_bit(STATE_SUSPENDED, &intel->flags);
  757. if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags))
  758. wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
  759. break;
  760. default:
  761. bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode);
  762. break;
  763. }
  764. kfree_skb(skb);
  765. return 0;
  766. }
  767. #define INTEL_RECV_LPM \
  768. .type = HCI_LPM_PKT, \
  769. .hlen = HCI_LPM_HDR_SIZE, \
  770. .loff = 1, \
  771. .lsize = 1, \
  772. .maxlen = HCI_LPM_MAX_SIZE
  773. static const struct h4_recv_pkt intel_recv_pkts[] = {
  774. { H4_RECV_ACL, .recv = hci_recv_frame },
  775. { H4_RECV_SCO, .recv = hci_recv_frame },
  776. { H4_RECV_EVENT, .recv = intel_recv_event },
  777. { INTEL_RECV_LPM, .recv = intel_recv_lpm },
  778. };
  779. static int intel_recv(struct hci_uart *hu, const void *data, int count)
  780. {
  781. struct intel_data *intel = hu->priv;
  782. if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
  783. return -EUNATCH;
  784. intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count,
  785. intel_recv_pkts,
  786. ARRAY_SIZE(intel_recv_pkts));
  787. if (IS_ERR(intel->rx_skb)) {
  788. int err = PTR_ERR(intel->rx_skb);
  789. bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
  790. intel->rx_skb = NULL;
  791. return err;
  792. }
  793. return count;
  794. }
  795. static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb)
  796. {
  797. struct intel_data *intel = hu->priv;
  798. struct intel_device *idev;
  799. BT_DBG("hu %p skb %p", hu, skb);
  800. if (!hu->tty->dev)
  801. goto out_enqueue;
  802. /* Be sure our controller is resumed and potential LPM transaction
  803. * completed before enqueuing any packet.
  804. */
  805. mutex_lock(&intel_device_list_lock);
  806. list_for_each_entry(idev, &intel_device_list, list) {
  807. if (hu->tty->dev->parent == idev->pdev->dev.parent) {
  808. pm_runtime_get_sync(&idev->pdev->dev);
  809. pm_runtime_mark_last_busy(&idev->pdev->dev);
  810. pm_runtime_put_autosuspend(&idev->pdev->dev);
  811. break;
  812. }
  813. }
  814. mutex_unlock(&intel_device_list_lock);
  815. out_enqueue:
  816. skb_queue_tail(&intel->txq, skb);
  817. return 0;
  818. }
  819. static struct sk_buff *intel_dequeue(struct hci_uart *hu)
  820. {
  821. struct intel_data *intel = hu->priv;
  822. struct sk_buff *skb;
  823. skb = skb_dequeue(&intel->txq);
  824. if (!skb)
  825. return skb;
  826. if (test_bit(STATE_BOOTLOADER, &intel->flags) &&
  827. (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) {
  828. struct hci_command_hdr *cmd = (void *)skb->data;
  829. __u16 opcode = le16_to_cpu(cmd->opcode);
  830. /* When the 0xfc01 command is issued to boot into
  831. * the operational firmware, it will actually not
  832. * send a command complete event. To keep the flow
  833. * control working inject that event here.
  834. */
  835. if (opcode == 0xfc01)
  836. inject_cmd_complete(hu->hdev, opcode);
  837. }
  838. /* Prepend skb with frame type */
  839. memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
  840. return skb;
  841. }
  842. static const struct hci_uart_proto intel_proto = {
  843. .id = HCI_UART_INTEL,
  844. .name = "Intel",
  845. .manufacturer = 2,
  846. .init_speed = 115200,
  847. .oper_speed = 3000000,
  848. .open = intel_open,
  849. .close = intel_close,
  850. .flush = intel_flush,
  851. .setup = intel_setup,
  852. .set_baudrate = intel_set_baudrate,
  853. .recv = intel_recv,
  854. .enqueue = intel_enqueue,
  855. .dequeue = intel_dequeue,
  856. };
  857. #ifdef CONFIG_ACPI
  858. static const struct acpi_device_id intel_acpi_match[] = {
  859. { "INT33E1", 0 },
  860. { "INT33E3", 0 },
  861. { }
  862. };
  863. MODULE_DEVICE_TABLE(acpi, intel_acpi_match);
  864. #endif
  865. #ifdef CONFIG_PM
  866. static int intel_suspend_device(struct device *dev)
  867. {
  868. struct intel_device *idev = dev_get_drvdata(dev);
  869. mutex_lock(&idev->hu_lock);
  870. if (idev->hu)
  871. intel_lpm_suspend(idev->hu);
  872. mutex_unlock(&idev->hu_lock);
  873. return 0;
  874. }
  875. static int intel_resume_device(struct device *dev)
  876. {
  877. struct intel_device *idev = dev_get_drvdata(dev);
  878. mutex_lock(&idev->hu_lock);
  879. if (idev->hu)
  880. intel_lpm_resume(idev->hu);
  881. mutex_unlock(&idev->hu_lock);
  882. return 0;
  883. }
  884. #endif
  885. #ifdef CONFIG_PM_SLEEP
  886. static int intel_suspend(struct device *dev)
  887. {
  888. struct intel_device *idev = dev_get_drvdata(dev);
  889. if (device_may_wakeup(dev))
  890. enable_irq_wake(idev->irq);
  891. return intel_suspend_device(dev);
  892. }
  893. static int intel_resume(struct device *dev)
  894. {
  895. struct intel_device *idev = dev_get_drvdata(dev);
  896. if (device_may_wakeup(dev))
  897. disable_irq_wake(idev->irq);
  898. return intel_resume_device(dev);
  899. }
  900. #endif
  901. static const struct dev_pm_ops intel_pm_ops = {
  902. SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)
  903. SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL)
  904. };
  905. static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  906. static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false };
  907. static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = {
  908. { "reset-gpios", &reset_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
  909. { "host-wake-gpios", &host_wake_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
  910. { }
  911. };
  912. static int intel_probe(struct platform_device *pdev)
  913. {
  914. struct intel_device *idev;
  915. int ret;
  916. idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL);
  917. if (!idev)
  918. return -ENOMEM;
  919. mutex_init(&idev->hu_lock);
  920. idev->pdev = pdev;
  921. ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios);
  922. if (ret)
  923. dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n");
  924. idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
  925. if (IS_ERR(idev->reset)) {
  926. dev_err(&pdev->dev, "Unable to retrieve gpio\n");
  927. return PTR_ERR(idev->reset);
  928. }
  929. idev->irq = platform_get_irq(pdev, 0);
  930. if (idev->irq < 0) {
  931. struct gpio_desc *host_wake;
  932. dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n");
  933. host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN);
  934. if (IS_ERR(host_wake)) {
  935. dev_err(&pdev->dev, "Unable to retrieve IRQ\n");
  936. goto no_irq;
  937. }
  938. idev->irq = gpiod_to_irq(host_wake);
  939. if (idev->irq < 0) {
  940. dev_err(&pdev->dev, "No corresponding irq for gpio\n");
  941. goto no_irq;
  942. }
  943. }
  944. /* Only enable wake-up/irq when controller is powered */
  945. device_set_wakeup_capable(&pdev->dev, true);
  946. device_wakeup_disable(&pdev->dev);
  947. no_irq:
  948. platform_set_drvdata(pdev, idev);
  949. /* Place this instance on the device list */
  950. mutex_lock(&intel_device_list_lock);
  951. list_add_tail(&idev->list, &intel_device_list);
  952. mutex_unlock(&intel_device_list_lock);
  953. dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n",
  954. desc_to_gpio(idev->reset), idev->irq);
  955. return 0;
  956. }
  957. static void intel_remove(struct platform_device *pdev)
  958. {
  959. struct intel_device *idev = platform_get_drvdata(pdev);
  960. device_wakeup_disable(&pdev->dev);
  961. mutex_lock(&intel_device_list_lock);
  962. list_del(&idev->list);
  963. mutex_unlock(&intel_device_list_lock);
  964. dev_info(&pdev->dev, "unregistered.\n");
  965. }
  966. static struct platform_driver intel_driver = {
  967. .probe = intel_probe,
  968. .remove_new = intel_remove,
  969. .driver = {
  970. .name = "hci_intel",
  971. .acpi_match_table = ACPI_PTR(intel_acpi_match),
  972. .pm = &intel_pm_ops,
  973. },
  974. };
  975. int __init intel_init(void)
  976. {
  977. int err;
  978. err = platform_driver_register(&intel_driver);
  979. if (err)
  980. return err;
  981. return hci_uart_register_proto(&intel_proto);
  982. }
  983. int __exit intel_deinit(void)
  984. {
  985. platform_driver_unregister(&intel_driver);
  986. return hci_uart_unregister_proto(&intel_proto);
  987. }