gpio-latch.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * GPIO latch driver
  4. *
  5. * Copyright (C) 2022 Sascha Hauer <s.hauer@pengutronix.de>
  6. *
  7. * This driver implements a GPIO (or better GPO as there is no input)
  8. * multiplexer based on latches like this:
  9. *
  10. * CLK0 ----------------------. ,--------.
  11. * CLK1 -------------------. `--------|> #0 |
  12. * | | |
  13. * OUT0 ----------------+--|-----------|D0 Q0|-----|<
  14. * OUT1 --------------+-|--|-----------|D1 Q1|-----|<
  15. * OUT2 ------------+-|-|--|-----------|D2 Q2|-----|<
  16. * OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|<
  17. * OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|<
  18. * OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|<
  19. * OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
  20. * OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
  21. * | | | | | | | | | `--------'
  22. * | | | | | | | | |
  23. * | | | | | | | | | ,--------.
  24. * | | | | | | | | `-----------|> #1 |
  25. * | | | | | | | | | |
  26. * | | | | | | | `--------------|D0 Q0|-----|<
  27. * | | | | | | `----------------|D1 Q1|-----|<
  28. * | | | | | `------------------|D2 Q2|-----|<
  29. * | | | | `--------------------|D3 Q3|-----|<
  30. * | | | `----------------------|D4 Q4|-----|<
  31. * | | `------------------------|D5 Q5|-----|<
  32. * | `--------------------------|D6 Q6|-----|<
  33. * `----------------------------|D7 Q7|-----|<
  34. * `--------'
  35. *
  36. * The above is just an example. The actual number of number of latches and
  37. * the number of inputs per latch is derived from the number of GPIOs given
  38. * in the corresponding device tree properties.
  39. */
  40. #include <linux/err.h>
  41. #include <linux/gpio/consumer.h>
  42. #include <linux/gpio/driver.h>
  43. #include <linux/module.h>
  44. #include <linux/mod_devicetable.h>
  45. #include <linux/platform_device.h>
  46. #include <linux/delay.h>
  47. #include "gpiolib.h"
  48. struct gpio_latch_priv {
  49. struct gpio_chip gc;
  50. struct gpio_descs *clk_gpios;
  51. struct gpio_descs *latched_gpios;
  52. int n_latched_gpios;
  53. unsigned int setup_duration_ns;
  54. unsigned int clock_duration_ns;
  55. unsigned long *shadow;
  56. /*
  57. * Depending on whether any of the underlying GPIOs may sleep we either
  58. * use a mutex or a spinlock to protect our shadow map.
  59. */
  60. union {
  61. struct mutex mutex; /* protects @shadow */
  62. spinlock_t spinlock; /* protects @shadow */
  63. };
  64. };
  65. static int gpio_latch_get_direction(struct gpio_chip *gc, unsigned int offset)
  66. {
  67. return GPIO_LINE_DIRECTION_OUT;
  68. }
  69. static void gpio_latch_set_unlocked(struct gpio_latch_priv *priv,
  70. void (*set)(struct gpio_desc *desc, int value),
  71. unsigned int offset, bool val)
  72. {
  73. int latch = offset / priv->n_latched_gpios;
  74. int i;
  75. assign_bit(offset, priv->shadow, val);
  76. for (i = 0; i < priv->n_latched_gpios; i++)
  77. set(priv->latched_gpios->desc[i],
  78. test_bit(latch * priv->n_latched_gpios + i, priv->shadow));
  79. ndelay(priv->setup_duration_ns);
  80. set(priv->clk_gpios->desc[latch], 1);
  81. ndelay(priv->clock_duration_ns);
  82. set(priv->clk_gpios->desc[latch], 0);
  83. }
  84. static void gpio_latch_set(struct gpio_chip *gc, unsigned int offset, int val)
  85. {
  86. struct gpio_latch_priv *priv = gpiochip_get_data(gc);
  87. unsigned long flags;
  88. spin_lock_irqsave(&priv->spinlock, flags);
  89. gpio_latch_set_unlocked(priv, gpiod_set_value, offset, val);
  90. spin_unlock_irqrestore(&priv->spinlock, flags);
  91. }
  92. static void gpio_latch_set_can_sleep(struct gpio_chip *gc, unsigned int offset, int val)
  93. {
  94. struct gpio_latch_priv *priv = gpiochip_get_data(gc);
  95. mutex_lock(&priv->mutex);
  96. gpio_latch_set_unlocked(priv, gpiod_set_value_cansleep, offset, val);
  97. mutex_unlock(&priv->mutex);
  98. }
  99. static bool gpio_latch_can_sleep(struct gpio_latch_priv *priv, unsigned int n_latches)
  100. {
  101. int i;
  102. for (i = 0; i < n_latches; i++)
  103. if (gpiod_cansleep(priv->clk_gpios->desc[i]))
  104. return true;
  105. for (i = 0; i < priv->n_latched_gpios; i++)
  106. if (gpiod_cansleep(priv->latched_gpios->desc[i]))
  107. return true;
  108. return false;
  109. }
  110. /*
  111. * Some value which is still acceptable to delay in atomic context.
  112. * If we need to go higher we might have to switch to usleep_range(),
  113. * but that cannot ne used in atomic context and the driver would have
  114. * to be adjusted to support that.
  115. */
  116. #define DURATION_NS_MAX 5000
  117. static int gpio_latch_probe(struct platform_device *pdev)
  118. {
  119. struct gpio_latch_priv *priv;
  120. unsigned int n_latches;
  121. struct device_node *np = pdev->dev.of_node;
  122. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  123. if (!priv)
  124. return -ENOMEM;
  125. priv->clk_gpios = devm_gpiod_get_array(&pdev->dev, "clk", GPIOD_OUT_LOW);
  126. if (IS_ERR(priv->clk_gpios))
  127. return PTR_ERR(priv->clk_gpios);
  128. priv->latched_gpios = devm_gpiod_get_array(&pdev->dev, "latched", GPIOD_OUT_LOW);
  129. if (IS_ERR(priv->latched_gpios))
  130. return PTR_ERR(priv->latched_gpios);
  131. n_latches = priv->clk_gpios->ndescs;
  132. priv->n_latched_gpios = priv->latched_gpios->ndescs;
  133. priv->shadow = devm_bitmap_zalloc(&pdev->dev, n_latches * priv->n_latched_gpios,
  134. GFP_KERNEL);
  135. if (!priv->shadow)
  136. return -ENOMEM;
  137. if (gpio_latch_can_sleep(priv, n_latches)) {
  138. priv->gc.can_sleep = true;
  139. priv->gc.set = gpio_latch_set_can_sleep;
  140. mutex_init(&priv->mutex);
  141. } else {
  142. priv->gc.can_sleep = false;
  143. priv->gc.set = gpio_latch_set;
  144. spin_lock_init(&priv->spinlock);
  145. }
  146. of_property_read_u32(np, "setup-duration-ns", &priv->setup_duration_ns);
  147. if (priv->setup_duration_ns > DURATION_NS_MAX) {
  148. dev_warn(&pdev->dev, "setup-duration-ns too high, limit to %d\n",
  149. DURATION_NS_MAX);
  150. priv->setup_duration_ns = DURATION_NS_MAX;
  151. }
  152. of_property_read_u32(np, "clock-duration-ns", &priv->clock_duration_ns);
  153. if (priv->clock_duration_ns > DURATION_NS_MAX) {
  154. dev_warn(&pdev->dev, "clock-duration-ns too high, limit to %d\n",
  155. DURATION_NS_MAX);
  156. priv->clock_duration_ns = DURATION_NS_MAX;
  157. }
  158. priv->gc.get_direction = gpio_latch_get_direction;
  159. priv->gc.ngpio = n_latches * priv->n_latched_gpios;
  160. priv->gc.owner = THIS_MODULE;
  161. priv->gc.base = -1;
  162. priv->gc.parent = &pdev->dev;
  163. platform_set_drvdata(pdev, priv);
  164. return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
  165. }
  166. static const struct of_device_id gpio_latch_ids[] = {
  167. {
  168. .compatible = "gpio-latch",
  169. },
  170. { /* sentinel */ }
  171. };
  172. MODULE_DEVICE_TABLE(of, gpio_latch_ids);
  173. static struct platform_driver gpio_latch_driver = {
  174. .driver = {
  175. .name = "gpio-latch",
  176. .of_match_table = gpio_latch_ids,
  177. },
  178. .probe = gpio_latch_probe,
  179. };
  180. module_platform_driver(gpio_latch_driver);
  181. MODULE_LICENSE("GPL v2");
  182. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
  183. MODULE_DESCRIPTION("GPIO latch driver");