gb-beagleplay.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Beagleplay Linux Driver for Greybus
  4. *
  5. * Copyright (c) 2023 Ayush Singh <ayushdevel1325@gmail.com>
  6. * Copyright (c) 2023 BeagleBoard.org Foundation
  7. */
  8. #include <linux/unaligned.h>
  9. #include <linux/crc32.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/firmware.h>
  12. #include <linux/greybus.h>
  13. #include <linux/serdev.h>
  14. #include <linux/crc-ccitt.h>
  15. #include <linux/circ_buf.h>
  16. #define CC1352_FIRMWARE_SIZE (704 * 1024)
  17. #define CC1352_BOOTLOADER_TIMEOUT 2000
  18. #define CC1352_BOOTLOADER_ACK 0xcc
  19. #define CC1352_BOOTLOADER_NACK 0x33
  20. #define RX_HDLC_PAYLOAD 256
  21. #define CRC_LEN 2
  22. #define MAX_RX_HDLC (1 + RX_HDLC_PAYLOAD + CRC_LEN)
  23. #define TX_CIRC_BUF_SIZE 1024
  24. #define ADDRESS_GREYBUS 0x01
  25. #define ADDRESS_DBG 0x02
  26. #define ADDRESS_CONTROL 0x03
  27. #define HDLC_FRAME 0x7E
  28. #define HDLC_ESC 0x7D
  29. #define HDLC_XOR 0x20
  30. #define CONTROL_SVC_START 0x01
  31. #define CONTROL_SVC_STOP 0x02
  32. /* The maximum number of CPorts supported by Greybus Host Device */
  33. #define GB_MAX_CPORTS 32
  34. /**
  35. * struct gb_beagleplay - BeaglePlay Greybus driver
  36. *
  37. * @sd: underlying serdev device
  38. *
  39. * @gb_hd: greybus host device
  40. *
  41. * @tx_work: hdlc transmit work
  42. * @tx_producer_lock: hdlc transmit data producer lock. acquired when appending data to buffer.
  43. * @tx_consumer_lock: hdlc transmit data consumer lock. acquired when sending data over uart.
  44. * @tx_circ_buf: hdlc transmit circular buffer.
  45. * @tx_crc: hdlc transmit crc-ccitt fcs
  46. *
  47. * @rx_buffer_len: length of receive buffer filled.
  48. * @rx_buffer: hdlc frame receive buffer
  49. * @rx_in_esc: hdlc rx flag to indicate ESC frame
  50. *
  51. * @fwl: underlying firmware upload device
  52. * @bootloader_backdoor_gpio: cc1352p7 boot gpio
  53. * @rst_gpio: cc1352p7 reset gpio
  54. * @flashing_mode: flag to indicate that flashing is currently in progress
  55. * @fwl_ack_com: completion to signal an Ack/Nack
  56. * @fwl_ack: Ack/Nack byte received
  57. * @fwl_cmd_response_com: completion to signal a bootloader command response
  58. * @fwl_cmd_response: bootloader command response data
  59. * @fwl_crc32: crc32 of firmware to flash
  60. * @fwl_reset_addr: flag to indicate if we need to send COMMAND_DOWNLOAD again
  61. */
  62. struct gb_beagleplay {
  63. struct serdev_device *sd;
  64. struct gb_host_device *gb_hd;
  65. struct work_struct tx_work;
  66. spinlock_t tx_producer_lock;
  67. spinlock_t tx_consumer_lock;
  68. struct circ_buf tx_circ_buf;
  69. u16 tx_crc;
  70. u16 rx_buffer_len;
  71. bool rx_in_esc;
  72. u8 rx_buffer[MAX_RX_HDLC];
  73. struct fw_upload *fwl;
  74. struct gpio_desc *bootloader_backdoor_gpio;
  75. struct gpio_desc *rst_gpio;
  76. bool flashing_mode;
  77. struct completion fwl_ack_com;
  78. u8 fwl_ack;
  79. struct completion fwl_cmd_response_com;
  80. u32 fwl_cmd_response;
  81. u32 fwl_crc32;
  82. bool fwl_reset_addr;
  83. };
  84. /**
  85. * struct hdlc_payload - Structure to represent part of HDCL frame payload data.
  86. *
  87. * @len: buffer length in bytes
  88. * @buf: payload buffer
  89. */
  90. struct hdlc_payload {
  91. u16 len;
  92. void *buf;
  93. };
  94. /**
  95. * struct hdlc_greybus_frame - Structure to represent greybus HDLC frame payload
  96. *
  97. * @cport: cport id
  98. * @hdr: greybus operation header
  99. * @payload: greybus message payload
  100. *
  101. * The HDLC payload sent over UART for greybus address has cport preappended to greybus message
  102. */
  103. struct hdlc_greybus_frame {
  104. __le16 cport;
  105. struct gb_operation_msg_hdr hdr;
  106. u8 payload[];
  107. } __packed;
  108. /**
  109. * enum cc1352_bootloader_cmd: CC1352 Bootloader Commands
  110. *
  111. * @COMMAND_DOWNLOAD: Prepares flash programming
  112. * @COMMAND_GET_STATUS: Returns the status of the last command that was issued
  113. * @COMMAND_SEND_DATA: Transfers data and programs flash
  114. * @COMMAND_RESET: Performs a system reset
  115. * @COMMAND_CRC32: Calculates CRC32 over a specified memory area
  116. * @COMMAND_BANK_ERASE: Performs an erase of all of the customer-accessible
  117. * flash sectors not protected by FCFG1 and CCFG
  118. * writeprotect bits.
  119. *
  120. * CC1352 Bootloader serial bus commands
  121. */
  122. enum cc1352_bootloader_cmd {
  123. COMMAND_DOWNLOAD = 0x21,
  124. COMMAND_GET_STATUS = 0x23,
  125. COMMAND_SEND_DATA = 0x24,
  126. COMMAND_RESET = 0x25,
  127. COMMAND_CRC32 = 0x27,
  128. COMMAND_BANK_ERASE = 0x2c,
  129. };
  130. /**
  131. * enum cc1352_bootloader_status: CC1352 Bootloader COMMAND_GET_STATUS response
  132. *
  133. * @COMMAND_RET_SUCCESS: Status for successful command
  134. * @COMMAND_RET_UNKNOWN_CMD: Status for unknown command
  135. * @COMMAND_RET_INVALID_CMD: Status for invalid command (in other words,
  136. * incorrect packet size)
  137. * @COMMAND_RET_INVALID_ADR: Status for invalid input address
  138. * @COMMAND_RET_FLASH_FAIL: Status for failing flash erase or program operation
  139. */
  140. enum cc1352_bootloader_status {
  141. COMMAND_RET_SUCCESS = 0x40,
  142. COMMAND_RET_UNKNOWN_CMD = 0x41,
  143. COMMAND_RET_INVALID_CMD = 0x42,
  144. COMMAND_RET_INVALID_ADR = 0x43,
  145. COMMAND_RET_FLASH_FAIL = 0x44,
  146. };
  147. /**
  148. * struct cc1352_bootloader_packet: CC1352 Bootloader Request Packet
  149. *
  150. * @len: length of packet + optional request data
  151. * @checksum: 8-bit checksum excluding len
  152. * @cmd: bootloader command
  153. */
  154. struct cc1352_bootloader_packet {
  155. u8 len;
  156. u8 checksum;
  157. u8 cmd;
  158. } __packed;
  159. #define CC1352_BOOTLOADER_PKT_MAX_SIZE \
  160. (U8_MAX - sizeof(struct cc1352_bootloader_packet))
  161. /**
  162. * struct cc1352_bootloader_download_cmd_data: CC1352 Bootloader COMMAND_DOWNLOAD request data
  163. *
  164. * @addr: address to start programming data into
  165. * @size: size of data that will be sent
  166. */
  167. struct cc1352_bootloader_download_cmd_data {
  168. __be32 addr;
  169. __be32 size;
  170. } __packed;
  171. /**
  172. * struct cc1352_bootloader_crc32_cmd_data: CC1352 Bootloader COMMAND_CRC32 request data
  173. *
  174. * @addr: address where crc32 calculation starts
  175. * @size: number of bytes comprised by crc32 calculation
  176. * @read_repeat: number of read repeats for each data location
  177. */
  178. struct cc1352_bootloader_crc32_cmd_data {
  179. __be32 addr;
  180. __be32 size;
  181. __be32 read_repeat;
  182. } __packed;
  183. static void hdlc_rx_greybus_frame(struct gb_beagleplay *bg, u8 *buf, u16 len)
  184. {
  185. struct hdlc_greybus_frame *gb_frame = (struct hdlc_greybus_frame *)buf;
  186. u16 cport_id = le16_to_cpu(gb_frame->cport);
  187. u16 gb_msg_len = le16_to_cpu(gb_frame->hdr.size);
  188. dev_dbg(&bg->sd->dev, "Greybus Operation %u type %X cport %u status %u received",
  189. gb_frame->hdr.operation_id, gb_frame->hdr.type, cport_id, gb_frame->hdr.result);
  190. greybus_data_rcvd(bg->gb_hd, cport_id, (u8 *)&gb_frame->hdr, gb_msg_len);
  191. }
  192. static void hdlc_rx_dbg_frame(const struct gb_beagleplay *bg, const char *buf, u16 len)
  193. {
  194. dev_dbg(&bg->sd->dev, "CC1352 Log: %.*s", (int)len, buf);
  195. }
  196. /**
  197. * hdlc_write() - Consume HDLC Buffer.
  198. * @bg: beagleplay greybus driver
  199. *
  200. * Assumes that consumer lock has been acquired.
  201. */
  202. static void hdlc_write(struct gb_beagleplay *bg)
  203. {
  204. int written;
  205. /* Start consuming HDLC data */
  206. int head = smp_load_acquire(&bg->tx_circ_buf.head);
  207. int tail = bg->tx_circ_buf.tail;
  208. int count = CIRC_CNT_TO_END(head, tail, TX_CIRC_BUF_SIZE);
  209. const unsigned char *buf = &bg->tx_circ_buf.buf[tail];
  210. if (count > 0) {
  211. written = serdev_device_write_buf(bg->sd, buf, count);
  212. /* Finish consuming HDLC data */
  213. smp_store_release(&bg->tx_circ_buf.tail, (tail + written) & (TX_CIRC_BUF_SIZE - 1));
  214. }
  215. }
  216. /**
  217. * hdlc_append() - Queue HDLC data for sending.
  218. * @bg: beagleplay greybus driver
  219. * @value: hdlc byte to transmit
  220. *
  221. * Assumes that producer lock as been acquired.
  222. */
  223. static void hdlc_append(struct gb_beagleplay *bg, u8 value)
  224. {
  225. int tail, head = bg->tx_circ_buf.head;
  226. while (true) {
  227. tail = READ_ONCE(bg->tx_circ_buf.tail);
  228. if (CIRC_SPACE(head, tail, TX_CIRC_BUF_SIZE) >= 1) {
  229. bg->tx_circ_buf.buf[head] = value;
  230. /* Finish producing HDLC byte */
  231. smp_store_release(&bg->tx_circ_buf.head,
  232. (head + 1) & (TX_CIRC_BUF_SIZE - 1));
  233. return;
  234. }
  235. dev_warn(&bg->sd->dev, "Tx circ buf full");
  236. usleep_range(3000, 5000);
  237. }
  238. }
  239. static void hdlc_append_escaped(struct gb_beagleplay *bg, u8 value)
  240. {
  241. if (value == HDLC_FRAME || value == HDLC_ESC) {
  242. hdlc_append(bg, HDLC_ESC);
  243. value ^= HDLC_XOR;
  244. }
  245. hdlc_append(bg, value);
  246. }
  247. static void hdlc_append_tx_frame(struct gb_beagleplay *bg)
  248. {
  249. bg->tx_crc = 0xFFFF;
  250. hdlc_append(bg, HDLC_FRAME);
  251. }
  252. static void hdlc_append_tx_u8(struct gb_beagleplay *bg, u8 value)
  253. {
  254. bg->tx_crc = crc_ccitt(bg->tx_crc, &value, 1);
  255. hdlc_append_escaped(bg, value);
  256. }
  257. static void hdlc_append_tx_buf(struct gb_beagleplay *bg, const u8 *buf, u16 len)
  258. {
  259. size_t i;
  260. for (i = 0; i < len; i++)
  261. hdlc_append_tx_u8(bg, buf[i]);
  262. }
  263. static void hdlc_append_tx_crc(struct gb_beagleplay *bg)
  264. {
  265. bg->tx_crc ^= 0xffff;
  266. hdlc_append_escaped(bg, bg->tx_crc & 0xff);
  267. hdlc_append_escaped(bg, (bg->tx_crc >> 8) & 0xff);
  268. }
  269. static void hdlc_transmit(struct work_struct *work)
  270. {
  271. struct gb_beagleplay *bg = container_of(work, struct gb_beagleplay, tx_work);
  272. spin_lock_bh(&bg->tx_consumer_lock);
  273. hdlc_write(bg);
  274. spin_unlock_bh(&bg->tx_consumer_lock);
  275. }
  276. static void hdlc_tx_frames(struct gb_beagleplay *bg, u8 address, u8 control,
  277. const struct hdlc_payload payloads[], size_t count)
  278. {
  279. size_t i;
  280. spin_lock(&bg->tx_producer_lock);
  281. hdlc_append_tx_frame(bg);
  282. hdlc_append_tx_u8(bg, address);
  283. hdlc_append_tx_u8(bg, control);
  284. for (i = 0; i < count; ++i)
  285. hdlc_append_tx_buf(bg, payloads[i].buf, payloads[i].len);
  286. hdlc_append_tx_crc(bg);
  287. hdlc_append_tx_frame(bg);
  288. spin_unlock(&bg->tx_producer_lock);
  289. schedule_work(&bg->tx_work);
  290. }
  291. static void hdlc_tx_s_frame_ack(struct gb_beagleplay *bg)
  292. {
  293. hdlc_tx_frames(bg, bg->rx_buffer[0], (bg->rx_buffer[1] >> 1) & 0x7, NULL, 0);
  294. }
  295. static void hdlc_rx_frame(struct gb_beagleplay *bg)
  296. {
  297. u16 crc, len;
  298. u8 ctrl, *buf;
  299. u8 address = bg->rx_buffer[0];
  300. crc = crc_ccitt(0xffff, bg->rx_buffer, bg->rx_buffer_len);
  301. if (crc != 0xf0b8) {
  302. dev_warn_ratelimited(&bg->sd->dev, "CRC failed from %02x: 0x%04x", address, crc);
  303. return;
  304. }
  305. ctrl = bg->rx_buffer[1];
  306. buf = &bg->rx_buffer[2];
  307. len = bg->rx_buffer_len - 4;
  308. /* I-Frame, send S-Frame ACK */
  309. if ((ctrl & 1) == 0)
  310. hdlc_tx_s_frame_ack(bg);
  311. switch (address) {
  312. case ADDRESS_DBG:
  313. hdlc_rx_dbg_frame(bg, buf, len);
  314. break;
  315. case ADDRESS_GREYBUS:
  316. hdlc_rx_greybus_frame(bg, buf, len);
  317. break;
  318. default:
  319. dev_warn_ratelimited(&bg->sd->dev, "unknown frame %u", address);
  320. }
  321. }
  322. static size_t hdlc_rx(struct gb_beagleplay *bg, const u8 *data, size_t count)
  323. {
  324. size_t i;
  325. u8 c;
  326. for (i = 0; i < count; ++i) {
  327. c = data[i];
  328. switch (c) {
  329. case HDLC_FRAME:
  330. if (bg->rx_buffer_len)
  331. hdlc_rx_frame(bg);
  332. bg->rx_buffer_len = 0;
  333. break;
  334. case HDLC_ESC:
  335. bg->rx_in_esc = true;
  336. break;
  337. default:
  338. if (bg->rx_in_esc) {
  339. c ^= 0x20;
  340. bg->rx_in_esc = false;
  341. }
  342. if (bg->rx_buffer_len < MAX_RX_HDLC) {
  343. bg->rx_buffer[bg->rx_buffer_len] = c;
  344. bg->rx_buffer_len++;
  345. } else {
  346. dev_err_ratelimited(&bg->sd->dev, "RX Buffer Overflow");
  347. bg->rx_buffer_len = 0;
  348. }
  349. }
  350. }
  351. return count;
  352. }
  353. static int hdlc_init(struct gb_beagleplay *bg)
  354. {
  355. INIT_WORK(&bg->tx_work, hdlc_transmit);
  356. spin_lock_init(&bg->tx_producer_lock);
  357. spin_lock_init(&bg->tx_consumer_lock);
  358. bg->tx_circ_buf.head = 0;
  359. bg->tx_circ_buf.tail = 0;
  360. bg->tx_circ_buf.buf = devm_kmalloc(&bg->sd->dev, TX_CIRC_BUF_SIZE, GFP_KERNEL);
  361. if (!bg->tx_circ_buf.buf)
  362. return -ENOMEM;
  363. bg->rx_buffer_len = 0;
  364. bg->rx_in_esc = false;
  365. return 0;
  366. }
  367. static void hdlc_deinit(struct gb_beagleplay *bg)
  368. {
  369. flush_work(&bg->tx_work);
  370. }
  371. /**
  372. * csum8: Calculate 8-bit checksum on data
  373. *
  374. * @data: bytes to calculate 8-bit checksum of
  375. * @size: number of bytes
  376. * @base: starting value for checksum
  377. */
  378. static u8 csum8(const u8 *data, size_t size, u8 base)
  379. {
  380. size_t i;
  381. u8 sum = base;
  382. for (i = 0; i < size; ++i)
  383. sum += data[i];
  384. return sum;
  385. }
  386. static void cc1352_bootloader_send_ack(struct gb_beagleplay *bg)
  387. {
  388. static const u8 ack[] = { 0x00, CC1352_BOOTLOADER_ACK };
  389. serdev_device_write_buf(bg->sd, ack, sizeof(ack));
  390. }
  391. static void cc1352_bootloader_send_nack(struct gb_beagleplay *bg)
  392. {
  393. static const u8 nack[] = { 0x00, CC1352_BOOTLOADER_NACK };
  394. serdev_device_write_buf(bg->sd, nack, sizeof(nack));
  395. }
  396. /**
  397. * cc1352_bootloader_pkt_rx: Process a CC1352 Bootloader Packet
  398. *
  399. * @bg: beagleplay greybus driver
  400. * @data: packet buffer
  401. * @count: packet buffer size
  402. *
  403. * @return: number of bytes processed
  404. *
  405. * Here are the steps to successfully receive a packet from cc1352 bootloader
  406. * according to the docs:
  407. * 1. Wait for nonzero data to be returned from the device. This is important
  408. * as the device may send zero bytes between a sent and a received data
  409. * packet. The first nonzero byte received is the size of the packet that is
  410. * being received.
  411. * 2. Read the next byte, which is the checksum for the packet.
  412. * 3. Read the data bytes from the device. During the data phase, packet size
  413. * minus 2 bytes is sent.
  414. * 4. Calculate the checksum of the data bytes and verify it matches the
  415. * checksum received in the packet.
  416. * 5. Send an acknowledge byte or a not-acknowledge byte to the device to
  417. * indicate the successful or unsuccessful reception of the packet.
  418. */
  419. static int cc1352_bootloader_pkt_rx(struct gb_beagleplay *bg, const u8 *data,
  420. size_t count)
  421. {
  422. bool is_valid = false;
  423. switch (data[0]) {
  424. /* Skip 0x00 bytes. */
  425. case 0x00:
  426. return 1;
  427. case CC1352_BOOTLOADER_ACK:
  428. case CC1352_BOOTLOADER_NACK:
  429. WRITE_ONCE(bg->fwl_ack, data[0]);
  430. complete(&bg->fwl_ack_com);
  431. return 1;
  432. case 3:
  433. if (count < 3)
  434. return 0;
  435. is_valid = data[1] == data[2];
  436. WRITE_ONCE(bg->fwl_cmd_response, (u32)data[2]);
  437. break;
  438. case 6:
  439. if (count < 6)
  440. return 0;
  441. is_valid = csum8(&data[2], sizeof(__be32), 0) == data[1];
  442. WRITE_ONCE(bg->fwl_cmd_response, get_unaligned_be32(&data[2]));
  443. break;
  444. default:
  445. return -EINVAL;
  446. }
  447. if (is_valid) {
  448. cc1352_bootloader_send_ack(bg);
  449. complete(&bg->fwl_cmd_response_com);
  450. } else {
  451. dev_warn(&bg->sd->dev,
  452. "Dropping bootloader packet with invalid checksum");
  453. cc1352_bootloader_send_nack(bg);
  454. }
  455. return data[0];
  456. }
  457. static size_t cc1352_bootloader_rx(struct gb_beagleplay *bg, const u8 *data,
  458. size_t count)
  459. {
  460. int ret;
  461. size_t off = 0;
  462. memcpy(bg->rx_buffer + bg->rx_buffer_len, data, count);
  463. bg->rx_buffer_len += count;
  464. do {
  465. ret = cc1352_bootloader_pkt_rx(bg, bg->rx_buffer + off,
  466. bg->rx_buffer_len - off);
  467. if (ret < 0)
  468. return dev_err_probe(&bg->sd->dev, ret,
  469. "Invalid Packet");
  470. off += ret;
  471. } while (ret > 0 && off < count);
  472. bg->rx_buffer_len -= off;
  473. memmove(bg->rx_buffer, bg->rx_buffer + off, bg->rx_buffer_len);
  474. return count;
  475. }
  476. static size_t gb_tty_receive(struct serdev_device *sd, const u8 *data,
  477. size_t count)
  478. {
  479. struct gb_beagleplay *bg = serdev_device_get_drvdata(sd);
  480. if (READ_ONCE(bg->flashing_mode))
  481. return cc1352_bootloader_rx(bg, data, count);
  482. return hdlc_rx(bg, data, count);
  483. }
  484. static void gb_tty_wakeup(struct serdev_device *serdev)
  485. {
  486. struct gb_beagleplay *bg = serdev_device_get_drvdata(serdev);
  487. if (!READ_ONCE(bg->flashing_mode))
  488. schedule_work(&bg->tx_work);
  489. }
  490. static struct serdev_device_ops gb_beagleplay_ops = {
  491. .receive_buf = gb_tty_receive,
  492. .write_wakeup = gb_tty_wakeup,
  493. };
  494. /**
  495. * gb_message_send() - Send greybus message using HDLC over UART
  496. *
  497. * @hd: pointer to greybus host device
  498. * @cport: AP cport where message originates
  499. * @msg: greybus message to send
  500. * @mask: gfp mask
  501. *
  502. * Greybus HDLC frame has the following payload:
  503. * 1. le16 cport
  504. * 2. gb_operation_msg_hdr msg_header
  505. * 3. u8 *msg_payload
  506. */
  507. static int gb_message_send(struct gb_host_device *hd, u16 cport, struct gb_message *msg, gfp_t mask)
  508. {
  509. struct gb_beagleplay *bg = dev_get_drvdata(&hd->dev);
  510. struct hdlc_payload payloads[3];
  511. __le16 cport_id = cpu_to_le16(cport);
  512. dev_dbg(&hd->dev, "Sending greybus message with Operation %u, Type: %X on Cport %u",
  513. msg->header->operation_id, msg->header->type, cport);
  514. if (le16_to_cpu(msg->header->size) > RX_HDLC_PAYLOAD)
  515. return dev_err_probe(&hd->dev, -E2BIG, "Greybus message too big");
  516. payloads[0].buf = &cport_id;
  517. payloads[0].len = sizeof(cport_id);
  518. payloads[1].buf = msg->header;
  519. payloads[1].len = sizeof(*msg->header);
  520. payloads[2].buf = msg->payload;
  521. payloads[2].len = msg->payload_size;
  522. hdlc_tx_frames(bg, ADDRESS_GREYBUS, 0x03, payloads, 3);
  523. greybus_message_sent(bg->gb_hd, msg, 0);
  524. return 0;
  525. }
  526. static void gb_message_cancel(struct gb_message *message)
  527. {
  528. }
  529. static struct gb_hd_driver gb_hdlc_driver = { .message_send = gb_message_send,
  530. .message_cancel = gb_message_cancel };
  531. static void gb_beagleplay_start_svc(struct gb_beagleplay *bg)
  532. {
  533. const u8 command = CONTROL_SVC_START;
  534. const struct hdlc_payload payload = { .len = 1, .buf = (void *)&command };
  535. hdlc_tx_frames(bg, ADDRESS_CONTROL, 0x03, &payload, 1);
  536. }
  537. static void gb_beagleplay_stop_svc(struct gb_beagleplay *bg)
  538. {
  539. const u8 command = CONTROL_SVC_STOP;
  540. const struct hdlc_payload payload = { .len = 1, .buf = (void *)&command };
  541. hdlc_tx_frames(bg, ADDRESS_CONTROL, 0x03, &payload, 1);
  542. }
  543. static int cc1352_bootloader_wait_for_ack(struct gb_beagleplay *bg)
  544. {
  545. int ret;
  546. ret = wait_for_completion_timeout(
  547. &bg->fwl_ack_com, msecs_to_jiffies(CC1352_BOOTLOADER_TIMEOUT));
  548. if (ret < 0)
  549. return dev_err_probe(&bg->sd->dev, ret,
  550. "Failed to acquire ack semaphore");
  551. switch (READ_ONCE(bg->fwl_ack)) {
  552. case CC1352_BOOTLOADER_ACK:
  553. return 0;
  554. case CC1352_BOOTLOADER_NACK:
  555. return -EAGAIN;
  556. default:
  557. return -EINVAL;
  558. }
  559. }
  560. static int cc1352_bootloader_sync(struct gb_beagleplay *bg)
  561. {
  562. static const u8 sync_bytes[] = { 0x55, 0x55 };
  563. serdev_device_write_buf(bg->sd, sync_bytes, sizeof(sync_bytes));
  564. return cc1352_bootloader_wait_for_ack(bg);
  565. }
  566. static int cc1352_bootloader_get_status(struct gb_beagleplay *bg)
  567. {
  568. int ret;
  569. static const struct cc1352_bootloader_packet pkt = {
  570. .len = sizeof(pkt),
  571. .checksum = COMMAND_GET_STATUS,
  572. .cmd = COMMAND_GET_STATUS
  573. };
  574. serdev_device_write_buf(bg->sd, (const u8 *)&pkt, sizeof(pkt));
  575. ret = cc1352_bootloader_wait_for_ack(bg);
  576. if (ret < 0)
  577. return ret;
  578. ret = wait_for_completion_timeout(
  579. &bg->fwl_cmd_response_com,
  580. msecs_to_jiffies(CC1352_BOOTLOADER_TIMEOUT));
  581. if (ret < 0)
  582. return dev_err_probe(&bg->sd->dev, ret,
  583. "Failed to acquire last status semaphore");
  584. switch (READ_ONCE(bg->fwl_cmd_response)) {
  585. case COMMAND_RET_SUCCESS:
  586. return 0;
  587. default:
  588. return -EINVAL;
  589. }
  590. return 0;
  591. }
  592. static int cc1352_bootloader_erase(struct gb_beagleplay *bg)
  593. {
  594. int ret;
  595. static const struct cc1352_bootloader_packet pkt = {
  596. .len = sizeof(pkt),
  597. .checksum = COMMAND_BANK_ERASE,
  598. .cmd = COMMAND_BANK_ERASE
  599. };
  600. serdev_device_write_buf(bg->sd, (const u8 *)&pkt, sizeof(pkt));
  601. ret = cc1352_bootloader_wait_for_ack(bg);
  602. if (ret < 0)
  603. return ret;
  604. return cc1352_bootloader_get_status(bg);
  605. }
  606. static int cc1352_bootloader_reset(struct gb_beagleplay *bg)
  607. {
  608. static const struct cc1352_bootloader_packet pkt = {
  609. .len = sizeof(pkt),
  610. .checksum = COMMAND_RESET,
  611. .cmd = COMMAND_RESET
  612. };
  613. serdev_device_write_buf(bg->sd, (const u8 *)&pkt, sizeof(pkt));
  614. return cc1352_bootloader_wait_for_ack(bg);
  615. }
  616. /**
  617. * cc1352_bootloader_empty_pkt: Calculate the number of empty bytes in the current packet
  618. *
  619. * @data: packet bytes array to check
  620. * @size: number of bytes in array
  621. */
  622. static size_t cc1352_bootloader_empty_pkt(const u8 *data, size_t size)
  623. {
  624. size_t i;
  625. for (i = 0; i < size && data[i] == 0xff; ++i)
  626. continue;
  627. return i;
  628. }
  629. static int cc1352_bootloader_crc32(struct gb_beagleplay *bg, u32 *crc32)
  630. {
  631. int ret;
  632. static const struct cc1352_bootloader_crc32_cmd_data cmd_data = {
  633. .addr = 0, .size = cpu_to_be32(704 * 1024), .read_repeat = 0
  634. };
  635. const struct cc1352_bootloader_packet pkt = {
  636. .len = sizeof(pkt) + sizeof(cmd_data),
  637. .checksum = csum8((const void *)&cmd_data, sizeof(cmd_data),
  638. COMMAND_CRC32),
  639. .cmd = COMMAND_CRC32
  640. };
  641. serdev_device_write_buf(bg->sd, (const u8 *)&pkt, sizeof(pkt));
  642. serdev_device_write_buf(bg->sd, (const u8 *)&cmd_data,
  643. sizeof(cmd_data));
  644. ret = cc1352_bootloader_wait_for_ack(bg);
  645. if (ret < 0)
  646. return ret;
  647. ret = wait_for_completion_timeout(
  648. &bg->fwl_cmd_response_com,
  649. msecs_to_jiffies(CC1352_BOOTLOADER_TIMEOUT));
  650. if (ret < 0)
  651. return dev_err_probe(&bg->sd->dev, ret,
  652. "Failed to acquire last status semaphore");
  653. *crc32 = READ_ONCE(bg->fwl_cmd_response);
  654. return 0;
  655. }
  656. static int cc1352_bootloader_download(struct gb_beagleplay *bg, u32 size,
  657. u32 addr)
  658. {
  659. int ret;
  660. const struct cc1352_bootloader_download_cmd_data cmd_data = {
  661. .addr = cpu_to_be32(addr),
  662. .size = cpu_to_be32(size),
  663. };
  664. const struct cc1352_bootloader_packet pkt = {
  665. .len = sizeof(pkt) + sizeof(cmd_data),
  666. .checksum = csum8((const void *)&cmd_data, sizeof(cmd_data),
  667. COMMAND_DOWNLOAD),
  668. .cmd = COMMAND_DOWNLOAD
  669. };
  670. serdev_device_write_buf(bg->sd, (const u8 *)&pkt, sizeof(pkt));
  671. serdev_device_write_buf(bg->sd, (const u8 *)&cmd_data,
  672. sizeof(cmd_data));
  673. ret = cc1352_bootloader_wait_for_ack(bg);
  674. if (ret < 0)
  675. return ret;
  676. return cc1352_bootloader_get_status(bg);
  677. }
  678. static int cc1352_bootloader_send_data(struct gb_beagleplay *bg, const u8 *data,
  679. size_t size)
  680. {
  681. int ret, rem = min(size, CC1352_BOOTLOADER_PKT_MAX_SIZE);
  682. const struct cc1352_bootloader_packet pkt = {
  683. .len = sizeof(pkt) + rem,
  684. .checksum = csum8(data, rem, COMMAND_SEND_DATA),
  685. .cmd = COMMAND_SEND_DATA
  686. };
  687. serdev_device_write_buf(bg->sd, (const u8 *)&pkt, sizeof(pkt));
  688. serdev_device_write_buf(bg->sd, data, rem);
  689. ret = cc1352_bootloader_wait_for_ack(bg);
  690. if (ret < 0)
  691. return ret;
  692. ret = cc1352_bootloader_get_status(bg);
  693. if (ret < 0)
  694. return ret;
  695. return rem;
  696. }
  697. static void gb_greybus_deinit(struct gb_beagleplay *bg)
  698. {
  699. gb_hd_del(bg->gb_hd);
  700. gb_hd_put(bg->gb_hd);
  701. }
  702. static int gb_greybus_init(struct gb_beagleplay *bg)
  703. {
  704. int ret;
  705. bg->gb_hd = gb_hd_create(&gb_hdlc_driver, &bg->sd->dev, TX_CIRC_BUF_SIZE, GB_MAX_CPORTS);
  706. if (IS_ERR(bg->gb_hd)) {
  707. dev_err(&bg->sd->dev, "Failed to create greybus host device");
  708. return PTR_ERR(bg->gb_hd);
  709. }
  710. ret = gb_hd_add(bg->gb_hd);
  711. if (ret) {
  712. dev_err(&bg->sd->dev, "Failed to add greybus host device");
  713. goto free_gb_hd;
  714. }
  715. dev_set_drvdata(&bg->gb_hd->dev, bg);
  716. return 0;
  717. free_gb_hd:
  718. gb_greybus_deinit(bg);
  719. return ret;
  720. }
  721. static enum fw_upload_err cc1352_prepare(struct fw_upload *fw_upload,
  722. const u8 *data, u32 size)
  723. {
  724. int ret;
  725. u32 curr_crc32;
  726. struct gb_beagleplay *bg = fw_upload->dd_handle;
  727. dev_info(&bg->sd->dev, "CC1352 Start Flashing...");
  728. if (size != CC1352_FIRMWARE_SIZE)
  729. return FW_UPLOAD_ERR_INVALID_SIZE;
  730. /* Might involve network calls */
  731. gb_greybus_deinit(bg);
  732. msleep(5 * MSEC_PER_SEC);
  733. gb_beagleplay_stop_svc(bg);
  734. msleep(200);
  735. flush_work(&bg->tx_work);
  736. serdev_device_wait_until_sent(bg->sd, CC1352_BOOTLOADER_TIMEOUT);
  737. WRITE_ONCE(bg->flashing_mode, true);
  738. gpiod_direction_output(bg->bootloader_backdoor_gpio, 0);
  739. gpiod_direction_output(bg->rst_gpio, 0);
  740. msleep(200);
  741. gpiod_set_value(bg->rst_gpio, 1);
  742. msleep(200);
  743. gpiod_set_value(bg->bootloader_backdoor_gpio, 1);
  744. msleep(200);
  745. gpiod_direction_input(bg->bootloader_backdoor_gpio);
  746. gpiod_direction_input(bg->rst_gpio);
  747. ret = cc1352_bootloader_sync(bg);
  748. if (ret < 0)
  749. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_HW_ERROR,
  750. "Failed to sync");
  751. ret = cc1352_bootloader_crc32(bg, &curr_crc32);
  752. if (ret < 0)
  753. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_HW_ERROR,
  754. "Failed to fetch crc32");
  755. bg->fwl_crc32 = crc32(0xffffffff, data, size) ^ 0xffffffff;
  756. /* Check if attempting to reflash same firmware */
  757. if (bg->fwl_crc32 == curr_crc32) {
  758. dev_warn(&bg->sd->dev, "Skipping reflashing same image");
  759. cc1352_bootloader_reset(bg);
  760. WRITE_ONCE(bg->flashing_mode, false);
  761. msleep(200);
  762. if (gb_greybus_init(bg) < 0)
  763. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_RW_ERROR,
  764. "Failed to initialize greybus");
  765. gb_beagleplay_start_svc(bg);
  766. return FW_UPLOAD_ERR_FW_INVALID;
  767. }
  768. ret = cc1352_bootloader_erase(bg);
  769. if (ret < 0)
  770. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_HW_ERROR,
  771. "Failed to erase");
  772. bg->fwl_reset_addr = true;
  773. return FW_UPLOAD_ERR_NONE;
  774. }
  775. static void cc1352_cleanup(struct fw_upload *fw_upload)
  776. {
  777. struct gb_beagleplay *bg = fw_upload->dd_handle;
  778. WRITE_ONCE(bg->flashing_mode, false);
  779. }
  780. static enum fw_upload_err cc1352_write(struct fw_upload *fw_upload,
  781. const u8 *data, u32 offset, u32 size,
  782. u32 *written)
  783. {
  784. int ret;
  785. size_t empty_bytes;
  786. struct gb_beagleplay *bg = fw_upload->dd_handle;
  787. /* Skip 0xff packets. Significant performance improvement */
  788. empty_bytes = cc1352_bootloader_empty_pkt(data + offset, size);
  789. if (empty_bytes >= CC1352_BOOTLOADER_PKT_MAX_SIZE) {
  790. bg->fwl_reset_addr = true;
  791. *written = empty_bytes;
  792. return FW_UPLOAD_ERR_NONE;
  793. }
  794. if (bg->fwl_reset_addr) {
  795. ret = cc1352_bootloader_download(bg, size, offset);
  796. if (ret < 0)
  797. return dev_err_probe(&bg->sd->dev,
  798. FW_UPLOAD_ERR_HW_ERROR,
  799. "Failed to send download cmd");
  800. bg->fwl_reset_addr = false;
  801. }
  802. ret = cc1352_bootloader_send_data(bg, data + offset, size);
  803. if (ret < 0)
  804. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_HW_ERROR,
  805. "Failed to flash firmware");
  806. *written = ret;
  807. return FW_UPLOAD_ERR_NONE;
  808. }
  809. static enum fw_upload_err cc1352_poll_complete(struct fw_upload *fw_upload)
  810. {
  811. u32 curr_crc32;
  812. struct gb_beagleplay *bg = fw_upload->dd_handle;
  813. if (cc1352_bootloader_crc32(bg, &curr_crc32) < 0)
  814. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_HW_ERROR,
  815. "Failed to fetch crc32");
  816. if (bg->fwl_crc32 != curr_crc32)
  817. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_FW_INVALID,
  818. "Invalid CRC32");
  819. if (cc1352_bootloader_reset(bg) < 0)
  820. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_HW_ERROR,
  821. "Failed to reset");
  822. dev_info(&bg->sd->dev, "CC1352 Flashing Successful");
  823. WRITE_ONCE(bg->flashing_mode, false);
  824. msleep(200);
  825. if (gb_greybus_init(bg) < 0)
  826. return dev_err_probe(&bg->sd->dev, FW_UPLOAD_ERR_RW_ERROR,
  827. "Failed to initialize greybus");
  828. gb_beagleplay_start_svc(bg);
  829. return FW_UPLOAD_ERR_NONE;
  830. }
  831. static void cc1352_cancel(struct fw_upload *fw_upload)
  832. {
  833. struct gb_beagleplay *bg = fw_upload->dd_handle;
  834. dev_info(&bg->sd->dev, "CC1352 Bootloader Cancel");
  835. cc1352_bootloader_reset(bg);
  836. }
  837. static void gb_serdev_deinit(struct gb_beagleplay *bg)
  838. {
  839. serdev_device_close(bg->sd);
  840. }
  841. static int gb_serdev_init(struct gb_beagleplay *bg)
  842. {
  843. int ret;
  844. serdev_device_set_drvdata(bg->sd, bg);
  845. serdev_device_set_client_ops(bg->sd, &gb_beagleplay_ops);
  846. ret = serdev_device_open(bg->sd);
  847. if (ret)
  848. return dev_err_probe(&bg->sd->dev, ret, "Unable to open serial device");
  849. serdev_device_set_baudrate(bg->sd, 115200);
  850. serdev_device_set_flow_control(bg->sd, false);
  851. return 0;
  852. }
  853. static const struct fw_upload_ops cc1352_bootloader_ops = {
  854. .prepare = cc1352_prepare,
  855. .write = cc1352_write,
  856. .poll_complete = cc1352_poll_complete,
  857. .cancel = cc1352_cancel,
  858. .cleanup = cc1352_cleanup
  859. };
  860. static int gb_fw_init(struct gb_beagleplay *bg)
  861. {
  862. int ret;
  863. struct fw_upload *fwl;
  864. struct gpio_desc *desc;
  865. bg->fwl = NULL;
  866. bg->bootloader_backdoor_gpio = NULL;
  867. bg->rst_gpio = NULL;
  868. bg->flashing_mode = false;
  869. bg->fwl_cmd_response = 0;
  870. bg->fwl_ack = 0;
  871. init_completion(&bg->fwl_ack_com);
  872. init_completion(&bg->fwl_cmd_response_com);
  873. desc = devm_gpiod_get(&bg->sd->dev, "bootloader-backdoor", GPIOD_IN);
  874. if (IS_ERR(desc))
  875. return PTR_ERR(desc);
  876. bg->bootloader_backdoor_gpio = desc;
  877. desc = devm_gpiod_get(&bg->sd->dev, "reset", GPIOD_IN);
  878. if (IS_ERR(desc)) {
  879. ret = PTR_ERR(desc);
  880. goto free_boot;
  881. }
  882. bg->rst_gpio = desc;
  883. fwl = firmware_upload_register(THIS_MODULE, &bg->sd->dev, "cc1352p7",
  884. &cc1352_bootloader_ops, bg);
  885. if (IS_ERR(fwl)) {
  886. ret = PTR_ERR(fwl);
  887. goto free_reset;
  888. }
  889. bg->fwl = fwl;
  890. return 0;
  891. free_reset:
  892. devm_gpiod_put(&bg->sd->dev, bg->rst_gpio);
  893. bg->rst_gpio = NULL;
  894. free_boot:
  895. devm_gpiod_put(&bg->sd->dev, bg->bootloader_backdoor_gpio);
  896. bg->bootloader_backdoor_gpio = NULL;
  897. return ret;
  898. }
  899. static void gb_fw_deinit(struct gb_beagleplay *bg)
  900. {
  901. firmware_upload_unregister(bg->fwl);
  902. }
  903. static int gb_beagleplay_probe(struct serdev_device *serdev)
  904. {
  905. int ret = 0;
  906. struct gb_beagleplay *bg;
  907. bg = devm_kmalloc(&serdev->dev, sizeof(*bg), GFP_KERNEL);
  908. if (!bg)
  909. return -ENOMEM;
  910. bg->sd = serdev;
  911. ret = gb_serdev_init(bg);
  912. if (ret)
  913. return ret;
  914. ret = hdlc_init(bg);
  915. if (ret)
  916. goto free_serdev;
  917. ret = gb_fw_init(bg);
  918. if (ret)
  919. goto free_hdlc;
  920. ret = gb_greybus_init(bg);
  921. if (ret)
  922. goto free_fw;
  923. gb_beagleplay_start_svc(bg);
  924. return 0;
  925. free_fw:
  926. gb_fw_deinit(bg);
  927. free_hdlc:
  928. hdlc_deinit(bg);
  929. free_serdev:
  930. gb_serdev_deinit(bg);
  931. return ret;
  932. }
  933. static void gb_beagleplay_remove(struct serdev_device *serdev)
  934. {
  935. struct gb_beagleplay *bg = serdev_device_get_drvdata(serdev);
  936. gb_fw_deinit(bg);
  937. gb_greybus_deinit(bg);
  938. gb_beagleplay_stop_svc(bg);
  939. hdlc_deinit(bg);
  940. gb_serdev_deinit(bg);
  941. }
  942. static const struct of_device_id gb_beagleplay_of_match[] = {
  943. {
  944. .compatible = "ti,cc1352p7",
  945. },
  946. {},
  947. };
  948. MODULE_DEVICE_TABLE(of, gb_beagleplay_of_match);
  949. static struct serdev_device_driver gb_beagleplay_driver = {
  950. .probe = gb_beagleplay_probe,
  951. .remove = gb_beagleplay_remove,
  952. .driver = {
  953. .name = "gb_beagleplay",
  954. .of_match_table = gb_beagleplay_of_match,
  955. },
  956. };
  957. module_serdev_device_driver(gb_beagleplay_driver);
  958. MODULE_LICENSE("GPL");
  959. MODULE_AUTHOR("Ayush Singh <ayushdevel1325@gmail.com>");
  960. MODULE_DESCRIPTION("A Greybus driver for BeaglePlay");