iqs5xx.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Azoteq IQS550/572/525 Trackpad/Touchscreen Controller
  4. *
  5. * Copyright (C) 2018 Jeff LaBundy <jeff@labundy.com>
  6. *
  7. * These devices require firmware exported from a PC-based configuration tool
  8. * made available by the vendor. Firmware files may be pushed to the device's
  9. * nonvolatile memory by writing the filename to the 'fw_file' sysfs control.
  10. *
  11. * Link to PC-based configuration tool and datasheet: https://www.azoteq.com/
  12. */
  13. #include <linux/bits.h>
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <linux/err.h>
  17. #include <linux/firmware.h>
  18. #include <linux/gpio/consumer.h>
  19. #include <linux/i2c.h>
  20. #include <linux/input.h>
  21. #include <linux/input/mt.h>
  22. #include <linux/input/touchscreen.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mod_devicetable.h>
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <linux/unaligned.h>
  29. #define IQS5XX_FW_FILE_LEN 64
  30. #define IQS5XX_NUM_RETRIES 10
  31. #define IQS5XX_NUM_CONTACTS 5
  32. #define IQS5XX_WR_BYTES_MAX 2
  33. #define IQS5XX_PROD_NUM_IQS550 40
  34. #define IQS5XX_PROD_NUM_IQS572 58
  35. #define IQS5XX_PROD_NUM_IQS525 52
  36. #define IQS5XX_SHOW_RESET BIT(7)
  37. #define IQS5XX_ACK_RESET BIT(7)
  38. #define IQS5XX_SUSPEND BIT(0)
  39. #define IQS5XX_RESUME 0
  40. #define IQS5XX_SETUP_COMPLETE BIT(6)
  41. #define IQS5XX_WDT BIT(5)
  42. #define IQS5XX_ALP_REATI BIT(3)
  43. #define IQS5XX_REATI BIT(2)
  44. #define IQS5XX_TP_EVENT BIT(2)
  45. #define IQS5XX_EVENT_MODE BIT(0)
  46. #define IQS5XX_PROD_NUM 0x0000
  47. #define IQS5XX_SYS_INFO0 0x000F
  48. #define IQS5XX_SYS_INFO1 0x0010
  49. #define IQS5XX_SYS_CTRL0 0x0431
  50. #define IQS5XX_SYS_CTRL1 0x0432
  51. #define IQS5XX_SYS_CFG0 0x058E
  52. #define IQS5XX_SYS_CFG1 0x058F
  53. #define IQS5XX_X_RES 0x066E
  54. #define IQS5XX_Y_RES 0x0670
  55. #define IQS5XX_EXP_FILE 0x0677
  56. #define IQS5XX_CHKSM 0x83C0
  57. #define IQS5XX_APP 0x8400
  58. #define IQS5XX_CSTM 0xBE00
  59. #define IQS5XX_PMAP_END 0xBFFF
  60. #define IQS5XX_END_COMM 0xEEEE
  61. #define IQS5XX_CHKSM_LEN (IQS5XX_APP - IQS5XX_CHKSM)
  62. #define IQS5XX_APP_LEN (IQS5XX_CSTM - IQS5XX_APP)
  63. #define IQS5XX_CSTM_LEN (IQS5XX_PMAP_END + 1 - IQS5XX_CSTM)
  64. #define IQS5XX_PMAP_LEN (IQS5XX_PMAP_END + 1 - IQS5XX_CHKSM)
  65. #define IQS5XX_REC_HDR_LEN 4
  66. #define IQS5XX_REC_LEN_MAX 255
  67. #define IQS5XX_REC_TYPE_DATA 0x00
  68. #define IQS5XX_REC_TYPE_EOF 0x01
  69. #define IQS5XX_BL_ADDR_MASK 0x40
  70. #define IQS5XX_BL_CMD_VER 0x00
  71. #define IQS5XX_BL_CMD_READ 0x01
  72. #define IQS5XX_BL_CMD_EXEC 0x02
  73. #define IQS5XX_BL_CMD_CRC 0x03
  74. #define IQS5XX_BL_BLK_LEN_MAX 64
  75. #define IQS5XX_BL_ID 0x0200
  76. #define IQS5XX_BL_STATUS_NONE 0xEE
  77. #define IQS5XX_BL_CRC_PASS 0x00
  78. #define IQS5XX_BL_CRC_FAIL 0x01
  79. #define IQS5XX_BL_ATTEMPTS 3
  80. struct iqs5xx_dev_id_info {
  81. __be16 prod_num;
  82. __be16 proj_num;
  83. u8 major_ver;
  84. u8 minor_ver;
  85. u8 bl_status;
  86. } __packed;
  87. struct iqs5xx_ihex_rec {
  88. char start;
  89. char len[2];
  90. char addr[4];
  91. char type[2];
  92. char data[2];
  93. } __packed;
  94. struct iqs5xx_touch_data {
  95. __be16 abs_x;
  96. __be16 abs_y;
  97. __be16 strength;
  98. u8 area;
  99. } __packed;
  100. struct iqs5xx_status {
  101. u8 sys_info[2];
  102. u8 num_active;
  103. __be16 rel_x;
  104. __be16 rel_y;
  105. struct iqs5xx_touch_data touch_data[IQS5XX_NUM_CONTACTS];
  106. } __packed;
  107. struct iqs5xx_private {
  108. struct i2c_client *client;
  109. struct input_dev *input;
  110. struct gpio_desc *reset_gpio;
  111. struct touchscreen_properties prop;
  112. struct mutex lock;
  113. struct iqs5xx_dev_id_info dev_id_info;
  114. u8 exp_file[2];
  115. };
  116. static int iqs5xx_read_burst(struct i2c_client *client,
  117. u16 reg, void *val, u16 len)
  118. {
  119. __be16 reg_buf = cpu_to_be16(reg);
  120. int ret, i;
  121. struct i2c_msg msg[] = {
  122. {
  123. .addr = client->addr,
  124. .flags = 0,
  125. .len = sizeof(reg_buf),
  126. .buf = (u8 *)&reg_buf,
  127. },
  128. {
  129. .addr = client->addr,
  130. .flags = I2C_M_RD,
  131. .len = len,
  132. .buf = (u8 *)val,
  133. },
  134. };
  135. /*
  136. * The first addressing attempt outside of a communication window fails
  137. * and must be retried, after which the device clock stretches until it
  138. * is available.
  139. */
  140. for (i = 0; i < IQS5XX_NUM_RETRIES; i++) {
  141. ret = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
  142. if (ret == ARRAY_SIZE(msg))
  143. return 0;
  144. usleep_range(200, 300);
  145. }
  146. if (ret >= 0)
  147. ret = -EIO;
  148. dev_err(&client->dev, "Failed to read from address 0x%04X: %d\n",
  149. reg, ret);
  150. return ret;
  151. }
  152. static int iqs5xx_read_word(struct i2c_client *client, u16 reg, u16 *val)
  153. {
  154. __be16 val_buf;
  155. int error;
  156. error = iqs5xx_read_burst(client, reg, &val_buf, sizeof(val_buf));
  157. if (error)
  158. return error;
  159. *val = be16_to_cpu(val_buf);
  160. return 0;
  161. }
  162. static int iqs5xx_write_burst(struct i2c_client *client,
  163. u16 reg, const void *val, u16 len)
  164. {
  165. int ret, i;
  166. u16 mlen = sizeof(reg) + len;
  167. u8 mbuf[sizeof(reg) + IQS5XX_WR_BYTES_MAX];
  168. if (len > IQS5XX_WR_BYTES_MAX)
  169. return -EINVAL;
  170. put_unaligned_be16(reg, mbuf);
  171. memcpy(mbuf + sizeof(reg), val, len);
  172. /*
  173. * The first addressing attempt outside of a communication window fails
  174. * and must be retried, after which the device clock stretches until it
  175. * is available.
  176. */
  177. for (i = 0; i < IQS5XX_NUM_RETRIES; i++) {
  178. ret = i2c_master_send(client, mbuf, mlen);
  179. if (ret == mlen)
  180. return 0;
  181. usleep_range(200, 300);
  182. }
  183. if (ret >= 0)
  184. ret = -EIO;
  185. dev_err(&client->dev, "Failed to write to address 0x%04X: %d\n",
  186. reg, ret);
  187. return ret;
  188. }
  189. static int iqs5xx_write_word(struct i2c_client *client, u16 reg, u16 val)
  190. {
  191. __be16 val_buf = cpu_to_be16(val);
  192. return iqs5xx_write_burst(client, reg, &val_buf, sizeof(val_buf));
  193. }
  194. static int iqs5xx_write_byte(struct i2c_client *client, u16 reg, u8 val)
  195. {
  196. return iqs5xx_write_burst(client, reg, &val, sizeof(val));
  197. }
  198. static void iqs5xx_reset(struct i2c_client *client)
  199. {
  200. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  201. gpiod_set_value_cansleep(iqs5xx->reset_gpio, 1);
  202. usleep_range(200, 300);
  203. gpiod_set_value_cansleep(iqs5xx->reset_gpio, 0);
  204. }
  205. static int iqs5xx_bl_cmd(struct i2c_client *client, u8 bl_cmd, u16 bl_addr)
  206. {
  207. struct i2c_msg msg;
  208. int ret;
  209. u8 mbuf[sizeof(bl_cmd) + sizeof(bl_addr)];
  210. msg.addr = client->addr ^ IQS5XX_BL_ADDR_MASK;
  211. msg.flags = 0;
  212. msg.len = sizeof(bl_cmd);
  213. msg.buf = mbuf;
  214. *mbuf = bl_cmd;
  215. switch (bl_cmd) {
  216. case IQS5XX_BL_CMD_VER:
  217. case IQS5XX_BL_CMD_CRC:
  218. case IQS5XX_BL_CMD_EXEC:
  219. break;
  220. case IQS5XX_BL_CMD_READ:
  221. msg.len += sizeof(bl_addr);
  222. put_unaligned_be16(bl_addr, mbuf + sizeof(bl_cmd));
  223. break;
  224. default:
  225. return -EINVAL;
  226. }
  227. ret = i2c_transfer(client->adapter, &msg, 1);
  228. if (ret != 1)
  229. goto msg_fail;
  230. switch (bl_cmd) {
  231. case IQS5XX_BL_CMD_VER:
  232. msg.len = sizeof(u16);
  233. break;
  234. case IQS5XX_BL_CMD_CRC:
  235. msg.len = sizeof(u8);
  236. /*
  237. * This delay saves the bus controller the trouble of having to
  238. * tolerate a relatively long clock-stretching period while the
  239. * CRC is calculated.
  240. */
  241. msleep(50);
  242. break;
  243. case IQS5XX_BL_CMD_EXEC:
  244. usleep_range(10000, 10100);
  245. fallthrough;
  246. default:
  247. return 0;
  248. }
  249. msg.flags = I2C_M_RD;
  250. ret = i2c_transfer(client->adapter, &msg, 1);
  251. if (ret != 1)
  252. goto msg_fail;
  253. if (bl_cmd == IQS5XX_BL_CMD_VER &&
  254. get_unaligned_be16(mbuf) != IQS5XX_BL_ID) {
  255. dev_err(&client->dev, "Unrecognized bootloader ID: 0x%04X\n",
  256. get_unaligned_be16(mbuf));
  257. return -EINVAL;
  258. }
  259. if (bl_cmd == IQS5XX_BL_CMD_CRC && *mbuf != IQS5XX_BL_CRC_PASS) {
  260. dev_err(&client->dev, "Bootloader CRC failed\n");
  261. return -EIO;
  262. }
  263. return 0;
  264. msg_fail:
  265. if (ret >= 0)
  266. ret = -EIO;
  267. if (bl_cmd != IQS5XX_BL_CMD_VER)
  268. dev_err(&client->dev,
  269. "Unsuccessful bootloader command 0x%02X: %d\n",
  270. bl_cmd, ret);
  271. return ret;
  272. }
  273. static int iqs5xx_bl_open(struct i2c_client *client)
  274. {
  275. int error, i, j;
  276. /*
  277. * The device opens a bootloader polling window for 2 ms following the
  278. * release of reset. If the host cannot establish communication during
  279. * this time frame, it must cycle reset again.
  280. */
  281. for (i = 0; i < IQS5XX_BL_ATTEMPTS; i++) {
  282. iqs5xx_reset(client);
  283. usleep_range(350, 400);
  284. for (j = 0; j < IQS5XX_NUM_RETRIES; j++) {
  285. error = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_VER, 0);
  286. if (!error)
  287. usleep_range(10000, 10100);
  288. else if (error != -EINVAL)
  289. continue;
  290. return error;
  291. }
  292. }
  293. dev_err(&client->dev, "Failed to open bootloader: %d\n", error);
  294. return error;
  295. }
  296. static int iqs5xx_bl_write(struct i2c_client *client,
  297. u16 bl_addr, u8 *pmap_data, u16 pmap_len)
  298. {
  299. struct i2c_msg msg;
  300. int ret, i;
  301. u8 mbuf[sizeof(bl_addr) + IQS5XX_BL_BLK_LEN_MAX];
  302. if (pmap_len % IQS5XX_BL_BLK_LEN_MAX)
  303. return -EINVAL;
  304. msg.addr = client->addr ^ IQS5XX_BL_ADDR_MASK;
  305. msg.flags = 0;
  306. msg.len = sizeof(mbuf);
  307. msg.buf = mbuf;
  308. for (i = 0; i < pmap_len; i += IQS5XX_BL_BLK_LEN_MAX) {
  309. put_unaligned_be16(bl_addr + i, mbuf);
  310. memcpy(mbuf + sizeof(bl_addr), pmap_data + i,
  311. sizeof(mbuf) - sizeof(bl_addr));
  312. ret = i2c_transfer(client->adapter, &msg, 1);
  313. if (ret != 1)
  314. goto msg_fail;
  315. usleep_range(10000, 10100);
  316. }
  317. return 0;
  318. msg_fail:
  319. if (ret >= 0)
  320. ret = -EIO;
  321. dev_err(&client->dev, "Failed to write block at address 0x%04X: %d\n",
  322. bl_addr + i, ret);
  323. return ret;
  324. }
  325. static int iqs5xx_bl_verify(struct i2c_client *client,
  326. u16 bl_addr, u8 *pmap_data, u16 pmap_len)
  327. {
  328. struct i2c_msg msg;
  329. int ret, i;
  330. u8 bl_data[IQS5XX_BL_BLK_LEN_MAX];
  331. if (pmap_len % IQS5XX_BL_BLK_LEN_MAX)
  332. return -EINVAL;
  333. msg.addr = client->addr ^ IQS5XX_BL_ADDR_MASK;
  334. msg.flags = I2C_M_RD;
  335. msg.len = sizeof(bl_data);
  336. msg.buf = bl_data;
  337. for (i = 0; i < pmap_len; i += IQS5XX_BL_BLK_LEN_MAX) {
  338. ret = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_READ, bl_addr + i);
  339. if (ret)
  340. return ret;
  341. ret = i2c_transfer(client->adapter, &msg, 1);
  342. if (ret != 1)
  343. goto msg_fail;
  344. if (memcmp(bl_data, pmap_data + i, sizeof(bl_data))) {
  345. dev_err(&client->dev,
  346. "Failed to verify block at address 0x%04X\n",
  347. bl_addr + i);
  348. return -EIO;
  349. }
  350. }
  351. return 0;
  352. msg_fail:
  353. if (ret >= 0)
  354. ret = -EIO;
  355. dev_err(&client->dev, "Failed to read block at address 0x%04X: %d\n",
  356. bl_addr + i, ret);
  357. return ret;
  358. }
  359. static int iqs5xx_set_state(struct i2c_client *client, u8 state)
  360. {
  361. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  362. int error1, error2;
  363. if (!iqs5xx->dev_id_info.bl_status)
  364. return 0;
  365. mutex_lock(&iqs5xx->lock);
  366. /*
  367. * Addressing the device outside of a communication window prompts it
  368. * to assert the RDY output, so disable the interrupt line to prevent
  369. * the handler from servicing a false interrupt.
  370. */
  371. disable_irq(client->irq);
  372. error1 = iqs5xx_write_byte(client, IQS5XX_SYS_CTRL1, state);
  373. error2 = iqs5xx_write_byte(client, IQS5XX_END_COMM, 0);
  374. usleep_range(50, 100);
  375. enable_irq(client->irq);
  376. mutex_unlock(&iqs5xx->lock);
  377. if (error1)
  378. return error1;
  379. return error2;
  380. }
  381. static int iqs5xx_open(struct input_dev *input)
  382. {
  383. struct iqs5xx_private *iqs5xx = input_get_drvdata(input);
  384. return iqs5xx_set_state(iqs5xx->client, IQS5XX_RESUME);
  385. }
  386. static void iqs5xx_close(struct input_dev *input)
  387. {
  388. struct iqs5xx_private *iqs5xx = input_get_drvdata(input);
  389. iqs5xx_set_state(iqs5xx->client, IQS5XX_SUSPEND);
  390. }
  391. static int iqs5xx_axis_init(struct i2c_client *client)
  392. {
  393. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  394. struct touchscreen_properties *prop = &iqs5xx->prop;
  395. struct input_dev *input = iqs5xx->input;
  396. u16 max_x, max_y;
  397. int error;
  398. if (!input) {
  399. input = devm_input_allocate_device(&client->dev);
  400. if (!input)
  401. return -ENOMEM;
  402. input->name = client->name;
  403. input->id.bustype = BUS_I2C;
  404. input->open = iqs5xx_open;
  405. input->close = iqs5xx_close;
  406. input_set_drvdata(input, iqs5xx);
  407. iqs5xx->input = input;
  408. }
  409. error = iqs5xx_read_word(client, IQS5XX_X_RES, &max_x);
  410. if (error)
  411. return error;
  412. error = iqs5xx_read_word(client, IQS5XX_Y_RES, &max_y);
  413. if (error)
  414. return error;
  415. input_set_abs_params(input, ABS_MT_POSITION_X, 0, max_x, 0, 0);
  416. input_set_abs_params(input, ABS_MT_POSITION_Y, 0, max_y, 0, 0);
  417. input_set_abs_params(input, ABS_MT_PRESSURE, 0, U16_MAX, 0, 0);
  418. touchscreen_parse_properties(input, true, prop);
  419. /*
  420. * The device reserves 0xFFFF for coordinates that correspond to slots
  421. * which are not in a state of touch.
  422. */
  423. if (prop->max_x >= U16_MAX || prop->max_y >= U16_MAX) {
  424. dev_err(&client->dev, "Invalid touchscreen size: %u*%u\n",
  425. prop->max_x, prop->max_y);
  426. return -EINVAL;
  427. }
  428. if (prop->max_x != max_x) {
  429. error = iqs5xx_write_word(client, IQS5XX_X_RES, prop->max_x);
  430. if (error)
  431. return error;
  432. }
  433. if (prop->max_y != max_y) {
  434. error = iqs5xx_write_word(client, IQS5XX_Y_RES, prop->max_y);
  435. if (error)
  436. return error;
  437. }
  438. error = input_mt_init_slots(input, IQS5XX_NUM_CONTACTS,
  439. INPUT_MT_DIRECT);
  440. if (error)
  441. dev_err(&client->dev, "Failed to initialize slots: %d\n",
  442. error);
  443. return error;
  444. }
  445. static int iqs5xx_dev_init(struct i2c_client *client)
  446. {
  447. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  448. struct iqs5xx_dev_id_info *dev_id_info;
  449. int error;
  450. u8 buf[sizeof(*dev_id_info) + 1];
  451. error = iqs5xx_read_burst(client, IQS5XX_PROD_NUM,
  452. &buf[1], sizeof(*dev_id_info));
  453. if (error)
  454. return iqs5xx_bl_open(client);
  455. /*
  456. * A000 and B000 devices use 8-bit and 16-bit addressing, respectively.
  457. * Querying an A000 device's version information with 16-bit addressing
  458. * gives the appearance that the data is shifted by one byte; a nonzero
  459. * leading array element suggests this could be the case (in which case
  460. * the missing zero is prepended).
  461. */
  462. buf[0] = 0;
  463. dev_id_info = (struct iqs5xx_dev_id_info *)&buf[buf[1] ? 0 : 1];
  464. switch (be16_to_cpu(dev_id_info->prod_num)) {
  465. case IQS5XX_PROD_NUM_IQS550:
  466. case IQS5XX_PROD_NUM_IQS572:
  467. case IQS5XX_PROD_NUM_IQS525:
  468. break;
  469. default:
  470. dev_err(&client->dev, "Unrecognized product number: %u\n",
  471. be16_to_cpu(dev_id_info->prod_num));
  472. return -EINVAL;
  473. }
  474. /*
  475. * With the product number recognized yet shifted by one byte, open the
  476. * bootloader and wait for user space to convert the A000 device into a
  477. * B000 device via new firmware.
  478. */
  479. if (buf[1]) {
  480. dev_err(&client->dev, "Opening bootloader for A000 device\n");
  481. return iqs5xx_bl_open(client);
  482. }
  483. error = iqs5xx_read_burst(client, IQS5XX_EXP_FILE,
  484. iqs5xx->exp_file, sizeof(iqs5xx->exp_file));
  485. if (error)
  486. return error;
  487. error = iqs5xx_axis_init(client);
  488. if (error)
  489. return error;
  490. error = iqs5xx_write_byte(client, IQS5XX_SYS_CTRL0, IQS5XX_ACK_RESET);
  491. if (error)
  492. return error;
  493. error = iqs5xx_write_byte(client, IQS5XX_SYS_CFG0,
  494. IQS5XX_SETUP_COMPLETE | IQS5XX_WDT |
  495. IQS5XX_ALP_REATI | IQS5XX_REATI);
  496. if (error)
  497. return error;
  498. error = iqs5xx_write_byte(client, IQS5XX_SYS_CFG1,
  499. IQS5XX_TP_EVENT | IQS5XX_EVENT_MODE);
  500. if (error)
  501. return error;
  502. error = iqs5xx_write_byte(client, IQS5XX_END_COMM, 0);
  503. if (error)
  504. return error;
  505. iqs5xx->dev_id_info = *dev_id_info;
  506. /*
  507. * The following delay allows ATI to complete before the open and close
  508. * callbacks are free to elicit I2C communication. Any attempts to read
  509. * from or write to the device during this time may face extended clock
  510. * stretching and prompt the I2C controller to report an error.
  511. */
  512. msleep(250);
  513. return 0;
  514. }
  515. static irqreturn_t iqs5xx_irq(int irq, void *data)
  516. {
  517. struct iqs5xx_private *iqs5xx = data;
  518. struct iqs5xx_status status;
  519. struct i2c_client *client = iqs5xx->client;
  520. struct input_dev *input = iqs5xx->input;
  521. int error, i;
  522. /*
  523. * This check is purely a precaution, as the device does not assert the
  524. * RDY output during bootloader mode. If the device operates outside of
  525. * bootloader mode, the input device is guaranteed to be allocated.
  526. */
  527. if (!iqs5xx->dev_id_info.bl_status)
  528. return IRQ_NONE;
  529. error = iqs5xx_read_burst(client, IQS5XX_SYS_INFO0,
  530. &status, sizeof(status));
  531. if (error)
  532. return IRQ_NONE;
  533. if (status.sys_info[0] & IQS5XX_SHOW_RESET) {
  534. dev_err(&client->dev, "Unexpected device reset\n");
  535. error = iqs5xx_dev_init(client);
  536. if (error) {
  537. dev_err(&client->dev,
  538. "Failed to re-initialize device: %d\n", error);
  539. return IRQ_NONE;
  540. }
  541. return IRQ_HANDLED;
  542. }
  543. for (i = 0; i < ARRAY_SIZE(status.touch_data); i++) {
  544. struct iqs5xx_touch_data *touch_data = &status.touch_data[i];
  545. u16 pressure = be16_to_cpu(touch_data->strength);
  546. input_mt_slot(input, i);
  547. if (input_mt_report_slot_state(input, MT_TOOL_FINGER,
  548. pressure != 0)) {
  549. touchscreen_report_pos(input, &iqs5xx->prop,
  550. be16_to_cpu(touch_data->abs_x),
  551. be16_to_cpu(touch_data->abs_y),
  552. true);
  553. input_report_abs(input, ABS_MT_PRESSURE, pressure);
  554. }
  555. }
  556. input_mt_sync_frame(input);
  557. input_sync(input);
  558. error = iqs5xx_write_byte(client, IQS5XX_END_COMM, 0);
  559. if (error)
  560. return IRQ_NONE;
  561. /*
  562. * Once the communication window is closed, a small delay is added to
  563. * ensure the device's RDY output has been deasserted by the time the
  564. * interrupt handler returns.
  565. */
  566. usleep_range(50, 100);
  567. return IRQ_HANDLED;
  568. }
  569. static int iqs5xx_fw_file_parse(struct i2c_client *client,
  570. const char *fw_file, u8 *pmap)
  571. {
  572. const struct firmware *fw;
  573. struct iqs5xx_ihex_rec *rec;
  574. size_t pos = 0;
  575. int error, i;
  576. u16 rec_num = 1;
  577. u16 rec_addr;
  578. u8 rec_len, rec_type, rec_chksm, chksm;
  579. u8 rec_hdr[IQS5XX_REC_HDR_LEN];
  580. u8 rec_data[IQS5XX_REC_LEN_MAX];
  581. /*
  582. * Firmware exported from the vendor's configuration tool deviates from
  583. * standard ihex as follows: (1) the checksum for records corresponding
  584. * to user-exported settings is not recalculated, and (2) an address of
  585. * 0xFFFF is used for the EOF record.
  586. *
  587. * Because the ihex2fw tool tolerates neither (1) nor (2), the slightly
  588. * nonstandard ihex firmware is parsed directly by the driver.
  589. */
  590. error = request_firmware(&fw, fw_file, &client->dev);
  591. if (error) {
  592. dev_err(&client->dev, "Failed to request firmware %s: %d\n",
  593. fw_file, error);
  594. return error;
  595. }
  596. do {
  597. if (pos + sizeof(*rec) > fw->size) {
  598. dev_err(&client->dev, "Insufficient firmware size\n");
  599. error = -EINVAL;
  600. break;
  601. }
  602. rec = (struct iqs5xx_ihex_rec *)(fw->data + pos);
  603. pos += sizeof(*rec);
  604. if (rec->start != ':') {
  605. dev_err(&client->dev, "Invalid start at record %u\n",
  606. rec_num);
  607. error = -EINVAL;
  608. break;
  609. }
  610. error = hex2bin(rec_hdr, rec->len, sizeof(rec_hdr));
  611. if (error) {
  612. dev_err(&client->dev, "Invalid header at record %u\n",
  613. rec_num);
  614. break;
  615. }
  616. rec_len = *rec_hdr;
  617. rec_addr = get_unaligned_be16(rec_hdr + sizeof(rec_len));
  618. rec_type = *(rec_hdr + sizeof(rec_len) + sizeof(rec_addr));
  619. if (pos + rec_len * 2 > fw->size) {
  620. dev_err(&client->dev, "Insufficient firmware size\n");
  621. error = -EINVAL;
  622. break;
  623. }
  624. pos += (rec_len * 2);
  625. error = hex2bin(rec_data, rec->data, rec_len);
  626. if (error) {
  627. dev_err(&client->dev, "Invalid data at record %u\n",
  628. rec_num);
  629. break;
  630. }
  631. error = hex2bin(&rec_chksm,
  632. rec->data + rec_len * 2, sizeof(rec_chksm));
  633. if (error) {
  634. dev_err(&client->dev, "Invalid checksum at record %u\n",
  635. rec_num);
  636. break;
  637. }
  638. chksm = 0;
  639. for (i = 0; i < sizeof(rec_hdr); i++)
  640. chksm += rec_hdr[i];
  641. for (i = 0; i < rec_len; i++)
  642. chksm += rec_data[i];
  643. chksm = ~chksm + 1;
  644. if (chksm != rec_chksm && rec_addr < IQS5XX_CSTM) {
  645. dev_err(&client->dev,
  646. "Incorrect checksum at record %u\n",
  647. rec_num);
  648. error = -EINVAL;
  649. break;
  650. }
  651. switch (rec_type) {
  652. case IQS5XX_REC_TYPE_DATA:
  653. if (rec_addr < IQS5XX_CHKSM ||
  654. rec_addr > IQS5XX_PMAP_END) {
  655. dev_err(&client->dev,
  656. "Invalid address at record %u\n",
  657. rec_num);
  658. error = -EINVAL;
  659. } else {
  660. memcpy(pmap + rec_addr - IQS5XX_CHKSM,
  661. rec_data, rec_len);
  662. }
  663. break;
  664. case IQS5XX_REC_TYPE_EOF:
  665. break;
  666. default:
  667. dev_err(&client->dev, "Invalid type at record %u\n",
  668. rec_num);
  669. error = -EINVAL;
  670. }
  671. if (error)
  672. break;
  673. rec_num++;
  674. while (pos < fw->size) {
  675. if (*(fw->data + pos) == ':')
  676. break;
  677. pos++;
  678. }
  679. } while (rec_type != IQS5XX_REC_TYPE_EOF);
  680. release_firmware(fw);
  681. return error;
  682. }
  683. static int iqs5xx_fw_file_write(struct i2c_client *client, const char *fw_file)
  684. {
  685. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  686. int error, error_init = 0;
  687. u8 *pmap;
  688. pmap = kzalloc(IQS5XX_PMAP_LEN, GFP_KERNEL);
  689. if (!pmap)
  690. return -ENOMEM;
  691. error = iqs5xx_fw_file_parse(client, fw_file, pmap);
  692. if (error)
  693. goto err_kfree;
  694. mutex_lock(&iqs5xx->lock);
  695. /*
  696. * Disable the interrupt line in case the first attempt(s) to enter the
  697. * bootloader don't happen quickly enough, in which case the device may
  698. * assert the RDY output until the next attempt.
  699. */
  700. disable_irq(client->irq);
  701. iqs5xx->dev_id_info.bl_status = 0;
  702. error = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_VER, 0);
  703. if (error) {
  704. error = iqs5xx_bl_open(client);
  705. if (error)
  706. goto err_reset;
  707. }
  708. error = iqs5xx_bl_write(client, IQS5XX_CHKSM, pmap, IQS5XX_PMAP_LEN);
  709. if (error)
  710. goto err_reset;
  711. error = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_CRC, 0);
  712. if (error)
  713. goto err_reset;
  714. error = iqs5xx_bl_verify(client, IQS5XX_CSTM,
  715. pmap + IQS5XX_CHKSM_LEN + IQS5XX_APP_LEN,
  716. IQS5XX_CSTM_LEN);
  717. err_reset:
  718. iqs5xx_reset(client);
  719. usleep_range(15000, 15100);
  720. error_init = iqs5xx_dev_init(client);
  721. if (!iqs5xx->dev_id_info.bl_status)
  722. error_init = error_init ? : -EINVAL;
  723. enable_irq(client->irq);
  724. mutex_unlock(&iqs5xx->lock);
  725. err_kfree:
  726. kfree(pmap);
  727. return error ? : error_init;
  728. }
  729. static ssize_t fw_file_store(struct device *dev,
  730. struct device_attribute *attr, const char *buf,
  731. size_t count)
  732. {
  733. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  734. struct i2c_client *client = iqs5xx->client;
  735. size_t len = count;
  736. bool input_reg = !iqs5xx->input;
  737. char fw_file[IQS5XX_FW_FILE_LEN + 1];
  738. int error;
  739. if (!len)
  740. return -EINVAL;
  741. if (buf[len - 1] == '\n')
  742. len--;
  743. if (len > IQS5XX_FW_FILE_LEN)
  744. return -ENAMETOOLONG;
  745. memcpy(fw_file, buf, len);
  746. fw_file[len] = '\0';
  747. error = iqs5xx_fw_file_write(client, fw_file);
  748. if (error)
  749. return error;
  750. /*
  751. * If the input device was not allocated already, it is guaranteed to
  752. * be allocated by this point and can finally be registered.
  753. */
  754. if (input_reg) {
  755. error = input_register_device(iqs5xx->input);
  756. if (error) {
  757. dev_err(&client->dev,
  758. "Failed to register device: %d\n",
  759. error);
  760. return error;
  761. }
  762. }
  763. return count;
  764. }
  765. static ssize_t fw_info_show(struct device *dev,
  766. struct device_attribute *attr, char *buf)
  767. {
  768. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  769. if (!iqs5xx->dev_id_info.bl_status)
  770. return -ENODATA;
  771. return sysfs_emit(buf, "%u.%u.%u.%u:%u.%u\n",
  772. be16_to_cpu(iqs5xx->dev_id_info.prod_num),
  773. be16_to_cpu(iqs5xx->dev_id_info.proj_num),
  774. iqs5xx->dev_id_info.major_ver,
  775. iqs5xx->dev_id_info.minor_ver,
  776. iqs5xx->exp_file[0], iqs5xx->exp_file[1]);
  777. }
  778. static DEVICE_ATTR_WO(fw_file);
  779. static DEVICE_ATTR_RO(fw_info);
  780. static struct attribute *iqs5xx_attrs[] = {
  781. &dev_attr_fw_file.attr,
  782. &dev_attr_fw_info.attr,
  783. NULL,
  784. };
  785. static umode_t iqs5xx_attr_is_visible(struct kobject *kobj,
  786. struct attribute *attr, int i)
  787. {
  788. struct device *dev = kobj_to_dev(kobj);
  789. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  790. if (attr == &dev_attr_fw_file.attr &&
  791. (iqs5xx->dev_id_info.bl_status == IQS5XX_BL_STATUS_NONE ||
  792. !iqs5xx->reset_gpio))
  793. return 0;
  794. return attr->mode;
  795. }
  796. static const struct attribute_group iqs5xx_group = {
  797. .is_visible = iqs5xx_attr_is_visible,
  798. .attrs = iqs5xx_attrs,
  799. };
  800. __ATTRIBUTE_GROUPS(iqs5xx);
  801. static int iqs5xx_suspend(struct device *dev)
  802. {
  803. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  804. struct input_dev *input = iqs5xx->input;
  805. int error = 0;
  806. if (!input || device_may_wakeup(dev))
  807. return error;
  808. mutex_lock(&input->mutex);
  809. if (input_device_enabled(input))
  810. error = iqs5xx_set_state(iqs5xx->client, IQS5XX_SUSPEND);
  811. mutex_unlock(&input->mutex);
  812. return error;
  813. }
  814. static int iqs5xx_resume(struct device *dev)
  815. {
  816. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  817. struct input_dev *input = iqs5xx->input;
  818. int error = 0;
  819. if (!input || device_may_wakeup(dev))
  820. return error;
  821. mutex_lock(&input->mutex);
  822. if (input_device_enabled(input))
  823. error = iqs5xx_set_state(iqs5xx->client, IQS5XX_RESUME);
  824. mutex_unlock(&input->mutex);
  825. return error;
  826. }
  827. static DEFINE_SIMPLE_DEV_PM_OPS(iqs5xx_pm, iqs5xx_suspend, iqs5xx_resume);
  828. static int iqs5xx_probe(struct i2c_client *client)
  829. {
  830. struct iqs5xx_private *iqs5xx;
  831. int error;
  832. iqs5xx = devm_kzalloc(&client->dev, sizeof(*iqs5xx), GFP_KERNEL);
  833. if (!iqs5xx)
  834. return -ENOMEM;
  835. i2c_set_clientdata(client, iqs5xx);
  836. iqs5xx->client = client;
  837. iqs5xx->reset_gpio = devm_gpiod_get_optional(&client->dev,
  838. "reset", GPIOD_OUT_LOW);
  839. if (IS_ERR(iqs5xx->reset_gpio)) {
  840. error = PTR_ERR(iqs5xx->reset_gpio);
  841. dev_err(&client->dev, "Failed to request GPIO: %d\n", error);
  842. return error;
  843. }
  844. mutex_init(&iqs5xx->lock);
  845. error = iqs5xx_dev_init(client);
  846. if (error)
  847. return error;
  848. error = devm_request_threaded_irq(&client->dev, client->irq,
  849. NULL, iqs5xx_irq, IRQF_ONESHOT,
  850. client->name, iqs5xx);
  851. if (error) {
  852. dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
  853. return error;
  854. }
  855. if (iqs5xx->input) {
  856. error = input_register_device(iqs5xx->input);
  857. if (error)
  858. dev_err(&client->dev,
  859. "Failed to register device: %d\n",
  860. error);
  861. }
  862. return error;
  863. }
  864. static const struct i2c_device_id iqs5xx_id[] = {
  865. { "iqs550", 0 },
  866. { "iqs572", 1 },
  867. { "iqs525", 2 },
  868. { }
  869. };
  870. MODULE_DEVICE_TABLE(i2c, iqs5xx_id);
  871. static const struct of_device_id iqs5xx_of_match[] = {
  872. { .compatible = "azoteq,iqs550" },
  873. { .compatible = "azoteq,iqs572" },
  874. { .compatible = "azoteq,iqs525" },
  875. { }
  876. };
  877. MODULE_DEVICE_TABLE(of, iqs5xx_of_match);
  878. static struct i2c_driver iqs5xx_i2c_driver = {
  879. .driver = {
  880. .name = "iqs5xx",
  881. .dev_groups = iqs5xx_groups,
  882. .of_match_table = iqs5xx_of_match,
  883. .pm = pm_sleep_ptr(&iqs5xx_pm),
  884. },
  885. .id_table = iqs5xx_id,
  886. .probe = iqs5xx_probe,
  887. };
  888. module_i2c_driver(iqs5xx_i2c_driver);
  889. MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
  890. MODULE_DESCRIPTION("Azoteq IQS550/572/525 Trackpad/Touchscreen Controller");
  891. MODULE_LICENSE("GPL");