at86rf230.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AT86RF230/RF231 driver
  4. *
  5. * Copyright (C) 2009-2012 Siemens AG
  6. *
  7. * Written by:
  8. * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  9. * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  10. * Alexander Aring <aar@pengutronix.de>
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/gpio/consumer.h>
  15. #include <linux/hrtimer.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/irq.h>
  19. #include <linux/delay.h>
  20. #include <linux/property.h>
  21. #include <linux/spi/spi.h>
  22. #include <linux/regmap.h>
  23. #include <linux/skbuff.h>
  24. #include <linux/ieee802154.h>
  25. #include <net/mac802154.h>
  26. #include <net/cfg802154.h>
  27. #include "at86rf230.h"
  28. struct at86rf230_local;
  29. /* at86rf2xx chip depend data.
  30. * All timings are in us.
  31. */
  32. struct at86rf2xx_chip_data {
  33. u16 t_sleep_cycle;
  34. u16 t_channel_switch;
  35. u16 t_reset_to_off;
  36. u16 t_off_to_aack;
  37. u16 t_off_to_tx_on;
  38. u16 t_off_to_sleep;
  39. u16 t_sleep_to_off;
  40. u16 t_frame;
  41. u16 t_p_ack;
  42. int rssi_base_val;
  43. int (*set_channel)(struct at86rf230_local *, u8, u8);
  44. int (*set_txpower)(struct at86rf230_local *, s32);
  45. };
  46. #define AT86RF2XX_MAX_BUF (127 + 3)
  47. /* tx retries to access the TX_ON state
  48. * if it's above then force change will be started.
  49. *
  50. * We assume the max_frame_retries (7) value of 802.15.4 here.
  51. */
  52. #define AT86RF2XX_MAX_TX_RETRIES 7
  53. /* We use the recommended 5 minutes timeout to recalibrate */
  54. #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
  55. struct at86rf230_state_change {
  56. struct at86rf230_local *lp;
  57. int irq;
  58. struct hrtimer timer;
  59. struct spi_message msg;
  60. struct spi_transfer trx;
  61. u8 buf[AT86RF2XX_MAX_BUF];
  62. void (*complete)(void *context);
  63. u8 from_state;
  64. u8 to_state;
  65. int trac;
  66. bool free;
  67. };
  68. struct at86rf230_local {
  69. struct spi_device *spi;
  70. struct ieee802154_hw *hw;
  71. struct at86rf2xx_chip_data *data;
  72. struct regmap *regmap;
  73. struct gpio_desc *slp_tr;
  74. bool sleep;
  75. struct completion state_complete;
  76. struct at86rf230_state_change state;
  77. unsigned long cal_timeout;
  78. bool is_tx;
  79. bool is_tx_from_off;
  80. bool was_tx;
  81. u8 tx_retry;
  82. struct sk_buff *tx_skb;
  83. struct at86rf230_state_change tx;
  84. };
  85. #define AT86RF2XX_NUMREGS 0x3F
  86. static void
  87. at86rf230_async_state_change(struct at86rf230_local *lp,
  88. struct at86rf230_state_change *ctx,
  89. const u8 state, void (*complete)(void *context));
  90. static inline void
  91. at86rf230_sleep(struct at86rf230_local *lp)
  92. {
  93. if (lp->slp_tr) {
  94. gpiod_set_value(lp->slp_tr, 1);
  95. usleep_range(lp->data->t_off_to_sleep,
  96. lp->data->t_off_to_sleep + 10);
  97. lp->sleep = true;
  98. }
  99. }
  100. static inline void
  101. at86rf230_awake(struct at86rf230_local *lp)
  102. {
  103. if (lp->slp_tr) {
  104. gpiod_set_value(lp->slp_tr, 0);
  105. usleep_range(lp->data->t_sleep_to_off,
  106. lp->data->t_sleep_to_off + 100);
  107. lp->sleep = false;
  108. }
  109. }
  110. static inline int
  111. __at86rf230_write(struct at86rf230_local *lp,
  112. unsigned int addr, unsigned int data)
  113. {
  114. bool sleep = lp->sleep;
  115. int ret;
  116. /* awake for register setting if sleep */
  117. if (sleep)
  118. at86rf230_awake(lp);
  119. ret = regmap_write(lp->regmap, addr, data);
  120. /* sleep again if was sleeping */
  121. if (sleep)
  122. at86rf230_sleep(lp);
  123. return ret;
  124. }
  125. static inline int
  126. __at86rf230_read(struct at86rf230_local *lp,
  127. unsigned int addr, unsigned int *data)
  128. {
  129. bool sleep = lp->sleep;
  130. int ret;
  131. /* awake for register setting if sleep */
  132. if (sleep)
  133. at86rf230_awake(lp);
  134. ret = regmap_read(lp->regmap, addr, data);
  135. /* sleep again if was sleeping */
  136. if (sleep)
  137. at86rf230_sleep(lp);
  138. return ret;
  139. }
  140. static inline int
  141. at86rf230_read_subreg(struct at86rf230_local *lp,
  142. unsigned int addr, unsigned int mask,
  143. unsigned int shift, unsigned int *data)
  144. {
  145. int rc;
  146. rc = __at86rf230_read(lp, addr, data);
  147. if (!rc)
  148. *data = (*data & mask) >> shift;
  149. return rc;
  150. }
  151. static inline int
  152. at86rf230_write_subreg(struct at86rf230_local *lp,
  153. unsigned int addr, unsigned int mask,
  154. unsigned int shift, unsigned int data)
  155. {
  156. bool sleep = lp->sleep;
  157. int ret;
  158. /* awake for register setting if sleep */
  159. if (sleep)
  160. at86rf230_awake(lp);
  161. ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
  162. /* sleep again if was sleeping */
  163. if (sleep)
  164. at86rf230_sleep(lp);
  165. return ret;
  166. }
  167. static inline void
  168. at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
  169. {
  170. gpiod_set_value(lp->slp_tr, 1);
  171. udelay(1);
  172. gpiod_set_value(lp->slp_tr, 0);
  173. }
  174. static bool
  175. at86rf230_reg_writeable(struct device *dev, unsigned int reg)
  176. {
  177. switch (reg) {
  178. case RG_TRX_STATE:
  179. case RG_TRX_CTRL_0:
  180. case RG_TRX_CTRL_1:
  181. case RG_PHY_TX_PWR:
  182. case RG_PHY_ED_LEVEL:
  183. case RG_PHY_CC_CCA:
  184. case RG_CCA_THRES:
  185. case RG_RX_CTRL:
  186. case RG_SFD_VALUE:
  187. case RG_TRX_CTRL_2:
  188. case RG_ANT_DIV:
  189. case RG_IRQ_MASK:
  190. case RG_VREG_CTRL:
  191. case RG_BATMON:
  192. case RG_XOSC_CTRL:
  193. case RG_RX_SYN:
  194. case RG_XAH_CTRL_1:
  195. case RG_FTN_CTRL:
  196. case RG_PLL_CF:
  197. case RG_PLL_DCU:
  198. case RG_SHORT_ADDR_0:
  199. case RG_SHORT_ADDR_1:
  200. case RG_PAN_ID_0:
  201. case RG_PAN_ID_1:
  202. case RG_IEEE_ADDR_0:
  203. case RG_IEEE_ADDR_1:
  204. case RG_IEEE_ADDR_2:
  205. case RG_IEEE_ADDR_3:
  206. case RG_IEEE_ADDR_4:
  207. case RG_IEEE_ADDR_5:
  208. case RG_IEEE_ADDR_6:
  209. case RG_IEEE_ADDR_7:
  210. case RG_XAH_CTRL_0:
  211. case RG_CSMA_SEED_0:
  212. case RG_CSMA_SEED_1:
  213. case RG_CSMA_BE:
  214. return true;
  215. default:
  216. return false;
  217. }
  218. }
  219. static bool
  220. at86rf230_reg_readable(struct device *dev, unsigned int reg)
  221. {
  222. bool rc;
  223. /* all writeable are also readable */
  224. rc = at86rf230_reg_writeable(dev, reg);
  225. if (rc)
  226. return rc;
  227. /* readonly regs */
  228. switch (reg) {
  229. case RG_TRX_STATUS:
  230. case RG_PHY_RSSI:
  231. case RG_IRQ_STATUS:
  232. case RG_PART_NUM:
  233. case RG_VERSION_NUM:
  234. case RG_MAN_ID_1:
  235. case RG_MAN_ID_0:
  236. return true;
  237. default:
  238. return false;
  239. }
  240. }
  241. static bool
  242. at86rf230_reg_volatile(struct device *dev, unsigned int reg)
  243. {
  244. /* can be changed during runtime */
  245. switch (reg) {
  246. case RG_TRX_STATUS:
  247. case RG_TRX_STATE:
  248. case RG_PHY_RSSI:
  249. case RG_PHY_ED_LEVEL:
  250. case RG_IRQ_STATUS:
  251. case RG_VREG_CTRL:
  252. case RG_PLL_CF:
  253. case RG_PLL_DCU:
  254. return true;
  255. default:
  256. return false;
  257. }
  258. }
  259. static bool
  260. at86rf230_reg_precious(struct device *dev, unsigned int reg)
  261. {
  262. /* don't clear irq line on read */
  263. switch (reg) {
  264. case RG_IRQ_STATUS:
  265. return true;
  266. default:
  267. return false;
  268. }
  269. }
  270. static const struct regmap_config at86rf230_regmap_spi_config = {
  271. .reg_bits = 8,
  272. .val_bits = 8,
  273. .write_flag_mask = CMD_REG | CMD_WRITE,
  274. .read_flag_mask = CMD_REG,
  275. .cache_type = REGCACHE_MAPLE,
  276. .max_register = AT86RF2XX_NUMREGS,
  277. .writeable_reg = at86rf230_reg_writeable,
  278. .readable_reg = at86rf230_reg_readable,
  279. .volatile_reg = at86rf230_reg_volatile,
  280. .precious_reg = at86rf230_reg_precious,
  281. };
  282. static void
  283. at86rf230_async_error_recover_complete(void *context)
  284. {
  285. struct at86rf230_state_change *ctx = context;
  286. struct at86rf230_local *lp = ctx->lp;
  287. if (ctx->free)
  288. kfree(ctx);
  289. if (lp->was_tx) {
  290. lp->was_tx = 0;
  291. ieee802154_xmit_hw_error(lp->hw, lp->tx_skb);
  292. }
  293. }
  294. static void
  295. at86rf230_async_error_recover(void *context)
  296. {
  297. struct at86rf230_state_change *ctx = context;
  298. struct at86rf230_local *lp = ctx->lp;
  299. if (lp->is_tx) {
  300. lp->was_tx = 1;
  301. lp->is_tx = 0;
  302. }
  303. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  304. at86rf230_async_error_recover_complete);
  305. }
  306. static inline void
  307. at86rf230_async_error(struct at86rf230_local *lp,
  308. struct at86rf230_state_change *ctx, int rc)
  309. {
  310. dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
  311. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  312. at86rf230_async_error_recover);
  313. }
  314. /* Generic function to get some register value in async mode */
  315. static void
  316. at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
  317. struct at86rf230_state_change *ctx,
  318. void (*complete)(void *context))
  319. {
  320. int rc;
  321. u8 *tx_buf = ctx->buf;
  322. tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
  323. ctx->msg.complete = complete;
  324. rc = spi_async(lp->spi, &ctx->msg);
  325. if (rc)
  326. at86rf230_async_error(lp, ctx, rc);
  327. }
  328. static void
  329. at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
  330. struct at86rf230_state_change *ctx,
  331. void (*complete)(void *context))
  332. {
  333. int rc;
  334. ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  335. ctx->buf[1] = val;
  336. ctx->msg.complete = complete;
  337. rc = spi_async(lp->spi, &ctx->msg);
  338. if (rc)
  339. at86rf230_async_error(lp, ctx, rc);
  340. }
  341. static void
  342. at86rf230_async_state_assert(void *context)
  343. {
  344. struct at86rf230_state_change *ctx = context;
  345. struct at86rf230_local *lp = ctx->lp;
  346. const u8 *buf = ctx->buf;
  347. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  348. /* Assert state change */
  349. if (trx_state != ctx->to_state) {
  350. /* Special handling if transceiver state is in
  351. * STATE_BUSY_RX_AACK and a SHR was detected.
  352. */
  353. if (trx_state == STATE_BUSY_RX_AACK) {
  354. /* Undocumented race condition. If we send a state
  355. * change to STATE_RX_AACK_ON the transceiver could
  356. * change his state automatically to STATE_BUSY_RX_AACK
  357. * if a SHR was detected. This is not an error, but we
  358. * can't assert this.
  359. */
  360. if (ctx->to_state == STATE_RX_AACK_ON)
  361. goto done;
  362. /* If we change to STATE_TX_ON without forcing and
  363. * transceiver state is STATE_BUSY_RX_AACK, we wait
  364. * 'tFrame + tPAck' receiving time. In this time the
  365. * PDU should be received. If the transceiver is still
  366. * in STATE_BUSY_RX_AACK, we run a force state change
  367. * to STATE_TX_ON. This is a timeout handling, if the
  368. * transceiver stucks in STATE_BUSY_RX_AACK.
  369. *
  370. * Additional we do several retries to try to get into
  371. * TX_ON state without forcing. If the retries are
  372. * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
  373. * will do a force change.
  374. */
  375. if (ctx->to_state == STATE_TX_ON ||
  376. ctx->to_state == STATE_TRX_OFF) {
  377. u8 state = ctx->to_state;
  378. if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
  379. state = STATE_FORCE_TRX_OFF;
  380. lp->tx_retry++;
  381. at86rf230_async_state_change(lp, ctx, state,
  382. ctx->complete);
  383. return;
  384. }
  385. }
  386. dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
  387. ctx->from_state, ctx->to_state, trx_state);
  388. }
  389. done:
  390. if (ctx->complete)
  391. ctx->complete(context);
  392. }
  393. static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
  394. {
  395. struct at86rf230_state_change *ctx =
  396. container_of(timer, struct at86rf230_state_change, timer);
  397. struct at86rf230_local *lp = ctx->lp;
  398. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  399. at86rf230_async_state_assert);
  400. return HRTIMER_NORESTART;
  401. }
  402. /* Do state change timing delay. */
  403. static void
  404. at86rf230_async_state_delay(void *context)
  405. {
  406. struct at86rf230_state_change *ctx = context;
  407. struct at86rf230_local *lp = ctx->lp;
  408. struct at86rf2xx_chip_data *c = lp->data;
  409. bool force = false;
  410. ktime_t tim;
  411. /* The force state changes are will show as normal states in the
  412. * state status subregister. We change the to_state to the
  413. * corresponding one and remember if it was a force change, this
  414. * differs if we do a state change from STATE_BUSY_RX_AACK.
  415. */
  416. switch (ctx->to_state) {
  417. case STATE_FORCE_TX_ON:
  418. ctx->to_state = STATE_TX_ON;
  419. force = true;
  420. break;
  421. case STATE_FORCE_TRX_OFF:
  422. ctx->to_state = STATE_TRX_OFF;
  423. force = true;
  424. break;
  425. default:
  426. break;
  427. }
  428. switch (ctx->from_state) {
  429. case STATE_TRX_OFF:
  430. switch (ctx->to_state) {
  431. case STATE_RX_AACK_ON:
  432. tim = c->t_off_to_aack * NSEC_PER_USEC;
  433. /* state change from TRX_OFF to RX_AACK_ON to do a
  434. * calibration, we need to reset the timeout for the
  435. * next one.
  436. */
  437. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  438. goto change;
  439. case STATE_TX_ARET_ON:
  440. case STATE_TX_ON:
  441. tim = c->t_off_to_tx_on * NSEC_PER_USEC;
  442. /* state change from TRX_OFF to TX_ON or ARET_ON to do
  443. * a calibration, we need to reset the timeout for the
  444. * next one.
  445. */
  446. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  447. goto change;
  448. default:
  449. break;
  450. }
  451. break;
  452. case STATE_BUSY_RX_AACK:
  453. switch (ctx->to_state) {
  454. case STATE_TRX_OFF:
  455. case STATE_TX_ON:
  456. /* Wait for worst case receiving time if we
  457. * didn't make a force change from BUSY_RX_AACK
  458. * to TX_ON or TRX_OFF.
  459. */
  460. if (!force) {
  461. tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
  462. goto change;
  463. }
  464. break;
  465. default:
  466. break;
  467. }
  468. break;
  469. /* Default value, means RESET state */
  470. case STATE_P_ON:
  471. switch (ctx->to_state) {
  472. case STATE_TRX_OFF:
  473. tim = c->t_reset_to_off * NSEC_PER_USEC;
  474. goto change;
  475. default:
  476. break;
  477. }
  478. break;
  479. default:
  480. break;
  481. }
  482. /* Default delay is 1us in the most cases */
  483. udelay(1);
  484. at86rf230_async_state_timer(&ctx->timer);
  485. return;
  486. change:
  487. hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
  488. }
  489. static void
  490. at86rf230_async_state_change_start(void *context)
  491. {
  492. struct at86rf230_state_change *ctx = context;
  493. struct at86rf230_local *lp = ctx->lp;
  494. u8 *buf = ctx->buf;
  495. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  496. /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
  497. if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
  498. udelay(1);
  499. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  500. at86rf230_async_state_change_start);
  501. return;
  502. }
  503. /* Check if we already are in the state which we change in */
  504. if (trx_state == ctx->to_state) {
  505. if (ctx->complete)
  506. ctx->complete(context);
  507. return;
  508. }
  509. /* Set current state to the context of state change */
  510. ctx->from_state = trx_state;
  511. /* Going into the next step for a state change which do a timing
  512. * relevant delay.
  513. */
  514. at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
  515. at86rf230_async_state_delay);
  516. }
  517. static void
  518. at86rf230_async_state_change(struct at86rf230_local *lp,
  519. struct at86rf230_state_change *ctx,
  520. const u8 state, void (*complete)(void *context))
  521. {
  522. /* Initialization for the state change context */
  523. ctx->to_state = state;
  524. ctx->complete = complete;
  525. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  526. at86rf230_async_state_change_start);
  527. }
  528. static void
  529. at86rf230_sync_state_change_complete(void *context)
  530. {
  531. struct at86rf230_state_change *ctx = context;
  532. struct at86rf230_local *lp = ctx->lp;
  533. complete(&lp->state_complete);
  534. }
  535. /* This function do a sync framework above the async state change.
  536. * Some callbacks of the IEEE 802.15.4 driver interface need to be
  537. * handled synchronously.
  538. */
  539. static int
  540. at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
  541. {
  542. unsigned long rc;
  543. at86rf230_async_state_change(lp, &lp->state, state,
  544. at86rf230_sync_state_change_complete);
  545. rc = wait_for_completion_timeout(&lp->state_complete,
  546. msecs_to_jiffies(100));
  547. if (!rc) {
  548. at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
  549. return -ETIMEDOUT;
  550. }
  551. return 0;
  552. }
  553. static void
  554. at86rf230_tx_complete(void *context)
  555. {
  556. struct at86rf230_state_change *ctx = context;
  557. struct at86rf230_local *lp = ctx->lp;
  558. if (ctx->trac == IEEE802154_SUCCESS)
  559. ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
  560. else
  561. ieee802154_xmit_error(lp->hw, lp->tx_skb, ctx->trac);
  562. kfree(ctx);
  563. }
  564. static void
  565. at86rf230_tx_on(void *context)
  566. {
  567. struct at86rf230_state_change *ctx = context;
  568. struct at86rf230_local *lp = ctx->lp;
  569. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  570. at86rf230_tx_complete);
  571. }
  572. static void
  573. at86rf230_tx_trac_check(void *context)
  574. {
  575. struct at86rf230_state_change *ctx = context;
  576. struct at86rf230_local *lp = ctx->lp;
  577. u8 trac = TRAC_MASK(ctx->buf[1]);
  578. switch (trac) {
  579. case TRAC_SUCCESS:
  580. case TRAC_SUCCESS_DATA_PENDING:
  581. ctx->trac = IEEE802154_SUCCESS;
  582. break;
  583. case TRAC_CHANNEL_ACCESS_FAILURE:
  584. ctx->trac = IEEE802154_CHANNEL_ACCESS_FAILURE;
  585. break;
  586. case TRAC_NO_ACK:
  587. ctx->trac = IEEE802154_NO_ACK;
  588. break;
  589. default:
  590. ctx->trac = IEEE802154_SYSTEM_ERROR;
  591. }
  592. at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
  593. }
  594. static void
  595. at86rf230_rx_read_frame_complete(void *context)
  596. {
  597. struct at86rf230_state_change *ctx = context;
  598. struct at86rf230_local *lp = ctx->lp;
  599. const u8 *buf = ctx->buf;
  600. struct sk_buff *skb;
  601. u8 len, lqi;
  602. len = buf[1];
  603. if (!ieee802154_is_valid_psdu_len(len)) {
  604. dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
  605. len = IEEE802154_MTU;
  606. }
  607. lqi = buf[2 + len];
  608. skb = dev_alloc_skb(IEEE802154_MTU);
  609. if (!skb) {
  610. dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
  611. kfree(ctx);
  612. return;
  613. }
  614. skb_put_data(skb, buf + 2, len);
  615. ieee802154_rx_irqsafe(lp->hw, skb, lqi);
  616. kfree(ctx);
  617. }
  618. static void
  619. at86rf230_rx_trac_check(void *context)
  620. {
  621. struct at86rf230_state_change *ctx = context;
  622. struct at86rf230_local *lp = ctx->lp;
  623. u8 *buf = ctx->buf;
  624. int rc;
  625. buf[0] = CMD_FB;
  626. ctx->trx.len = AT86RF2XX_MAX_BUF;
  627. ctx->msg.complete = at86rf230_rx_read_frame_complete;
  628. rc = spi_async(lp->spi, &ctx->msg);
  629. if (rc) {
  630. ctx->trx.len = 2;
  631. at86rf230_async_error(lp, ctx, rc);
  632. }
  633. }
  634. static void
  635. at86rf230_irq_trx_end(void *context)
  636. {
  637. struct at86rf230_state_change *ctx = context;
  638. struct at86rf230_local *lp = ctx->lp;
  639. if (lp->is_tx) {
  640. lp->is_tx = 0;
  641. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  642. at86rf230_tx_trac_check);
  643. } else {
  644. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  645. at86rf230_rx_trac_check);
  646. }
  647. }
  648. static void
  649. at86rf230_irq_status(void *context)
  650. {
  651. struct at86rf230_state_change *ctx = context;
  652. struct at86rf230_local *lp = ctx->lp;
  653. const u8 *buf = ctx->buf;
  654. u8 irq = buf[1];
  655. enable_irq(lp->spi->irq);
  656. if (irq & IRQ_TRX_END) {
  657. at86rf230_irq_trx_end(ctx);
  658. } else {
  659. dev_err(&lp->spi->dev, "not supported irq %02x received\n",
  660. irq);
  661. kfree(ctx);
  662. }
  663. }
  664. static void
  665. at86rf230_setup_spi_messages(struct at86rf230_local *lp,
  666. struct at86rf230_state_change *state)
  667. {
  668. state->lp = lp;
  669. state->irq = lp->spi->irq;
  670. spi_message_init(&state->msg);
  671. state->msg.context = state;
  672. state->trx.len = 2;
  673. state->trx.tx_buf = state->buf;
  674. state->trx.rx_buf = state->buf;
  675. spi_message_add_tail(&state->trx, &state->msg);
  676. hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  677. state->timer.function = at86rf230_async_state_timer;
  678. }
  679. static irqreturn_t at86rf230_isr(int irq, void *data)
  680. {
  681. struct at86rf230_local *lp = data;
  682. struct at86rf230_state_change *ctx;
  683. int rc;
  684. disable_irq_nosync(irq);
  685. ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
  686. if (!ctx) {
  687. enable_irq(irq);
  688. return IRQ_NONE;
  689. }
  690. at86rf230_setup_spi_messages(lp, ctx);
  691. /* tell on error handling to free ctx */
  692. ctx->free = true;
  693. ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
  694. ctx->msg.complete = at86rf230_irq_status;
  695. rc = spi_async(lp->spi, &ctx->msg);
  696. if (rc) {
  697. at86rf230_async_error(lp, ctx, rc);
  698. enable_irq(irq);
  699. return IRQ_NONE;
  700. }
  701. return IRQ_HANDLED;
  702. }
  703. static void
  704. at86rf230_write_frame_complete(void *context)
  705. {
  706. struct at86rf230_state_change *ctx = context;
  707. struct at86rf230_local *lp = ctx->lp;
  708. ctx->trx.len = 2;
  709. if (lp->slp_tr)
  710. at86rf230_slp_tr_rising_edge(lp);
  711. else
  712. at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
  713. NULL);
  714. }
  715. static void
  716. at86rf230_write_frame(void *context)
  717. {
  718. struct at86rf230_state_change *ctx = context;
  719. struct at86rf230_local *lp = ctx->lp;
  720. struct sk_buff *skb = lp->tx_skb;
  721. u8 *buf = ctx->buf;
  722. int rc;
  723. lp->is_tx = 1;
  724. buf[0] = CMD_FB | CMD_WRITE;
  725. buf[1] = skb->len + 2;
  726. memcpy(buf + 2, skb->data, skb->len);
  727. ctx->trx.len = skb->len + 2;
  728. ctx->msg.complete = at86rf230_write_frame_complete;
  729. rc = spi_async(lp->spi, &ctx->msg);
  730. if (rc) {
  731. ctx->trx.len = 2;
  732. at86rf230_async_error(lp, ctx, rc);
  733. }
  734. }
  735. static void
  736. at86rf230_xmit_tx_on(void *context)
  737. {
  738. struct at86rf230_state_change *ctx = context;
  739. struct at86rf230_local *lp = ctx->lp;
  740. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  741. at86rf230_write_frame);
  742. }
  743. static void
  744. at86rf230_xmit_start(void *context)
  745. {
  746. struct at86rf230_state_change *ctx = context;
  747. struct at86rf230_local *lp = ctx->lp;
  748. /* check if we change from off state */
  749. if (lp->is_tx_from_off)
  750. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  751. at86rf230_write_frame);
  752. else
  753. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  754. at86rf230_xmit_tx_on);
  755. }
  756. static int
  757. at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
  758. {
  759. struct at86rf230_local *lp = hw->priv;
  760. struct at86rf230_state_change *ctx = &lp->tx;
  761. lp->tx_skb = skb;
  762. lp->tx_retry = 0;
  763. /* After 5 minutes in PLL and the same frequency we run again the
  764. * calibration loops which is recommended by at86rf2xx datasheets.
  765. *
  766. * The calibration is initiate by a state change from TRX_OFF
  767. * to TX_ON, the lp->cal_timeout should be reinit by state_delay
  768. * function then to start in the next 5 minutes.
  769. */
  770. if (time_is_before_jiffies(lp->cal_timeout)) {
  771. lp->is_tx_from_off = true;
  772. at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
  773. at86rf230_xmit_start);
  774. } else {
  775. lp->is_tx_from_off = false;
  776. at86rf230_xmit_start(ctx);
  777. }
  778. return 0;
  779. }
  780. static int
  781. at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
  782. {
  783. WARN_ON(!level);
  784. *level = 0xbe;
  785. return 0;
  786. }
  787. static int
  788. at86rf230_start(struct ieee802154_hw *hw)
  789. {
  790. struct at86rf230_local *lp = hw->priv;
  791. at86rf230_awake(lp);
  792. enable_irq(lp->spi->irq);
  793. return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
  794. }
  795. static void
  796. at86rf230_stop(struct ieee802154_hw *hw)
  797. {
  798. struct at86rf230_local *lp = hw->priv;
  799. u8 csma_seed[2];
  800. at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  801. disable_irq(lp->spi->irq);
  802. /* It's recommended to set random new csma_seeds before sleep state.
  803. * Makes only sense in the stop callback, not doing this inside of
  804. * at86rf230_sleep, this is also used when we don't transmit afterwards
  805. * when calling start callback again.
  806. */
  807. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  808. at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  809. at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  810. at86rf230_sleep(lp);
  811. }
  812. static int
  813. at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  814. {
  815. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  816. }
  817. #define AT86RF2XX_MAX_ED_LEVELS 0xF
  818. static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  819. -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
  820. -7400, -7200, -7000, -6800, -6600, -6400,
  821. };
  822. static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  823. -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
  824. -7100, -6900, -6700, -6500, -6300, -6100,
  825. };
  826. static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  827. -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
  828. -8000, -7800, -7600, -7400, -7200, -7000,
  829. };
  830. static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  831. -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
  832. -7800, -7600, -7400, -7200, -7000, -6800,
  833. };
  834. static inline int
  835. at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
  836. {
  837. unsigned int cca_ed_thres;
  838. int rc;
  839. rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
  840. if (rc < 0)
  841. return rc;
  842. switch (rssi_base_val) {
  843. case -98:
  844. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
  845. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
  846. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
  847. break;
  848. case -100:
  849. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  850. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  851. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
  852. break;
  853. default:
  854. WARN_ON(1);
  855. }
  856. return 0;
  857. }
  858. static int
  859. at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  860. {
  861. int rc;
  862. if (channel == 0)
  863. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
  864. else
  865. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
  866. if (rc < 0)
  867. return rc;
  868. if (page == 0) {
  869. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
  870. lp->data->rssi_base_val = -100;
  871. } else {
  872. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
  873. lp->data->rssi_base_val = -98;
  874. }
  875. if (rc < 0)
  876. return rc;
  877. rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
  878. if (rc < 0)
  879. return rc;
  880. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  881. }
  882. static int
  883. at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
  884. {
  885. struct at86rf230_local *lp = hw->priv;
  886. int rc;
  887. rc = lp->data->set_channel(lp, page, channel);
  888. /* Wait for PLL */
  889. usleep_range(lp->data->t_channel_switch,
  890. lp->data->t_channel_switch + 10);
  891. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  892. return rc;
  893. }
  894. static int
  895. at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
  896. struct ieee802154_hw_addr_filt *filt,
  897. unsigned long changed)
  898. {
  899. struct at86rf230_local *lp = hw->priv;
  900. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  901. u16 addr = le16_to_cpu(filt->short_addr);
  902. dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
  903. __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
  904. __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
  905. }
  906. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  907. u16 pan = le16_to_cpu(filt->pan_id);
  908. dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
  909. __at86rf230_write(lp, RG_PAN_ID_0, pan);
  910. __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
  911. }
  912. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  913. u8 i, addr[8];
  914. memcpy(addr, &filt->ieee_addr, 8);
  915. dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
  916. for (i = 0; i < 8; i++)
  917. __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
  918. }
  919. if (changed & IEEE802154_AFILT_PANC_CHANGED) {
  920. dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
  921. if (filt->pan_coord)
  922. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
  923. else
  924. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
  925. }
  926. return 0;
  927. }
  928. #define AT86RF23X_MAX_TX_POWERS 0xF
  929. static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  930. 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
  931. -800, -1200, -1700,
  932. };
  933. static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  934. 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
  935. -900, -1200, -1700,
  936. };
  937. #define AT86RF212_MAX_TX_POWERS 0x1F
  938. static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
  939. 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
  940. -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
  941. -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
  942. };
  943. static int
  944. at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
  945. {
  946. u32 i;
  947. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  948. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  949. return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
  950. }
  951. return -EINVAL;
  952. }
  953. static int
  954. at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
  955. {
  956. u32 i;
  957. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  958. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  959. return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
  960. }
  961. return -EINVAL;
  962. }
  963. static int
  964. at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
  965. {
  966. struct at86rf230_local *lp = hw->priv;
  967. return lp->data->set_txpower(lp, mbm);
  968. }
  969. static int
  970. at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
  971. {
  972. struct at86rf230_local *lp = hw->priv;
  973. return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
  974. }
  975. static int
  976. at86rf230_set_cca_mode(struct ieee802154_hw *hw,
  977. const struct wpan_phy_cca *cca)
  978. {
  979. struct at86rf230_local *lp = hw->priv;
  980. u8 val;
  981. /* mapping 802.15.4 to driver spec */
  982. switch (cca->mode) {
  983. case NL802154_CCA_ENERGY:
  984. val = 1;
  985. break;
  986. case NL802154_CCA_CARRIER:
  987. val = 2;
  988. break;
  989. case NL802154_CCA_ENERGY_CARRIER:
  990. switch (cca->opt) {
  991. case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
  992. val = 3;
  993. break;
  994. case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
  995. val = 0;
  996. break;
  997. default:
  998. return -EINVAL;
  999. }
  1000. break;
  1001. default:
  1002. return -EINVAL;
  1003. }
  1004. return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
  1005. }
  1006. static int
  1007. at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
  1008. {
  1009. struct at86rf230_local *lp = hw->priv;
  1010. u32 i;
  1011. for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
  1012. if (hw->phy->supported.cca_ed_levels[i] == mbm)
  1013. return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
  1014. }
  1015. return -EINVAL;
  1016. }
  1017. static int
  1018. at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
  1019. u8 retries)
  1020. {
  1021. struct at86rf230_local *lp = hw->priv;
  1022. int rc;
  1023. rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
  1024. if (rc)
  1025. return rc;
  1026. rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
  1027. if (rc)
  1028. return rc;
  1029. return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
  1030. }
  1031. static int
  1032. at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  1033. {
  1034. struct at86rf230_local *lp = hw->priv;
  1035. return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
  1036. }
  1037. static int
  1038. at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  1039. {
  1040. struct at86rf230_local *lp = hw->priv;
  1041. int rc;
  1042. if (on) {
  1043. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
  1044. if (rc < 0)
  1045. return rc;
  1046. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
  1047. if (rc < 0)
  1048. return rc;
  1049. } else {
  1050. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
  1051. if (rc < 0)
  1052. return rc;
  1053. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
  1054. if (rc < 0)
  1055. return rc;
  1056. }
  1057. return 0;
  1058. }
  1059. static const struct ieee802154_ops at86rf230_ops = {
  1060. .owner = THIS_MODULE,
  1061. .xmit_async = at86rf230_xmit,
  1062. .ed = at86rf230_ed,
  1063. .set_channel = at86rf230_channel,
  1064. .start = at86rf230_start,
  1065. .stop = at86rf230_stop,
  1066. .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
  1067. .set_txpower = at86rf230_set_txpower,
  1068. .set_lbt = at86rf230_set_lbt,
  1069. .set_cca_mode = at86rf230_set_cca_mode,
  1070. .set_cca_ed_level = at86rf230_set_cca_ed_level,
  1071. .set_csma_params = at86rf230_set_csma_params,
  1072. .set_frame_retries = at86rf230_set_frame_retries,
  1073. .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
  1074. };
  1075. static struct at86rf2xx_chip_data at86rf233_data = {
  1076. .t_sleep_cycle = 330,
  1077. .t_channel_switch = 11,
  1078. .t_reset_to_off = 26,
  1079. .t_off_to_aack = 80,
  1080. .t_off_to_tx_on = 80,
  1081. .t_off_to_sleep = 35,
  1082. .t_sleep_to_off = 1000,
  1083. .t_frame = 4096,
  1084. .t_p_ack = 545,
  1085. .rssi_base_val = -94,
  1086. .set_channel = at86rf23x_set_channel,
  1087. .set_txpower = at86rf23x_set_txpower,
  1088. };
  1089. static struct at86rf2xx_chip_data at86rf231_data = {
  1090. .t_sleep_cycle = 330,
  1091. .t_channel_switch = 24,
  1092. .t_reset_to_off = 37,
  1093. .t_off_to_aack = 110,
  1094. .t_off_to_tx_on = 110,
  1095. .t_off_to_sleep = 35,
  1096. .t_sleep_to_off = 1000,
  1097. .t_frame = 4096,
  1098. .t_p_ack = 545,
  1099. .rssi_base_val = -91,
  1100. .set_channel = at86rf23x_set_channel,
  1101. .set_txpower = at86rf23x_set_txpower,
  1102. };
  1103. static struct at86rf2xx_chip_data at86rf212_data = {
  1104. .t_sleep_cycle = 330,
  1105. .t_channel_switch = 11,
  1106. .t_reset_to_off = 26,
  1107. .t_off_to_aack = 200,
  1108. .t_off_to_tx_on = 200,
  1109. .t_off_to_sleep = 35,
  1110. .t_sleep_to_off = 1000,
  1111. .t_frame = 4096,
  1112. .t_p_ack = 545,
  1113. .rssi_base_val = -100,
  1114. .set_channel = at86rf212_set_channel,
  1115. .set_txpower = at86rf212_set_txpower,
  1116. };
  1117. static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
  1118. {
  1119. int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
  1120. unsigned int dvdd;
  1121. u8 csma_seed[2];
  1122. rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  1123. if (rc)
  1124. return rc;
  1125. irq_type = irq_get_trigger_type(lp->spi->irq);
  1126. if (irq_type == IRQ_TYPE_EDGE_FALLING ||
  1127. irq_type == IRQ_TYPE_LEVEL_LOW)
  1128. irq_pol = IRQ_ACTIVE_LOW;
  1129. rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
  1130. if (rc)
  1131. return rc;
  1132. rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
  1133. if (rc)
  1134. return rc;
  1135. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
  1136. if (rc)
  1137. return rc;
  1138. /* reset values differs in at86rf231 and at86rf233 */
  1139. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
  1140. if (rc)
  1141. return rc;
  1142. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  1143. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  1144. if (rc)
  1145. return rc;
  1146. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  1147. if (rc)
  1148. return rc;
  1149. /* CLKM changes are applied immediately */
  1150. rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
  1151. if (rc)
  1152. return rc;
  1153. /* Turn CLKM Off */
  1154. rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
  1155. if (rc)
  1156. return rc;
  1157. /* Wait the next SLEEP cycle */
  1158. usleep_range(lp->data->t_sleep_cycle,
  1159. lp->data->t_sleep_cycle + 100);
  1160. /* xtal_trim value is calculated by:
  1161. * CL = 0.5 * (CX + CTRIM + CPAR)
  1162. *
  1163. * whereas:
  1164. * CL = capacitor of used crystal
  1165. * CX = connected capacitors at xtal pins
  1166. * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
  1167. * but this is different on each board setup. You need to fine
  1168. * tuning this value via CTRIM.
  1169. * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
  1170. * 0 pF upto 4.5 pF.
  1171. *
  1172. * Examples:
  1173. * atben transceiver:
  1174. *
  1175. * CL = 8 pF
  1176. * CX = 12 pF
  1177. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1178. * CTRIM = 0.9 pF
  1179. *
  1180. * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
  1181. *
  1182. * xtal_trim = 0x3
  1183. *
  1184. * openlabs transceiver:
  1185. *
  1186. * CL = 16 pF
  1187. * CX = 22 pF
  1188. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1189. * CTRIM = 4.5 pF
  1190. *
  1191. * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
  1192. *
  1193. * xtal_trim = 0xf
  1194. */
  1195. rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
  1196. if (rc)
  1197. return rc;
  1198. rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
  1199. if (rc)
  1200. return rc;
  1201. if (!dvdd) {
  1202. dev_err(&lp->spi->dev, "DVDD error\n");
  1203. return -EINVAL;
  1204. }
  1205. /* Force setting slotted operation bit to 0. Sometimes the atben
  1206. * sets this bit and I don't know why. We set this always force
  1207. * to zero while probing.
  1208. */
  1209. return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
  1210. }
  1211. static int
  1212. at86rf230_detect_device(struct at86rf230_local *lp)
  1213. {
  1214. unsigned int part, version, val;
  1215. u16 man_id = 0;
  1216. const char *chip;
  1217. int rc;
  1218. rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
  1219. if (rc)
  1220. return rc;
  1221. man_id |= val;
  1222. rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
  1223. if (rc)
  1224. return rc;
  1225. man_id |= (val << 8);
  1226. rc = __at86rf230_read(lp, RG_PART_NUM, &part);
  1227. if (rc)
  1228. return rc;
  1229. rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
  1230. if (rc)
  1231. return rc;
  1232. if (man_id != 0x001f) {
  1233. dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
  1234. man_id >> 8, man_id & 0xFF);
  1235. return -EINVAL;
  1236. }
  1237. lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
  1238. IEEE802154_HW_CSMA_PARAMS |
  1239. IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
  1240. IEEE802154_HW_PROMISCUOUS;
  1241. lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
  1242. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  1243. WPAN_PHY_FLAG_CCA_MODE;
  1244. lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
  1245. BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
  1246. lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
  1247. BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
  1248. lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
  1249. switch (part) {
  1250. case 2:
  1251. chip = "at86rf230";
  1252. rc = -ENOTSUPP;
  1253. goto not_supp;
  1254. case 3:
  1255. chip = "at86rf231";
  1256. lp->data = &at86rf231_data;
  1257. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1258. lp->hw->phy->current_channel = 11;
  1259. lp->hw->phy->supported.tx_powers = at86rf231_powers;
  1260. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
  1261. lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
  1262. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
  1263. break;
  1264. case 7:
  1265. chip = "at86rf212";
  1266. lp->data = &at86rf212_data;
  1267. lp->hw->flags |= IEEE802154_HW_LBT;
  1268. lp->hw->phy->supported.channels[0] = 0x00007FF;
  1269. lp->hw->phy->supported.channels[2] = 0x00007FF;
  1270. lp->hw->phy->current_channel = 5;
  1271. lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
  1272. lp->hw->phy->supported.tx_powers = at86rf212_powers;
  1273. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
  1274. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  1275. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  1276. break;
  1277. case 11:
  1278. chip = "at86rf233";
  1279. lp->data = &at86rf233_data;
  1280. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1281. lp->hw->phy->current_channel = 13;
  1282. lp->hw->phy->supported.tx_powers = at86rf233_powers;
  1283. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
  1284. lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
  1285. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
  1286. break;
  1287. default:
  1288. chip = "unknown";
  1289. rc = -ENOTSUPP;
  1290. goto not_supp;
  1291. }
  1292. lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
  1293. lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
  1294. not_supp:
  1295. dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
  1296. return rc;
  1297. }
  1298. static int at86rf230_probe(struct spi_device *spi)
  1299. {
  1300. struct ieee802154_hw *hw;
  1301. struct at86rf230_local *lp;
  1302. struct gpio_desc *slp_tr;
  1303. struct gpio_desc *rstn;
  1304. unsigned int status;
  1305. int rc, irq_type;
  1306. u8 xtal_trim;
  1307. if (!spi->irq) {
  1308. dev_err(&spi->dev, "no IRQ specified\n");
  1309. return -EINVAL;
  1310. }
  1311. rc = device_property_read_u8(&spi->dev, "xtal-trim", &xtal_trim);
  1312. if (rc < 0) {
  1313. if (rc != -EINVAL) {
  1314. dev_err(&spi->dev,
  1315. "failed to parse xtal-trim: %d\n", rc);
  1316. return rc;
  1317. }
  1318. xtal_trim = 0;
  1319. }
  1320. rstn = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
  1321. rc = PTR_ERR_OR_ZERO(rstn);
  1322. if (rc)
  1323. return rc;
  1324. gpiod_set_consumer_name(rstn, "rstn");
  1325. slp_tr = devm_gpiod_get_optional(&spi->dev, "sleep", GPIOD_OUT_LOW);
  1326. rc = PTR_ERR_OR_ZERO(slp_tr);
  1327. if (rc)
  1328. return rc;
  1329. gpiod_set_consumer_name(slp_tr, "slp_tr");
  1330. /* Reset */
  1331. if (rstn) {
  1332. udelay(1);
  1333. gpiod_set_value_cansleep(rstn, 1);
  1334. udelay(1);
  1335. gpiod_set_value_cansleep(rstn, 0);
  1336. usleep_range(120, 240);
  1337. }
  1338. hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
  1339. if (!hw)
  1340. return -ENOMEM;
  1341. lp = hw->priv;
  1342. lp->hw = hw;
  1343. lp->spi = spi;
  1344. lp->slp_tr = slp_tr;
  1345. hw->parent = &spi->dev;
  1346. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  1347. lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
  1348. if (IS_ERR(lp->regmap)) {
  1349. rc = PTR_ERR(lp->regmap);
  1350. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  1351. rc);
  1352. goto free_dev;
  1353. }
  1354. at86rf230_setup_spi_messages(lp, &lp->state);
  1355. at86rf230_setup_spi_messages(lp, &lp->tx);
  1356. rc = at86rf230_detect_device(lp);
  1357. if (rc < 0)
  1358. goto free_dev;
  1359. init_completion(&lp->state_complete);
  1360. spi_set_drvdata(spi, lp);
  1361. rc = at86rf230_hw_init(lp, xtal_trim);
  1362. if (rc)
  1363. goto free_dev;
  1364. /* Read irq status register to reset irq line */
  1365. rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
  1366. if (rc)
  1367. goto free_dev;
  1368. irq_type = irq_get_trigger_type(spi->irq);
  1369. if (!irq_type)
  1370. irq_type = IRQF_TRIGGER_HIGH;
  1371. rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
  1372. IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
  1373. if (rc)
  1374. goto free_dev;
  1375. /* disable_irq by default and wait for starting hardware */
  1376. disable_irq(spi->irq);
  1377. /* going into sleep by default */
  1378. at86rf230_sleep(lp);
  1379. rc = ieee802154_register_hw(lp->hw);
  1380. if (rc)
  1381. goto free_dev;
  1382. return rc;
  1383. free_dev:
  1384. ieee802154_free_hw(lp->hw);
  1385. return rc;
  1386. }
  1387. static void at86rf230_remove(struct spi_device *spi)
  1388. {
  1389. struct at86rf230_local *lp = spi_get_drvdata(spi);
  1390. /* mask all at86rf230 irq's */
  1391. at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
  1392. ieee802154_unregister_hw(lp->hw);
  1393. ieee802154_free_hw(lp->hw);
  1394. dev_dbg(&spi->dev, "unregistered at86rf230\n");
  1395. }
  1396. static const struct of_device_id at86rf230_of_match[] = {
  1397. { .compatible = "atmel,at86rf230", },
  1398. { .compatible = "atmel,at86rf231", },
  1399. { .compatible = "atmel,at86rf233", },
  1400. { .compatible = "atmel,at86rf212", },
  1401. { },
  1402. };
  1403. MODULE_DEVICE_TABLE(of, at86rf230_of_match);
  1404. static const struct spi_device_id at86rf230_device_id[] = {
  1405. { .name = "at86rf230", },
  1406. { .name = "at86rf231", },
  1407. { .name = "at86rf233", },
  1408. { .name = "at86rf212", },
  1409. { },
  1410. };
  1411. MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
  1412. static struct spi_driver at86rf230_driver = {
  1413. .id_table = at86rf230_device_id,
  1414. .driver = {
  1415. .of_match_table = at86rf230_of_match,
  1416. .name = "at86rf230",
  1417. },
  1418. .probe = at86rf230_probe,
  1419. .remove = at86rf230_remove,
  1420. };
  1421. module_spi_driver(at86rf230_driver);
  1422. MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
  1423. MODULE_LICENSE("GPL v2");