iov.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCI Express I/O Virtualization (IOV) support
  4. * Single Root IOV 1.0
  5. * Address Translation Service 1.0
  6. *
  7. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  8. */
  9. #include <linux/pci.h>
  10. #include <linux/slab.h>
  11. #include <linux/export.h>
  12. #include <linux/string.h>
  13. #include <linux/delay.h>
  14. #include "pci.h"
  15. #define VIRTFN_ID_LEN 17 /* "virtfn%u\0" for 2^32 - 1 */
  16. int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
  17. {
  18. if (!dev->is_physfn)
  19. return -EINVAL;
  20. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  21. dev->sriov->stride * vf_id) >> 8);
  22. }
  23. int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
  24. {
  25. if (!dev->is_physfn)
  26. return -EINVAL;
  27. return (dev->devfn + dev->sriov->offset +
  28. dev->sriov->stride * vf_id) & 0xff;
  29. }
  30. EXPORT_SYMBOL_GPL(pci_iov_virtfn_devfn);
  31. int pci_iov_vf_id(struct pci_dev *dev)
  32. {
  33. struct pci_dev *pf;
  34. if (!dev->is_virtfn)
  35. return -EINVAL;
  36. pf = pci_physfn(dev);
  37. return (pci_dev_id(dev) - (pci_dev_id(pf) + pf->sriov->offset)) /
  38. pf->sriov->stride;
  39. }
  40. EXPORT_SYMBOL_GPL(pci_iov_vf_id);
  41. /**
  42. * pci_iov_get_pf_drvdata - Return the drvdata of a PF
  43. * @dev: VF pci_dev
  44. * @pf_driver: Device driver required to own the PF
  45. *
  46. * This must be called from a context that ensures that a VF driver is attached.
  47. * The value returned is invalid once the VF driver completes its remove()
  48. * callback.
  49. *
  50. * Locking is achieved by the driver core. A VF driver cannot be probed until
  51. * pci_enable_sriov() is called and pci_disable_sriov() does not return until
  52. * all VF drivers have completed their remove().
  53. *
  54. * The PF driver must call pci_disable_sriov() before it begins to destroy the
  55. * drvdata.
  56. */
  57. void *pci_iov_get_pf_drvdata(struct pci_dev *dev, struct pci_driver *pf_driver)
  58. {
  59. struct pci_dev *pf_dev;
  60. if (!dev->is_virtfn)
  61. return ERR_PTR(-EINVAL);
  62. pf_dev = dev->physfn;
  63. if (pf_dev->driver != pf_driver)
  64. return ERR_PTR(-EINVAL);
  65. return pci_get_drvdata(pf_dev);
  66. }
  67. EXPORT_SYMBOL_GPL(pci_iov_get_pf_drvdata);
  68. /*
  69. * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
  70. * change when NumVFs changes.
  71. *
  72. * Update iov->offset and iov->stride when NumVFs is written.
  73. */
  74. static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
  75. {
  76. struct pci_sriov *iov = dev->sriov;
  77. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  78. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  79. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  80. }
  81. /*
  82. * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
  83. * determine how many additional bus numbers will be consumed by VFs.
  84. *
  85. * Iterate over all valid NumVFs, validate offset and stride, and calculate
  86. * the maximum number of bus numbers that could ever be required.
  87. */
  88. static int compute_max_vf_buses(struct pci_dev *dev)
  89. {
  90. struct pci_sriov *iov = dev->sriov;
  91. int nr_virtfn, busnr, rc = 0;
  92. for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
  93. pci_iov_set_numvfs(dev, nr_virtfn);
  94. if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
  95. rc = -EIO;
  96. goto out;
  97. }
  98. busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  99. if (busnr > iov->max_VF_buses)
  100. iov->max_VF_buses = busnr;
  101. }
  102. out:
  103. pci_iov_set_numvfs(dev, 0);
  104. return rc;
  105. }
  106. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  107. {
  108. struct pci_bus *child;
  109. if (bus->number == busnr)
  110. return bus;
  111. child = pci_find_bus(pci_domain_nr(bus), busnr);
  112. if (child)
  113. return child;
  114. child = pci_add_new_bus(bus, NULL, busnr);
  115. if (!child)
  116. return NULL;
  117. pci_bus_insert_busn_res(child, busnr, busnr);
  118. return child;
  119. }
  120. static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
  121. {
  122. if (physbus != virtbus && list_empty(&virtbus->devices))
  123. pci_remove_bus(virtbus);
  124. }
  125. resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
  126. {
  127. if (!dev->is_physfn)
  128. return 0;
  129. return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
  130. }
  131. static void pci_read_vf_config_common(struct pci_dev *virtfn)
  132. {
  133. struct pci_dev *physfn = virtfn->physfn;
  134. /*
  135. * Some config registers are the same across all associated VFs.
  136. * Read them once from VF0 so we can skip reading them from the
  137. * other VFs.
  138. *
  139. * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to
  140. * have the same Revision ID and Subsystem ID, but we assume they
  141. * do.
  142. */
  143. pci_read_config_dword(virtfn, PCI_CLASS_REVISION,
  144. &physfn->sriov->class);
  145. pci_read_config_byte(virtfn, PCI_HEADER_TYPE,
  146. &physfn->sriov->hdr_type);
  147. pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID,
  148. &physfn->sriov->subsystem_vendor);
  149. pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID,
  150. &physfn->sriov->subsystem_device);
  151. }
  152. int pci_iov_sysfs_link(struct pci_dev *dev,
  153. struct pci_dev *virtfn, int id)
  154. {
  155. char buf[VIRTFN_ID_LEN];
  156. int rc;
  157. sprintf(buf, "virtfn%u", id);
  158. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  159. if (rc)
  160. goto failed;
  161. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  162. if (rc)
  163. goto failed1;
  164. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  165. return 0;
  166. failed1:
  167. sysfs_remove_link(&dev->dev.kobj, buf);
  168. failed:
  169. return rc;
  170. }
  171. #ifdef CONFIG_PCI_MSI
  172. static ssize_t sriov_vf_total_msix_show(struct device *dev,
  173. struct device_attribute *attr,
  174. char *buf)
  175. {
  176. struct pci_dev *pdev = to_pci_dev(dev);
  177. u32 vf_total_msix = 0;
  178. device_lock(dev);
  179. if (!pdev->driver || !pdev->driver->sriov_get_vf_total_msix)
  180. goto unlock;
  181. vf_total_msix = pdev->driver->sriov_get_vf_total_msix(pdev);
  182. unlock:
  183. device_unlock(dev);
  184. return sysfs_emit(buf, "%u\n", vf_total_msix);
  185. }
  186. static DEVICE_ATTR_RO(sriov_vf_total_msix);
  187. static ssize_t sriov_vf_msix_count_store(struct device *dev,
  188. struct device_attribute *attr,
  189. const char *buf, size_t count)
  190. {
  191. struct pci_dev *vf_dev = to_pci_dev(dev);
  192. struct pci_dev *pdev = pci_physfn(vf_dev);
  193. int val, ret = 0;
  194. if (kstrtoint(buf, 0, &val) < 0)
  195. return -EINVAL;
  196. if (val < 0)
  197. return -EINVAL;
  198. device_lock(&pdev->dev);
  199. if (!pdev->driver || !pdev->driver->sriov_set_msix_vec_count) {
  200. ret = -EOPNOTSUPP;
  201. goto err_pdev;
  202. }
  203. device_lock(&vf_dev->dev);
  204. if (vf_dev->driver) {
  205. /*
  206. * A driver is already attached to this VF and has configured
  207. * itself based on the current MSI-X vector count. Changing
  208. * the vector size could mess up the driver, so block it.
  209. */
  210. ret = -EBUSY;
  211. goto err_dev;
  212. }
  213. ret = pdev->driver->sriov_set_msix_vec_count(vf_dev, val);
  214. err_dev:
  215. device_unlock(&vf_dev->dev);
  216. err_pdev:
  217. device_unlock(&pdev->dev);
  218. return ret ? : count;
  219. }
  220. static DEVICE_ATTR_WO(sriov_vf_msix_count);
  221. #endif
  222. static struct attribute *sriov_vf_dev_attrs[] = {
  223. #ifdef CONFIG_PCI_MSI
  224. &dev_attr_sriov_vf_msix_count.attr,
  225. #endif
  226. NULL,
  227. };
  228. static umode_t sriov_vf_attrs_are_visible(struct kobject *kobj,
  229. struct attribute *a, int n)
  230. {
  231. struct device *dev = kobj_to_dev(kobj);
  232. struct pci_dev *pdev = to_pci_dev(dev);
  233. if (!pdev->is_virtfn)
  234. return 0;
  235. return a->mode;
  236. }
  237. const struct attribute_group sriov_vf_dev_attr_group = {
  238. .attrs = sriov_vf_dev_attrs,
  239. .is_visible = sriov_vf_attrs_are_visible,
  240. };
  241. int pci_iov_add_virtfn(struct pci_dev *dev, int id)
  242. {
  243. int i;
  244. int rc = -ENOMEM;
  245. u64 size;
  246. struct pci_dev *virtfn;
  247. struct resource *res;
  248. struct pci_sriov *iov = dev->sriov;
  249. struct pci_bus *bus;
  250. bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
  251. if (!bus)
  252. goto failed;
  253. virtfn = pci_alloc_dev(bus);
  254. if (!virtfn)
  255. goto failed0;
  256. virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
  257. virtfn->vendor = dev->vendor;
  258. virtfn->device = iov->vf_device;
  259. virtfn->is_virtfn = 1;
  260. virtfn->physfn = pci_dev_get(dev);
  261. virtfn->no_command_memory = 1;
  262. if (id == 0)
  263. pci_read_vf_config_common(virtfn);
  264. rc = pci_setup_device(virtfn);
  265. if (rc)
  266. goto failed1;
  267. virtfn->dev.parent = dev->dev.parent;
  268. virtfn->multifunction = 0;
  269. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  270. res = &dev->resource[i + PCI_IOV_RESOURCES];
  271. if (!res->parent)
  272. continue;
  273. virtfn->resource[i].name = pci_name(virtfn);
  274. virtfn->resource[i].flags = res->flags;
  275. size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
  276. virtfn->resource[i].start = res->start + size * id;
  277. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  278. rc = request_resource(res, &virtfn->resource[i]);
  279. BUG_ON(rc);
  280. }
  281. pci_device_add(virtfn, virtfn->bus);
  282. rc = pci_iov_sysfs_link(dev, virtfn, id);
  283. if (rc)
  284. goto failed1;
  285. pci_bus_add_device(virtfn);
  286. return 0;
  287. failed1:
  288. pci_stop_and_remove_bus_device(virtfn);
  289. pci_dev_put(dev);
  290. failed0:
  291. virtfn_remove_bus(dev->bus, bus);
  292. failed:
  293. return rc;
  294. }
  295. void pci_iov_remove_virtfn(struct pci_dev *dev, int id)
  296. {
  297. char buf[VIRTFN_ID_LEN];
  298. struct pci_dev *virtfn;
  299. virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
  300. pci_iov_virtfn_bus(dev, id),
  301. pci_iov_virtfn_devfn(dev, id));
  302. if (!virtfn)
  303. return;
  304. sprintf(buf, "virtfn%u", id);
  305. sysfs_remove_link(&dev->dev.kobj, buf);
  306. /*
  307. * pci_stop_dev() could have been called for this virtfn already,
  308. * so the directory for the virtfn may have been removed before.
  309. * Double check to avoid spurious sysfs warnings.
  310. */
  311. if (virtfn->dev.kobj.sd)
  312. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  313. pci_stop_and_remove_bus_device(virtfn);
  314. virtfn_remove_bus(dev->bus, virtfn->bus);
  315. /* balance pci_get_domain_bus_and_slot() */
  316. pci_dev_put(virtfn);
  317. pci_dev_put(dev);
  318. }
  319. static ssize_t sriov_totalvfs_show(struct device *dev,
  320. struct device_attribute *attr,
  321. char *buf)
  322. {
  323. struct pci_dev *pdev = to_pci_dev(dev);
  324. return sysfs_emit(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  325. }
  326. static ssize_t sriov_numvfs_show(struct device *dev,
  327. struct device_attribute *attr,
  328. char *buf)
  329. {
  330. struct pci_dev *pdev = to_pci_dev(dev);
  331. u16 num_vfs;
  332. /* Serialize vs sriov_numvfs_store() so readers see valid num_VFs */
  333. device_lock(&pdev->dev);
  334. num_vfs = pdev->sriov->num_VFs;
  335. device_unlock(&pdev->dev);
  336. return sysfs_emit(buf, "%u\n", num_vfs);
  337. }
  338. /*
  339. * num_vfs > 0; number of VFs to enable
  340. * num_vfs = 0; disable all VFs
  341. *
  342. * Note: SRIOV spec does not allow partial VF
  343. * disable, so it's all or none.
  344. */
  345. static ssize_t sriov_numvfs_store(struct device *dev,
  346. struct device_attribute *attr,
  347. const char *buf, size_t count)
  348. {
  349. struct pci_dev *pdev = to_pci_dev(dev);
  350. int ret = 0;
  351. u16 num_vfs;
  352. if (kstrtou16(buf, 0, &num_vfs) < 0)
  353. return -EINVAL;
  354. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  355. return -ERANGE;
  356. device_lock(&pdev->dev);
  357. if (num_vfs == pdev->sriov->num_VFs)
  358. goto exit;
  359. /* is PF driver loaded */
  360. if (!pdev->driver) {
  361. pci_info(pdev, "no driver bound to device; cannot configure SR-IOV\n");
  362. ret = -ENOENT;
  363. goto exit;
  364. }
  365. /* is PF driver loaded w/callback */
  366. if (!pdev->driver->sriov_configure) {
  367. pci_info(pdev, "driver does not support SR-IOV configuration via sysfs\n");
  368. ret = -ENOENT;
  369. goto exit;
  370. }
  371. if (num_vfs == 0) {
  372. /* disable VFs */
  373. ret = pdev->driver->sriov_configure(pdev, 0);
  374. goto exit;
  375. }
  376. /* enable VFs */
  377. if (pdev->sriov->num_VFs) {
  378. pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  379. pdev->sriov->num_VFs, num_vfs);
  380. ret = -EBUSY;
  381. goto exit;
  382. }
  383. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  384. if (ret < 0)
  385. goto exit;
  386. if (ret != num_vfs)
  387. pci_warn(pdev, "%d VFs requested; only %d enabled\n",
  388. num_vfs, ret);
  389. exit:
  390. device_unlock(&pdev->dev);
  391. if (ret < 0)
  392. return ret;
  393. return count;
  394. }
  395. static ssize_t sriov_offset_show(struct device *dev,
  396. struct device_attribute *attr,
  397. char *buf)
  398. {
  399. struct pci_dev *pdev = to_pci_dev(dev);
  400. return sysfs_emit(buf, "%u\n", pdev->sriov->offset);
  401. }
  402. static ssize_t sriov_stride_show(struct device *dev,
  403. struct device_attribute *attr,
  404. char *buf)
  405. {
  406. struct pci_dev *pdev = to_pci_dev(dev);
  407. return sysfs_emit(buf, "%u\n", pdev->sriov->stride);
  408. }
  409. static ssize_t sriov_vf_device_show(struct device *dev,
  410. struct device_attribute *attr,
  411. char *buf)
  412. {
  413. struct pci_dev *pdev = to_pci_dev(dev);
  414. return sysfs_emit(buf, "%x\n", pdev->sriov->vf_device);
  415. }
  416. static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
  417. struct device_attribute *attr,
  418. char *buf)
  419. {
  420. struct pci_dev *pdev = to_pci_dev(dev);
  421. return sysfs_emit(buf, "%u\n", pdev->sriov->drivers_autoprobe);
  422. }
  423. static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
  424. struct device_attribute *attr,
  425. const char *buf, size_t count)
  426. {
  427. struct pci_dev *pdev = to_pci_dev(dev);
  428. bool drivers_autoprobe;
  429. if (kstrtobool(buf, &drivers_autoprobe) < 0)
  430. return -EINVAL;
  431. pdev->sriov->drivers_autoprobe = drivers_autoprobe;
  432. return count;
  433. }
  434. static DEVICE_ATTR_RO(sriov_totalvfs);
  435. static DEVICE_ATTR_RW(sriov_numvfs);
  436. static DEVICE_ATTR_RO(sriov_offset);
  437. static DEVICE_ATTR_RO(sriov_stride);
  438. static DEVICE_ATTR_RO(sriov_vf_device);
  439. static DEVICE_ATTR_RW(sriov_drivers_autoprobe);
  440. static struct attribute *sriov_pf_dev_attrs[] = {
  441. &dev_attr_sriov_totalvfs.attr,
  442. &dev_attr_sriov_numvfs.attr,
  443. &dev_attr_sriov_offset.attr,
  444. &dev_attr_sriov_stride.attr,
  445. &dev_attr_sriov_vf_device.attr,
  446. &dev_attr_sriov_drivers_autoprobe.attr,
  447. #ifdef CONFIG_PCI_MSI
  448. &dev_attr_sriov_vf_total_msix.attr,
  449. #endif
  450. NULL,
  451. };
  452. static umode_t sriov_pf_attrs_are_visible(struct kobject *kobj,
  453. struct attribute *a, int n)
  454. {
  455. struct device *dev = kobj_to_dev(kobj);
  456. if (!dev_is_pf(dev))
  457. return 0;
  458. return a->mode;
  459. }
  460. const struct attribute_group sriov_pf_dev_attr_group = {
  461. .attrs = sriov_pf_dev_attrs,
  462. .is_visible = sriov_pf_attrs_are_visible,
  463. };
  464. int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
  465. {
  466. return 0;
  467. }
  468. int __weak pcibios_sriov_disable(struct pci_dev *pdev)
  469. {
  470. return 0;
  471. }
  472. static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs)
  473. {
  474. unsigned int i;
  475. int rc;
  476. if (dev->no_vf_scan)
  477. return 0;
  478. pci_lock_rescan_remove();
  479. for (i = 0; i < num_vfs; i++) {
  480. rc = pci_iov_add_virtfn(dev, i);
  481. if (rc)
  482. goto failed;
  483. }
  484. pci_unlock_rescan_remove();
  485. return 0;
  486. failed:
  487. while (i--)
  488. pci_iov_remove_virtfn(dev, i);
  489. pci_unlock_rescan_remove();
  490. return rc;
  491. }
  492. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  493. {
  494. int rc;
  495. int i;
  496. int nres;
  497. u16 initial;
  498. struct resource *res;
  499. struct pci_dev *pdev;
  500. struct pci_sriov *iov = dev->sriov;
  501. int bars = 0;
  502. int bus;
  503. if (!nr_virtfn)
  504. return 0;
  505. if (iov->num_VFs)
  506. return -EINVAL;
  507. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  508. if (initial > iov->total_VFs ||
  509. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  510. return -EIO;
  511. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  512. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  513. return -EINVAL;
  514. nres = 0;
  515. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  516. bars |= (1 << (i + PCI_IOV_RESOURCES));
  517. res = &dev->resource[i + PCI_IOV_RESOURCES];
  518. if (res->parent)
  519. nres++;
  520. }
  521. if (nres != iov->nres) {
  522. pci_err(dev, "not enough MMIO resources for SR-IOV\n");
  523. return -ENOMEM;
  524. }
  525. bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  526. if (bus > dev->bus->busn_res.end) {
  527. pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
  528. nr_virtfn, bus, &dev->bus->busn_res);
  529. return -ENOMEM;
  530. }
  531. if (pci_enable_resources(dev, bars)) {
  532. pci_err(dev, "SR-IOV: IOV BARS not allocated\n");
  533. return -ENOMEM;
  534. }
  535. if (iov->link != dev->devfn) {
  536. pdev = pci_get_slot(dev->bus, iov->link);
  537. if (!pdev)
  538. return -ENODEV;
  539. if (!pdev->is_physfn) {
  540. pci_dev_put(pdev);
  541. return -ENOSYS;
  542. }
  543. rc = sysfs_create_link(&dev->dev.kobj,
  544. &pdev->dev.kobj, "dep_link");
  545. pci_dev_put(pdev);
  546. if (rc)
  547. return rc;
  548. }
  549. iov->initial_VFs = initial;
  550. if (nr_virtfn < initial)
  551. initial = nr_virtfn;
  552. rc = pcibios_sriov_enable(dev, initial);
  553. if (rc) {
  554. pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc);
  555. goto err_pcibios;
  556. }
  557. pci_iov_set_numvfs(dev, nr_virtfn);
  558. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  559. pci_cfg_access_lock(dev);
  560. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  561. msleep(100);
  562. pci_cfg_access_unlock(dev);
  563. rc = sriov_add_vfs(dev, initial);
  564. if (rc)
  565. goto err_pcibios;
  566. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  567. iov->num_VFs = nr_virtfn;
  568. return 0;
  569. err_pcibios:
  570. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  571. pci_cfg_access_lock(dev);
  572. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  573. ssleep(1);
  574. pci_cfg_access_unlock(dev);
  575. pcibios_sriov_disable(dev);
  576. if (iov->link != dev->devfn)
  577. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  578. pci_iov_set_numvfs(dev, 0);
  579. return rc;
  580. }
  581. static void sriov_del_vfs(struct pci_dev *dev)
  582. {
  583. struct pci_sriov *iov = dev->sriov;
  584. int i;
  585. pci_lock_rescan_remove();
  586. for (i = 0; i < iov->num_VFs; i++)
  587. pci_iov_remove_virtfn(dev, i);
  588. pci_unlock_rescan_remove();
  589. }
  590. static void sriov_disable(struct pci_dev *dev)
  591. {
  592. struct pci_sriov *iov = dev->sriov;
  593. if (!iov->num_VFs)
  594. return;
  595. sriov_del_vfs(dev);
  596. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  597. pci_cfg_access_lock(dev);
  598. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  599. ssleep(1);
  600. pci_cfg_access_unlock(dev);
  601. pcibios_sriov_disable(dev);
  602. if (iov->link != dev->devfn)
  603. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  604. iov->num_VFs = 0;
  605. pci_iov_set_numvfs(dev, 0);
  606. }
  607. static int sriov_init(struct pci_dev *dev, int pos)
  608. {
  609. int i, bar64;
  610. int rc;
  611. int nres;
  612. u32 pgsz;
  613. u16 ctrl, total;
  614. struct pci_sriov *iov;
  615. struct resource *res;
  616. const char *res_name;
  617. struct pci_dev *pdev;
  618. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  619. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  620. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  621. ssleep(1);
  622. }
  623. ctrl = 0;
  624. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  625. if (pdev->is_physfn)
  626. goto found;
  627. pdev = NULL;
  628. if (pci_ari_enabled(dev->bus))
  629. ctrl |= PCI_SRIOV_CTRL_ARI;
  630. found:
  631. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  632. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  633. if (!total)
  634. return 0;
  635. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  636. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  637. pgsz &= ~((1 << i) - 1);
  638. if (!pgsz)
  639. return -EIO;
  640. pgsz &= ~(pgsz - 1);
  641. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  642. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  643. if (!iov)
  644. return -ENOMEM;
  645. nres = 0;
  646. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  647. res = &dev->resource[i + PCI_IOV_RESOURCES];
  648. res_name = pci_resource_name(dev, i + PCI_IOV_RESOURCES);
  649. /*
  650. * If it is already FIXED, don't change it, something
  651. * (perhaps EA or header fixups) wants it this way.
  652. */
  653. if (res->flags & IORESOURCE_PCI_FIXED)
  654. bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
  655. else
  656. bar64 = __pci_read_base(dev, pci_bar_unknown, res,
  657. pos + PCI_SRIOV_BAR + i * 4);
  658. if (!res->flags)
  659. continue;
  660. if (resource_size(res) & (PAGE_SIZE - 1)) {
  661. rc = -EIO;
  662. goto failed;
  663. }
  664. iov->barsz[i] = resource_size(res);
  665. res->end = res->start + resource_size(res) * total - 1;
  666. pci_info(dev, "%s %pR: contains BAR %d for %d VFs\n",
  667. res_name, res, i, total);
  668. i += bar64;
  669. nres++;
  670. }
  671. iov->pos = pos;
  672. iov->nres = nres;
  673. iov->ctrl = ctrl;
  674. iov->total_VFs = total;
  675. iov->driver_max_VFs = total;
  676. pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device);
  677. iov->pgsz = pgsz;
  678. iov->self = dev;
  679. iov->drivers_autoprobe = true;
  680. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  681. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  682. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  683. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  684. if (pdev)
  685. iov->dev = pci_dev_get(pdev);
  686. else
  687. iov->dev = dev;
  688. dev->sriov = iov;
  689. dev->is_physfn = 1;
  690. rc = compute_max_vf_buses(dev);
  691. if (rc)
  692. goto fail_max_buses;
  693. return 0;
  694. fail_max_buses:
  695. dev->sriov = NULL;
  696. dev->is_physfn = 0;
  697. failed:
  698. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  699. res = &dev->resource[i + PCI_IOV_RESOURCES];
  700. res->flags = 0;
  701. }
  702. kfree(iov);
  703. return rc;
  704. }
  705. static void sriov_release(struct pci_dev *dev)
  706. {
  707. BUG_ON(dev->sriov->num_VFs);
  708. if (dev != dev->sriov->dev)
  709. pci_dev_put(dev->sriov->dev);
  710. kfree(dev->sriov);
  711. dev->sriov = NULL;
  712. }
  713. static void sriov_restore_state(struct pci_dev *dev)
  714. {
  715. int i;
  716. u16 ctrl;
  717. struct pci_sriov *iov = dev->sriov;
  718. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  719. if (ctrl & PCI_SRIOV_CTRL_VFE)
  720. return;
  721. /*
  722. * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because
  723. * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI.
  724. */
  725. ctrl &= ~PCI_SRIOV_CTRL_ARI;
  726. ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI;
  727. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl);
  728. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
  729. pci_update_resource(dev, i + PCI_IOV_RESOURCES);
  730. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  731. pci_iov_set_numvfs(dev, iov->num_VFs);
  732. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  733. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  734. msleep(100);
  735. }
  736. /**
  737. * pci_iov_init - initialize the IOV capability
  738. * @dev: the PCI device
  739. *
  740. * Returns 0 on success, or negative on failure.
  741. */
  742. int pci_iov_init(struct pci_dev *dev)
  743. {
  744. int pos;
  745. if (!pci_is_pcie(dev))
  746. return -ENODEV;
  747. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  748. if (pos)
  749. return sriov_init(dev, pos);
  750. return -ENODEV;
  751. }
  752. /**
  753. * pci_iov_release - release resources used by the IOV capability
  754. * @dev: the PCI device
  755. */
  756. void pci_iov_release(struct pci_dev *dev)
  757. {
  758. if (dev->is_physfn)
  759. sriov_release(dev);
  760. }
  761. /**
  762. * pci_iov_remove - clean up SR-IOV state after PF driver is detached
  763. * @dev: the PCI device
  764. */
  765. void pci_iov_remove(struct pci_dev *dev)
  766. {
  767. struct pci_sriov *iov = dev->sriov;
  768. if (!dev->is_physfn)
  769. return;
  770. iov->driver_max_VFs = iov->total_VFs;
  771. if (iov->num_VFs)
  772. pci_warn(dev, "driver left SR-IOV enabled after remove\n");
  773. }
  774. /**
  775. * pci_iov_update_resource - update a VF BAR
  776. * @dev: the PCI device
  777. * @resno: the resource number
  778. *
  779. * Update a VF BAR in the SR-IOV capability of a PF.
  780. */
  781. void pci_iov_update_resource(struct pci_dev *dev, int resno)
  782. {
  783. struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
  784. struct resource *res = dev->resource + resno;
  785. int vf_bar = resno - PCI_IOV_RESOURCES;
  786. struct pci_bus_region region;
  787. u16 cmd;
  788. u32 new;
  789. int reg;
  790. /*
  791. * The generic pci_restore_bars() path calls this for all devices,
  792. * including VFs and non-SR-IOV devices. If this is not a PF, we
  793. * have nothing to do.
  794. */
  795. if (!iov)
  796. return;
  797. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
  798. if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
  799. dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
  800. vf_bar, res);
  801. return;
  802. }
  803. /*
  804. * Ignore unimplemented BARs, unused resource slots for 64-bit
  805. * BARs, and non-movable resources, e.g., those described via
  806. * Enhanced Allocation.
  807. */
  808. if (!res->flags)
  809. return;
  810. if (res->flags & IORESOURCE_UNSET)
  811. return;
  812. if (res->flags & IORESOURCE_PCI_FIXED)
  813. return;
  814. pcibios_resource_to_bus(dev->bus, &region, res);
  815. new = region.start;
  816. new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
  817. reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
  818. pci_write_config_dword(dev, reg, new);
  819. if (res->flags & IORESOURCE_MEM_64) {
  820. new = region.start >> 16 >> 16;
  821. pci_write_config_dword(dev, reg + 4, new);
  822. }
  823. }
  824. resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
  825. int resno)
  826. {
  827. return pci_iov_resource_size(dev, resno);
  828. }
  829. /**
  830. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  831. * @dev: the PCI device
  832. * @resno: the resource number
  833. *
  834. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  835. * This is not the same as the resource size which is defined as
  836. * the VF BAR size multiplied by the number of VFs. The alignment
  837. * is just the VF BAR size.
  838. */
  839. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  840. {
  841. return pcibios_iov_resource_alignment(dev, resno);
  842. }
  843. /**
  844. * pci_restore_iov_state - restore the state of the IOV capability
  845. * @dev: the PCI device
  846. */
  847. void pci_restore_iov_state(struct pci_dev *dev)
  848. {
  849. if (dev->is_physfn)
  850. sriov_restore_state(dev);
  851. }
  852. /**
  853. * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs
  854. * @dev: the PCI device
  855. * @auto_probe: set VF drivers auto probe flag
  856. */
  857. void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe)
  858. {
  859. if (dev->is_physfn)
  860. dev->sriov->drivers_autoprobe = auto_probe;
  861. }
  862. /**
  863. * pci_iov_bus_range - find bus range used by Virtual Function
  864. * @bus: the PCI bus
  865. *
  866. * Returns max number of buses (exclude current one) used by Virtual
  867. * Functions.
  868. */
  869. int pci_iov_bus_range(struct pci_bus *bus)
  870. {
  871. int max = 0;
  872. struct pci_dev *dev;
  873. list_for_each_entry(dev, &bus->devices, bus_list) {
  874. if (!dev->is_physfn)
  875. continue;
  876. if (dev->sriov->max_VF_buses > max)
  877. max = dev->sriov->max_VF_buses;
  878. }
  879. return max ? max - bus->number : 0;
  880. }
  881. /**
  882. * pci_enable_sriov - enable the SR-IOV capability
  883. * @dev: the PCI device
  884. * @nr_virtfn: number of virtual functions to enable
  885. *
  886. * Returns 0 on success, or negative on failure.
  887. */
  888. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  889. {
  890. might_sleep();
  891. if (!dev->is_physfn)
  892. return -ENOSYS;
  893. return sriov_enable(dev, nr_virtfn);
  894. }
  895. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  896. /**
  897. * pci_disable_sriov - disable the SR-IOV capability
  898. * @dev: the PCI device
  899. */
  900. void pci_disable_sriov(struct pci_dev *dev)
  901. {
  902. might_sleep();
  903. if (!dev->is_physfn)
  904. return;
  905. sriov_disable(dev);
  906. }
  907. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  908. /**
  909. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  910. * @dev: the PCI device
  911. *
  912. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  913. */
  914. int pci_num_vf(struct pci_dev *dev)
  915. {
  916. if (!dev->is_physfn)
  917. return 0;
  918. return dev->sriov->num_VFs;
  919. }
  920. EXPORT_SYMBOL_GPL(pci_num_vf);
  921. /**
  922. * pci_vfs_assigned - returns number of VFs are assigned to a guest
  923. * @dev: the PCI device
  924. *
  925. * Returns number of VFs belonging to this device that are assigned to a guest.
  926. * If device is not a physical function returns 0.
  927. */
  928. int pci_vfs_assigned(struct pci_dev *dev)
  929. {
  930. struct pci_dev *vfdev;
  931. unsigned int vfs_assigned = 0;
  932. unsigned short dev_id;
  933. /* only search if we are a PF */
  934. if (!dev->is_physfn)
  935. return 0;
  936. /*
  937. * determine the device ID for the VFs, the vendor ID will be the
  938. * same as the PF so there is no need to check for that one
  939. */
  940. dev_id = dev->sriov->vf_device;
  941. /* loop through all the VFs to see if we own any that are assigned */
  942. vfdev = pci_get_device(dev->vendor, dev_id, NULL);
  943. while (vfdev) {
  944. /*
  945. * It is considered assigned if it is a virtual function with
  946. * our dev as the physical function and the assigned bit is set
  947. */
  948. if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
  949. pci_is_dev_assigned(vfdev))
  950. vfs_assigned++;
  951. vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
  952. }
  953. return vfs_assigned;
  954. }
  955. EXPORT_SYMBOL_GPL(pci_vfs_assigned);
  956. /**
  957. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  958. * @dev: the PCI PF device
  959. * @numvfs: number that should be used for TotalVFs supported
  960. *
  961. * Should be called from PF driver's probe routine with
  962. * device's mutex held.
  963. *
  964. * Returns 0 if PF is an SRIOV-capable device and
  965. * value of numvfs valid. If not a PF return -ENOSYS;
  966. * if numvfs is invalid return -EINVAL;
  967. * if VFs already enabled, return -EBUSY.
  968. */
  969. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  970. {
  971. if (!dev->is_physfn)
  972. return -ENOSYS;
  973. if (numvfs > dev->sriov->total_VFs)
  974. return -EINVAL;
  975. /* Shouldn't change if VFs already enabled */
  976. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  977. return -EBUSY;
  978. dev->sriov->driver_max_VFs = numvfs;
  979. return 0;
  980. }
  981. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  982. /**
  983. * pci_sriov_get_totalvfs -- get total VFs supported on this device
  984. * @dev: the PCI PF device
  985. *
  986. * For a PCIe device with SRIOV support, return the PCIe
  987. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  988. * if the driver reduced it. Otherwise 0.
  989. */
  990. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  991. {
  992. if (!dev->is_physfn)
  993. return 0;
  994. return dev->sriov->driver_max_VFs;
  995. }
  996. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
  997. /**
  998. * pci_sriov_configure_simple - helper to configure SR-IOV
  999. * @dev: the PCI device
  1000. * @nr_virtfn: number of virtual functions to enable, 0 to disable
  1001. *
  1002. * Enable or disable SR-IOV for devices that don't require any PF setup
  1003. * before enabling SR-IOV. Return value is negative on error, or number of
  1004. * VFs allocated on success.
  1005. */
  1006. int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn)
  1007. {
  1008. int rc;
  1009. might_sleep();
  1010. if (!dev->is_physfn)
  1011. return -ENODEV;
  1012. if (pci_vfs_assigned(dev)) {
  1013. pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n");
  1014. return -EPERM;
  1015. }
  1016. if (nr_virtfn == 0) {
  1017. sriov_disable(dev);
  1018. return 0;
  1019. }
  1020. rc = sriov_enable(dev, nr_virtfn);
  1021. if (rc < 0)
  1022. return rc;
  1023. return nr_virtfn;
  1024. }
  1025. EXPORT_SYMBOL_GPL(pci_sriov_configure_simple);