phy-jh7110-usb.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * StarFive JH7110 USB 2.0 PHY driver
  4. *
  5. * Copyright (C) 2023 StarFive Technology Co., Ltd.
  6. * Author: Minda Chen <minda.chen@starfivetech.com>
  7. */
  8. #include <linux/bits.h>
  9. #include <linux/clk.h>
  10. #include <linux/err.h>
  11. #include <linux/io.h>
  12. #include <linux/mfd/syscon.h>
  13. #include <linux/module.h>
  14. #include <linux/phy/phy.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/regmap.h>
  17. #include <linux/usb/of.h>
  18. #define USB_125M_CLK_RATE 125000000
  19. #define USB_CLK_MODE_OFF 0x0
  20. #define USB_CLK_MODE_RX_NORMAL_PWR BIT(1)
  21. #define USB_LS_KEEPALIVE_OFF 0x4
  22. #define USB_LS_KEEPALIVE_ENABLE BIT(4)
  23. #define USB_PDRSTN_SPLIT BIT(17)
  24. #define SYSCON_USB_SPLIT_OFFSET 0x18
  25. struct jh7110_usb2_phy {
  26. struct phy *phy;
  27. void __iomem *regs;
  28. struct regmap *sys_syscon;
  29. struct clk *usb_125m_clk;
  30. struct clk *app_125m;
  31. enum phy_mode mode;
  32. };
  33. static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
  34. {
  35. unsigned int val;
  36. /* Host mode enable the LS speed keep-alive signal */
  37. val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
  38. if (set)
  39. val |= USB_LS_KEEPALIVE_ENABLE;
  40. else
  41. val &= ~USB_LS_KEEPALIVE_ENABLE;
  42. writel(val, phy->regs + USB_LS_KEEPALIVE_OFF);
  43. }
  44. static int usb2_phy_set_mode(struct phy *_phy,
  45. enum phy_mode mode, int submode)
  46. {
  47. struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
  48. switch (mode) {
  49. case PHY_MODE_USB_HOST:
  50. case PHY_MODE_USB_DEVICE:
  51. case PHY_MODE_USB_OTG:
  52. break;
  53. default:
  54. return -EINVAL;
  55. }
  56. if (mode != phy->mode) {
  57. dev_dbg(&_phy->dev, "Changing phy to %d\n", mode);
  58. phy->mode = mode;
  59. usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
  60. }
  61. /* Connect usb 2.0 phy mode */
  62. regmap_update_bits(phy->sys_syscon, SYSCON_USB_SPLIT_OFFSET,
  63. USB_PDRSTN_SPLIT, USB_PDRSTN_SPLIT);
  64. return 0;
  65. }
  66. static int jh7110_usb2_phy_init(struct phy *_phy)
  67. {
  68. struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
  69. int ret;
  70. unsigned int val;
  71. ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE);
  72. if (ret)
  73. return ret;
  74. ret = clk_prepare_enable(phy->app_125m);
  75. if (ret)
  76. return ret;
  77. val = readl(phy->regs + USB_CLK_MODE_OFF);
  78. val |= USB_CLK_MODE_RX_NORMAL_PWR;
  79. writel(val, phy->regs + USB_CLK_MODE_OFF);
  80. return 0;
  81. }
  82. static int jh7110_usb2_phy_exit(struct phy *_phy)
  83. {
  84. struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
  85. clk_disable_unprepare(phy->app_125m);
  86. return 0;
  87. }
  88. static const struct phy_ops jh7110_usb2_phy_ops = {
  89. .init = jh7110_usb2_phy_init,
  90. .exit = jh7110_usb2_phy_exit,
  91. .set_mode = usb2_phy_set_mode,
  92. .owner = THIS_MODULE,
  93. };
  94. static int jh7110_usb_phy_probe(struct platform_device *pdev)
  95. {
  96. struct jh7110_usb2_phy *phy;
  97. struct device *dev = &pdev->dev;
  98. struct phy_provider *phy_provider;
  99. phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
  100. if (!phy)
  101. return -ENOMEM;
  102. phy->usb_125m_clk = devm_clk_get(dev, "125m");
  103. if (IS_ERR(phy->usb_125m_clk))
  104. return dev_err_probe(dev, PTR_ERR(phy->usb_125m_clk),
  105. "Failed to get 125m clock\n");
  106. phy->app_125m = devm_clk_get(dev, "app_125m");
  107. if (IS_ERR(phy->app_125m))
  108. return dev_err_probe(dev, PTR_ERR(phy->app_125m),
  109. "Failed to get app 125m clock\n");
  110. phy->regs = devm_platform_ioremap_resource(pdev, 0);
  111. if (IS_ERR(phy->regs))
  112. return dev_err_probe(dev, PTR_ERR(phy->regs),
  113. "Failed to map phy base\n");
  114. phy->phy = devm_phy_create(dev, NULL, &jh7110_usb2_phy_ops);
  115. if (IS_ERR(phy->phy))
  116. return dev_err_probe(dev, PTR_ERR(phy->phy),
  117. "Failed to create phy\n");
  118. phy_set_drvdata(phy->phy, phy);
  119. phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  120. phy->sys_syscon =
  121. syscon_regmap_lookup_by_compatible("starfive,jh7110-sys-syscon");
  122. if (IS_ERR(phy->sys_syscon))
  123. return dev_err_probe(dev, PTR_ERR(phy->sys_syscon),
  124. "Failed to get sys-syscon\n");
  125. return PTR_ERR_OR_ZERO(phy_provider);
  126. }
  127. static const struct of_device_id jh7110_usb_phy_of_match[] = {
  128. { .compatible = "starfive,jh7110-usb-phy" },
  129. { /* sentinel */ },
  130. };
  131. MODULE_DEVICE_TABLE(of, jh7110_usb_phy_of_match);
  132. static struct platform_driver jh7110_usb_phy_driver = {
  133. .probe = jh7110_usb_phy_probe,
  134. .driver = {
  135. .of_match_table = jh7110_usb_phy_of_match,
  136. .name = "jh7110-usb-phy",
  137. }
  138. };
  139. module_platform_driver(jh7110_usb_phy_driver);
  140. MODULE_DESCRIPTION("StarFive JH7110 USB 2.0 PHY driver");
  141. MODULE_AUTHOR("Minda Chen <minda.chen@starfivetech.com>");
  142. MODULE_LICENSE("GPL");