qcom,sm7150-rpmh.h 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150
  1. /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
  2. /*
  3. * Qualcomm SM7150 interconnect IDs
  4. *
  5. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  6. * Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com>
  7. */
  8. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM7150_H
  9. #define __DT_BINDINGS_INTERCONNECT_QCOM_SM7150_H
  10. #define MASTER_A1NOC_CFG 0
  11. #define MASTER_QUP_0 1
  12. #define MASTER_TSIF 2
  13. #define MASTER_EMMC 3
  14. #define MASTER_SDCC_2 4
  15. #define MASTER_SDCC_4 5
  16. #define MASTER_UFS_MEM 6
  17. #define A1NOC_SNOC_SLV 7
  18. #define SLAVE_SERVICE_A1NOC 8
  19. #define MASTER_A2NOC_CFG 0
  20. #define MASTER_QDSS_BAM 1
  21. #define MASTER_QUP_1 2
  22. #define MASTER_CNOC_A2NOC 3
  23. #define MASTER_CRYPTO_CORE_0 4
  24. #define MASTER_IPA 5
  25. #define MASTER_PCIE 6
  26. #define MASTER_QDSS_ETR 7
  27. #define MASTER_USB3 8
  28. #define A2NOC_SNOC_SLV 9
  29. #define SLAVE_ANOC_PCIE_GEM_NOC 10
  30. #define SLAVE_SERVICE_A2NOC 11
  31. #define MASTER_CAMNOC_HF0_UNCOMP 0
  32. #define MASTER_CAMNOC_RT_UNCOMP 1
  33. #define MASTER_CAMNOC_SF_UNCOMP 2
  34. #define MASTER_CAMNOC_NRT_UNCOMP 3
  35. #define SLAVE_CAMNOC_UNCOMP 4
  36. #define MASTER_NPU 0
  37. #define SLAVE_CDSP_GEM_NOC 1
  38. #define MASTER_SPDM 0
  39. #define SNOC_CNOC_MAS 1
  40. #define MASTER_QDSS_DAP 2
  41. #define SLAVE_A1NOC_CFG 3
  42. #define SLAVE_A2NOC_CFG 4
  43. #define SLAVE_AHB2PHY_NORTH 5
  44. #define SLAVE_AHB2PHY_SOUTH 6
  45. #define SLAVE_AHB2PHY_WEST 7
  46. #define SLAVE_AOP 8
  47. #define SLAVE_AOSS 9
  48. #define SLAVE_CAMERA_CFG 10
  49. #define SLAVE_CAMERA_NRT_THROTTLE_CFG 11
  50. #define SLAVE_CAMERA_RT_THROTTLE_CFG 12
  51. #define SLAVE_CLK_CTL 13
  52. #define SLAVE_CDSP_CFG 14
  53. #define SLAVE_RBCPR_CX_CFG 15
  54. #define SLAVE_RBCPR_MX_CFG 16
  55. #define SLAVE_CRYPTO_0_CFG 17
  56. #define SLAVE_CNOC_DDRSS 18
  57. #define SLAVE_DISPLAY_CFG 19
  58. #define SLAVE_DISPLAY_THROTTLE_CFG 20
  59. #define SLAVE_EMMC_CFG 21
  60. #define SLAVE_GLM 22
  61. #define SLAVE_GRAPHICS_3D_CFG 23
  62. #define SLAVE_IMEM_CFG 24
  63. #define SLAVE_IPA_CFG 25
  64. #define SLAVE_CNOC_MNOC_CFG 26
  65. #define SLAVE_PCIE_CFG 27
  66. #define SLAVE_PDM 28
  67. #define SLAVE_PIMEM_CFG 29
  68. #define SLAVE_PRNG 30
  69. #define SLAVE_QDSS_CFG 31
  70. #define SLAVE_QUP_0 32
  71. #define SLAVE_QUP_1 33
  72. #define SLAVE_SDCC_2 34
  73. #define SLAVE_SDCC_4 35
  74. #define SLAVE_SNOC_CFG 36
  75. #define SLAVE_SPDM_WRAPPER 37
  76. #define SLAVE_TCSR 38
  77. #define SLAVE_TLMM_NORTH 39
  78. #define SLAVE_TLMM_SOUTH 40
  79. #define SLAVE_TLMM_WEST 41
  80. #define SLAVE_TSIF 42
  81. #define SLAVE_UFS_MEM_CFG 43
  82. #define SLAVE_USB3 44
  83. #define SLAVE_VENUS_CFG 45
  84. #define SLAVE_VENUS_CVP_THROTTLE_CFG 46
  85. #define SLAVE_VENUS_THROTTLE_CFG 47
  86. #define SLAVE_VSENSE_CTRL_CFG 48
  87. #define SLAVE_CNOC_A2NOC 49
  88. #define SLAVE_SERVICE_CNOC 50
  89. #define MASTER_CNOC_DC_NOC 0
  90. #define SLAVE_GEM_NOC_CFG 1
  91. #define SLAVE_LLCC_CFG 2
  92. #define MASTER_AMPSS_M0 0
  93. #define MASTER_SYS_TCU 1
  94. #define MASTER_GEM_NOC_CFG 2
  95. #define MASTER_COMPUTE_NOC 3
  96. #define MASTER_MNOC_HF_MEM_NOC 4
  97. #define MASTER_MNOC_SF_MEM_NOC 5
  98. #define MASTER_GEM_NOC_PCIE_SNOC 6
  99. #define MASTER_SNOC_GC_MEM_NOC 7
  100. #define MASTER_SNOC_SF_MEM_NOC 8
  101. #define MASTER_GRAPHICS_3D 9
  102. #define SLAVE_MSS_PROC_MS_MPU_CFG 10
  103. #define SLAVE_GEM_NOC_SNOC 11
  104. #define SLAVE_LLCC 12
  105. #define SLAVE_SERVICE_GEM_NOC 13
  106. #define MASTER_LLCC 0
  107. #define SLAVE_EBI_CH0 1
  108. #define MASTER_CNOC_MNOC_CFG 0
  109. #define MASTER_CAMNOC_HF0 1
  110. #define MASTER_CAMNOC_NRT 2
  111. #define MASTER_CAMNOC_RT 3
  112. #define MASTER_CAMNOC_SF 4
  113. #define MASTER_MDP_PORT0 5
  114. #define MASTER_MDP_PORT1 6
  115. #define MASTER_ROTATOR 7
  116. #define MASTER_VIDEO_P0 8
  117. #define MASTER_VIDEO_P1 9
  118. #define MASTER_VIDEO_PROC 10
  119. #define SLAVE_MNOC_SF_MEM_NOC 11
  120. #define SLAVE_MNOC_HF_MEM_NOC 12
  121. #define SLAVE_SERVICE_MNOC 13
  122. #define MASTER_SNOC_CFG 0
  123. #define A1NOC_SNOC_MAS 1
  124. #define A2NOC_SNOC_MAS 2
  125. #define MASTER_GEM_NOC_SNOC 3
  126. #define MASTER_PIMEM 4
  127. #define MASTER_GIC 5
  128. #define SLAVE_APPSS 6
  129. #define SNOC_CNOC_SLV 7
  130. #define SLAVE_SNOC_GEM_NOC_GC 8
  131. #define SLAVE_SNOC_GEM_NOC_SF 9
  132. #define SLAVE_OCIMEM 10
  133. #define SLAVE_PIMEM 11
  134. #define SLAVE_SERVICE_SNOC 12
  135. #define SLAVE_QDSS_STM 13
  136. #define SLAVE_TCU 14
  137. #endif